blob: 14b3ab1a572e0c2c78f0047fd4ee6f8e97e61216 [file] [log] [blame]
Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stuebnerfc367852019-07-16 22:18:21 +02003config ROCKCHIP_PX30
4 bool "Support Rockchip PX30"
5 select ARM64
Quentin Schulz1e9fc7b2024-05-24 11:23:33 +02006 imply OF_UPSTREAM
Heiko Stuebnerfc367852019-07-16 22:18:21 +02007 select SUPPORT_SPL
8 select SUPPORT_TPL
9 select SPL
10 select TPL
11 select TPL_TINY_FRAMEWORK if TPL
Heiko Stuebnerfc367852019-07-16 22:18:21 +020012 select TPL_NEEDS_SEPARATE_STACK if TPL
13 imply SPL_SEPARATE_BSS
Simon Glassf4d60392021-08-08 12:20:12 -060014 select SPL_SERIAL
15 select TPL_SERIAL
Heiko Stuebnerfc367852019-07-16 22:18:21 +020016 select DEBUG_UART_BOARD_INIT
17 imply ROCKCHIP_COMMON_BOARD
18 imply SPL_ROCKCHIP_COMMON_BOARD
19 help
20 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020025config ROCKCHIP_RK3036
26 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +080028 select SUPPORT_SPL
29 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +080030 imply USB_FUNCTION_ROCKUSB
31 imply CMD_ROCKUSB
Kever Yang427cb672019-07-22 20:02:04 +080032 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020033 help
34 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
35 including NEON and GPU, Mali-400 graphics, several DDR3 options
36 and video codec support. Peripherals include Gigabit Ethernet,
37 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
38
Johan Jonkera289fc72022-04-16 17:09:47 +020039config ROCKCHIP_RK3066
40 bool "Support Rockchip RK3066"
41 select CPU_V7A
42 select SPL_BOARD_INIT if SPL
43 select SUPPORT_SPL
44 select SUPPORT_TPL
45 select SPL
46 select TPL
47 select TPL_ROCKCHIP_BACK_TO_BROM
48 select TPL_ROCKCHIP_EARLYRETURN_TO_BROM
49 imply ROCKCHIP_COMMON_BOARD
50 imply SPL_ROCKCHIP_COMMON_BOARD
51 imply SPL_SERIAL
52 imply TPL_ROCKCHIP_COMMON_BOARD
53 imply TPL_SERIAL
54 help
55 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
56 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
57 video interfaces, several memory options and video codec support.
58 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
59 UART, SPI, I2C and PWMs.
60
Kever Yangaa827752017-11-28 16:04:16 +080061config ROCKCHIP_RK3128
62 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053063 select CPU_V7A
Kever Yang96362722019-07-22 20:02:05 +080064 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa827752017-11-28 16:04:16 +080065 help
66 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
67 including NEON and GPU, Mali-400 graphics, several DDR3 options
68 and video codec support. Peripherals include Gigabit Ethernet,
69 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
70
Heiko Stübneref6db5e2017-02-18 19:46:36 +010071config ROCKCHIP_RK3188
72 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053073 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080074 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010075 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010076 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020077 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020078 select SPL_REGMAP
79 select SPL_SYSCON
80 select SPL_RAM
Simon Glass284cb9c2021-07-10 21:14:31 -060081 select SPL_DRIVERS_MISC
Philipp Tomsich16c689c2017-10-10 16:21:15 +020082 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080083 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020084 select BOARD_LATE_INIT
Kever Yangbfd3f872019-07-22 20:02:09 +080085 imply ROCKCHIP_COMMON_BOARD
Kever Yang3bd90402019-07-22 19:59:18 +080086 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübneref6db5e2017-02-18 19:46:36 +010087 help
88 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
89 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
90 video interfaces, several memory options and video codec support.
91 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
92 UART, SPI, I2C and PWMs.
93
Kever Yang57d4dbf2017-06-23 17:17:52 +080094config ROCKCHIP_RK322X
95 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053096 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080097 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080098 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080099 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +0800100 select SPL_DM
101 select SPL_OF_LIBFDT
102 select TPL
103 select TPL_DM
104 select TPL_OF_LIBFDT
Kever Yangaff40c62019-04-02 20:41:24 +0800105 select TPL_NEEDS_SEPARATE_STACK if TPL
Simon Glass284cb9c2021-07-10 21:14:31 -0600106 select SPL_DRIVERS_MISC
Kever Yang0b517732019-07-22 20:02:07 +0800107 imply ROCKCHIP_COMMON_BOARD
Simon Glassf4d60392021-08-08 12:20:12 -0600108 imply SPL_SERIAL
Kever Yangd877fd22019-07-22 19:59:20 +0800109 imply SPL_ROCKCHIP_COMMON_BOARD
Alex Bee4fe31122023-07-18 16:57:13 +0200110 select SPL_OPTEE_IMAGE if SPL_FIT
Simon Glassf4d60392021-08-08 12:20:12 -0600111 imply TPL_SERIAL
Kever Yang466f3fd2019-07-09 22:05:56 +0800112 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +0800113 select TPL_LIBCOMMON_SUPPORT
114 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +0800115 help
116 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
117 including NEON and GPU, Mali-400 graphics, several DDR3 options
118 and video codec support. Peripherals include Gigabit Ethernet,
119 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
120
Simon Glass2cffe662015-08-30 16:55:38 -0600121config ROCKCHIP_RK3288
122 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530123 select CPU_V7A
John Keepingd5cb7712023-02-23 19:28:51 +0000124 select OF_SYSTEM_SETUP
Tom Rinie1e85442021-08-27 21:18:30 -0400125 select SKIP_LOWLEVEL_INIT_ONLY
Kever Yang0d3d7832016-07-19 21:16:59 +0800126 select SUPPORT_SPL
127 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +0800128 select SUPPORT_TPL
Johan Jonker9a26fb12023-12-27 13:06:47 +0100129 select FDT_64BIT
Jagan Teki7b7cc952020-01-23 19:42:19 +0530130 imply PRE_CONSOLE_BUFFER
Kever Yangba875012019-07-22 20:02:15 +0800131 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa67deb2019-07-22 19:59:27 +0800132 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +0800133 imply TPL_CLK
134 imply TPL_DM
Simon Glass284cb9c2021-07-10 21:14:31 -0600135 imply TPL_DRIVERS_MISC
Kever Yangf7c0a332019-07-02 11:43:05 +0800136 imply TPL_LIBCOMMON_SUPPORT
137 imply TPL_LIBGENERIC_SUPPORT
Kever Yangb36e7092019-07-02 11:43:06 +0800138 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +0800139 imply TPL_OF_CONTROL
140 imply TPL_OF_PLATDATA
141 imply TPL_RAM
142 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +0800143 imply TPL_ROCKCHIP_COMMON_BOARD
Simon Glassf4d60392021-08-08 12:20:12 -0600144 imply TPL_SERIAL
Kever Yangf7c0a332019-07-02 11:43:05 +0800145 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +0800146 imply USB_FUNCTION_ROCKUSB
147 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -0600148 help
149 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
150 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
151 video interfaces supporting HDMI and eDP, several DDR3 options
152 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100153 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600154
Andy Yanb5e16302019-11-14 11:21:12 +0800155config ROCKCHIP_RK3308
156 bool "Support Rockchip RK3308"
157 select ARM64
Andy Yanb5e16302019-11-14 11:21:12 +0800158 select SUPPORT_SPL
159 select SUPPORT_TPL
160 select SPL
161 select SPL_ATF
162 select SPL_ATF_NO_PLATFORM_PARAM
163 select SPL_LOAD_FIT
Jonas Karlmana2caa162024-04-08 18:14:00 +0000164 imply ARMV8_CRYPTO
165 imply ARMV8_SET_SMPEN
Jonas Karlmanfbced692024-04-08 18:14:02 +0000166 imply DM_RNG
Jonas Karlmana2caa162024-04-08 18:14:00 +0000167 imply LEGACY_IMAGE_FORMAT
Jonas Karlman1cf34dd2024-04-08 18:14:01 +0000168 imply MISC
169 imply MISC_INIT_R
Jonas Karlman0cab3c52024-05-04 19:42:53 +0000170 imply OF_UPSTREAM
Jonas Karlmanfbced692024-04-08 18:14:02 +0000171 imply RNG_ROCKCHIP
Andy Yanb5e16302019-11-14 11:21:12 +0800172 imply ROCKCHIP_COMMON_BOARD
Jonas Karlman1cf34dd2024-04-08 18:14:01 +0000173 imply ROCKCHIP_OTP
Andy Yanb5e16302019-11-14 11:21:12 +0800174 imply SPL_CLK
Jonas Karlmana499c982024-04-08 18:14:03 +0000175 imply SPL_DM_SEQ_ALIAS
Jonas Karlmana2caa162024-04-08 18:14:00 +0000176 imply SPL_FIT_SIGNATURE
Jonas Karlmana499c982024-04-08 18:14:03 +0000177 imply SPL_PINCTRL
Andy Yanb5e16302019-11-14 11:21:12 +0800178 imply SPL_RAM
Jonas Karlman16b0f902024-04-08 18:13:59 +0000179 imply SPL_REGMAP
180 imply SPL_ROCKCHIP_COMMON_BOARD
Andy Yanb5e16302019-11-14 11:21:12 +0800181 imply SPL_SEPARATE_BSS
Jonas Karlman16b0f902024-04-08 18:13:59 +0000182 imply SPL_SERIAL
183 imply SPL_SYSCON
Andy Yanb5e16302019-11-14 11:21:12 +0800184 help
185 The Rockchip RK3308 is a ARM-based Soc which embedded with quad
186 Cortex-A35 and highly integrated audio interfaces.
187
Kever Yangec02b3c2017-02-23 15:37:51 +0800188config ROCKCHIP_RK3328
189 bool "Support Rockchip RK3328"
190 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300191 select SUPPORT_SPL
192 select SPL
Kever Yang69871852019-08-02 10:40:01 +0300193 select SUPPORT_TPL
194 select TPL
Kever Yang69871852019-08-02 10:40:01 +0300195 select TPL_NEEDS_SEPARATE_STACK if TPL
Jonas Karlman1b3d9dd2024-04-21 20:09:02 +0000196 imply ARMV8_CRYPTO
197 imply ARMV8_SET_SMPEN
Jonas Karlman86d4ebb2024-04-21 20:09:01 +0000198 imply MISC
199 imply MISC_INIT_R
Jonas Karlman1b3d9dd2024-04-21 20:09:02 +0000200 imply OF_LIVE
Jonas Karlmaned6f48e2024-05-04 19:42:55 +0000201 imply OF_UPSTREAM
Jagan Tekifb71c882024-01-17 13:21:52 +0530202 imply PRE_CONSOLE_BUFFER
Kever Yang205e2cc2019-07-22 20:02:16 +0800203 imply ROCKCHIP_COMMON_BOARD
Jonas Karlman86d4ebb2024-04-21 20:09:01 +0000204 imply ROCKCHIP_EFUSE
YouMin Chenb9f7df32019-11-15 11:04:44 +0800205 imply ROCKCHIP_SDRAM_COMMON
Kever Yangbb4c3252019-07-22 19:59:32 +0800206 imply SPL_ROCKCHIP_COMMON_BOARD
Jonas Karlman86d4ebb2024-04-21 20:09:01 +0000207 imply SPL_SEPARATE_BSS
Simon Glassf4d60392021-08-08 12:20:12 -0600208 imply SPL_SERIAL
209 imply TPL_SERIAL
Kever Yangec02b3c2017-02-23 15:37:51 +0800210 help
211 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
212 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
213 video interfaces supporting HDMI and eDP, several DDR3 options
214 and video codec support. Peripherals include Gigabit Ethernet,
215 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
216
Andreas Färber9e3ad682017-05-15 17:51:18 +0800217config ROCKCHIP_RK3368
218 bool "Support Rockchip RK3368"
219 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200220 select SUPPORT_SPL
221 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200222 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang35b401e2019-07-22 20:02:17 +0800223 imply ROCKCHIP_COMMON_BOARD
Kever Yang8bf7ed42019-07-22 19:59:34 +0800224 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200225 imply SPL_SEPARATE_BSS
Simon Glassf4d60392021-08-08 12:20:12 -0600226 imply SPL_SERIAL
227 imply TPL_SERIAL
Kever Yang48831b22019-07-09 22:05:58 +0800228 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800229 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200230 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
231 into a big and little cluster with 4 cores each) Cortex-A53 including
232 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
233 (for the little cluster), PowerVR G6110 based graphics, one video
234 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
235 video codec support.
236
237 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
238 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800239
Kever Yang0d3d7832016-07-19 21:16:59 +0800240config ROCKCHIP_RK3399
241 bool "Support Rockchip RK3399"
242 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800243 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800244 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800245 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530246 select SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530247 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530248 select SPL_LOAD_FIT
249 select SPL_CLK if SPL
250 select SPL_PINCTRL if SPL
251 select SPL_RAM if SPL
252 select SPL_REGMAP if SPL
253 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800254 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800255 select SPL_SEPARATE_BSS
Simon Glassf4d60392021-08-08 12:20:12 -0600256 select SPL_SERIAL
Jagan Tekicd433892019-05-08 11:11:43 +0530257 select CLK
258 select FIT
259 select PINCTRL
260 select RAM
261 select REGMAP
262 select SYSCON
263 select DM_PMIC
264 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800265 select BOARD_LATE_INIT
Jonas Karlman8b663722024-04-30 15:30:13 +0000266 imply ARMV8_CRYPTO
267 imply ARMV8_SET_SMPEN
Jonas Karlmana6389252024-04-30 15:30:12 +0000268 imply BOOTSTD_FULL
269 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
Jonas Karlman0ad89712024-04-30 15:30:14 +0000270 imply DM_RNG
Jonas Karlman8b663722024-04-30 15:30:13 +0000271 imply LEGACY_IMAGE_FORMAT
Jonas Karlmana6389252024-04-30 15:30:12 +0000272 imply MISC
273 imply MISC_INIT_R
Jonas Karlman7f22b182024-04-30 15:30:16 +0000274 imply OF_LIBFDT_OVERLAY
Jonas Karlman8b663722024-04-30 15:30:13 +0000275 imply OF_LIVE
Jonas Karlman219b41a2024-05-04 19:42:57 +0000276 imply OF_UPSTREAM
Sughosh Ganuc1b8e8b2022-11-10 14:49:15 +0530277 imply PARTITION_TYPE_GUID
Jonas Karlman8660d332024-04-30 15:30:15 +0000278 imply PHY_GIGE if GMAC_ROCKCHIP
Jagan Teki9249d5c2020-04-02 17:11:23 +0530279 imply PRE_CONSOLE_BUFFER
Jonas Karlman0ad89712024-04-30 15:30:14 +0000280 imply RNG_ROCKCHIP
Kever Yang9554a4e2019-07-22 20:02:19 +0800281 imply ROCKCHIP_COMMON_BOARD
Jonas Karlmana6389252024-04-30 15:30:12 +0000282 imply ROCKCHIP_EFUSE
YouMin Chen23ae72e2019-11-15 11:04:45 +0800283 imply ROCKCHIP_SDRAM_COMMON
Jonas Karlman20e63412024-04-30 15:30:25 +0000284 imply SPL_DM_SEQ_ALIAS
Jonas Karlman8b663722024-04-30 15:30:13 +0000285 imply SPL_FIT_SIGNATURE
Kever Yangff9afe42019-07-22 19:59:42 +0800286 imply SPL_ROCKCHIP_COMMON_BOARD
Jonas Karlmana6389252024-04-30 15:30:12 +0000287 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
288 imply TPL_CLK
289 imply TPL_DM
Kever Yangfca798d2018-11-09 11:18:15 +0800290 imply TPL_LIBCOMMON_SUPPORT
291 imply TPL_LIBGENERIC_SUPPORT
Kever Yangfca798d2018-11-09 11:18:15 +0800292 imply TPL_OF_CONTROL
Jonas Karlmana6389252024-04-30 15:30:12 +0000293 imply TPL_RAM
Kever Yangfca798d2018-11-09 11:18:15 +0800294 imply TPL_REGMAP
Jonas Karlmana6389252024-04-30 15:30:12 +0000295 imply TPL_ROCKCHIP_COMMON_BOARD
296 imply TPL_SERIAL
297 imply TPL_SYS_MALLOC_SIMPLE
Kever Yangfca798d2018-11-09 11:18:15 +0800298 imply TPL_SYSCON
Kever Yangfca798d2018-11-09 11:18:15 +0800299 imply TPL_TINY_MEMSET
Kever Yang0d3d7832016-07-19 21:16:59 +0800300 help
301 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
302 and quad-core Cortex-A53.
303 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
304 video interfaces supporting HDMI and eDP, several DDR3 options
305 and video codec support. Peripherals include Gigabit Ethernet,
306 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
307
Joseph Chen72cd8792021-06-02 15:58:25 +0800308config ROCKCHIP_RK3568
309 bool "Support Rockchip RK3568"
310 select ARM64
Nico Cheng00ceeb02021-10-26 10:42:19 +0800311 select SUPPORT_SPL
312 select SPL
Joseph Chen72cd8792021-06-02 15:58:25 +0800313 select CLK
314 select PINCTRL
315 select RAM
316 select REGMAP
317 select SYSCON
318 select BOARD_LATE_INIT
Manoj Saib34b19c2023-02-17 17:28:44 +0530319 select DM_REGULATOR_FIXED
Jagan Tekice0bbac2023-02-17 17:28:34 +0530320 select DM_RESET
Jonas Karlmanc1bb7122024-04-22 06:28:47 +0000321 imply BOOTSTD_FULL
Jonas Karlmancfcf05e2024-04-22 06:28:45 +0000322 imply DM_RNG
Jonas Karlmanbe56bb52023-02-22 22:44:41 +0000323 imply MISC_INIT_R
Jonas Karlman67bbb4e2024-02-04 20:53:06 +0000324 imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
Jonas Karlman0eb24592024-04-22 06:28:44 +0000325 imply OF_LIBFDT_OVERLAY
Jonas Karlman737739e2024-05-04 19:43:00 +0000326 imply OF_UPSTREAM
Jonas Karlmane8b5bae2024-04-22 06:28:46 +0000327 imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP
Jonas Karlmancfcf05e2024-04-22 06:28:45 +0000328 imply RNG_ROCKCHIP
Jonas Karlman0eb24592024-04-22 06:28:44 +0000329 imply ROCKCHIP_COMMON_BOARD
330 imply ROCKCHIP_OTP
331 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jonas Karlman67bbb4e2024-02-04 20:53:06 +0000332 imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT
Joseph Chen72cd8792021-06-02 15:58:25 +0800333 help
334 The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
335 including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
336 two video interfaces supporting HDMI and eDP, several DDR3 options
337 and video codec support. Peripherals include Gigabit Ethernet,
338 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
339
Jagan Teki8967dea2023-01-30 20:27:45 +0530340config ROCKCHIP_RK3588
341 bool "Support Rockchip RK3588"
342 select ARM64
343 select SUPPORT_SPL
344 select SPL
345 select CLK
346 select PINCTRL
347 select RAM
348 select REGMAP
349 select SYSCON
350 select BOARD_LATE_INIT
Jonas Karlman9bfd6512023-05-17 18:26:37 +0000351 select DM_REGULATOR_FIXED
352 select DM_RESET
Jonas Karlman0eb24592024-04-22 06:28:44 +0000353 imply BOOTSTD_FULL
354 imply CLK_SCMI
Jonas Karlmancfcf05e2024-04-22 06:28:45 +0000355 imply DM_RNG
Jonas Karlmaneeb19172023-02-22 22:44:41 +0000356 imply MISC_INIT_R
Jonas Karlman67bbb4e2024-02-04 20:53:06 +0000357 imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
Jonas Karlman0eb24592024-04-22 06:28:44 +0000358 imply OF_LIBFDT_OVERLAY
Jonas Karlman45be8102024-05-04 19:43:07 +0000359 imply OF_UPSTREAM
Jonas Karlmane8b5bae2024-04-22 06:28:46 +0000360 imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP
Jonas Karlmancfcf05e2024-04-22 06:28:45 +0000361 imply RNG_ROCKCHIP
Jonas Karlman0eb24592024-04-22 06:28:44 +0000362 imply ROCKCHIP_COMMON_BOARD
363 imply ROCKCHIP_OTP
Jonas Karlmanfc805c22023-04-17 19:07:21 +0000364 imply SCMI_FIRMWARE
Jonas Karlman0eb24592024-04-22 06:28:44 +0000365 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
366 imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT
Jagan Teki8967dea2023-01-30 20:27:45 +0530367 help
368 The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and
369 quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4,
370 HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1,
371 SD3.0/MMC4.5, USB OTG 3.0, Type-C, USB 2.0, PCIe 3.0, SATA 3, Ethernet,
372 SDIO3.0 I2C, UART, SPI, GPIO and PWM.
373
Andy Yan2d982da2017-06-01 18:00:55 +0800374config ROCKCHIP_RV1108
375 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530376 select CPU_V7A
Kever Yanga2b336e2019-07-22 20:02:21 +0800377 imply ROCKCHIP_COMMON_BOARD
Fabio Estevam09df3632024-04-24 11:18:41 -0300378 imply OF_UPSTREAM
Andy Yan2d982da2017-06-01 18:00:55 +0800379 help
380 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
381 and a DSP.
382
Jagan Teki249a2382022-12-14 23:21:05 +0530383config ROCKCHIP_RV1126
384 bool "Support Rockchip RV1126"
385 select CPU_V7A
386 select SKIP_LOWLEVEL_INIT_ONLY
387 select TPL
388 select SUPPORT_TPL
389 select TPL_NEEDS_SEPARATE_STACK
390 select TPL_ROCKCHIP_BACK_TO_BROM
391 select SPL
392 select SUPPORT_SPL
393 select SPL_STACK_R
394 select CLK
395 select FIT
396 select PINCTRL
397 select RAM
398 select ROCKCHIP_SDRAM_COMMON
399 select REGMAP
400 select SYSCON
401 select DM_PMIC
402 select DM_REGULATOR_FIXED
403 select DM_RESET
404 select REGULATOR_RK8XX
405 select PMIC_RK8XX
406 select BOARD_LATE_INIT
407 imply ROCKCHIP_COMMON_BOARD
Tim Lunnd0812b22024-01-24 14:26:01 +1100408 select SPL_OPTEE_IMAGE if SPL_FIT
Jagan Tekid679f622023-07-29 19:11:42 +0530409 imply OF_LIBFDT_OVERLAY
Tim Lunncbfee492023-10-31 13:07:15 +1100410 imply ROCKCHIP_OTP
411 imply MISC_INIT_R
Jagan Teki249a2382022-12-14 23:21:05 +0530412 imply TPL_DM
413 imply TPL_LIBCOMMON_SUPPORT
414 imply TPL_LIBGENERIC_SUPPORT
415 imply TPL_OF_CONTROL
416 imply TPL_OF_PLATDATA
417 imply TPL_RAM
418 imply TPL_ROCKCHIP_COMMON_BOARD
419 imply TPL_SERIAL
420 imply SPL_CLK
421 imply SPL_DM
422 imply SPL_DRIVERS_MISC
423 imply SPL_LIBCOMMON_SUPPORT
424 imply SPL_LIBGENERIC_SUPPORT
425 imply SPL_OF_CONTROL
426 imply SPL_RAM
427 imply SPL_REGMAP
428 imply SPL_ROCKCHIP_COMMON_BOARD
429 imply SPL_SERIAL
430 imply SPL_SYSCON
Anand Moon00c92fe2024-05-14 09:35:22 +0530431 imply OF_UPSTREAM
Jagan Teki249a2382022-12-14 23:21:05 +0530432
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200433config ROCKCHIP_USB_UART
434 bool "Route uart output to usb pins"
435 help
436 Rockchip SoCs have the ability to route the signals of the debug
437 uart through the d+ and d- pins of a specific usb phy to enable
438 some form of closed-case debugging. With this option supported
439 SoCs will enable this routing as a debug measure.
440
Philipp Tomsich798370f2017-06-29 11:21:15 +0200441config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800442 bool "SPL returns to bootrom"
443 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100444 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800445 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200446 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800447 help
448 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
449 SPL will return to the boot rom, which will then load the U-Boot
450 binary to keep going on.
451
Philipp Tomsich798370f2017-06-29 11:21:15 +0200452config TPL_ROCKCHIP_BACK_TO_BROM
453 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800454 default y
Johan Jonkera768ff52023-10-27 20:35:37 +0200455 select ROCKCHIP_BROM_HELPER if !ROCKCHIP_RK3066
Kever Yangbd8532e2019-07-22 19:59:15 +0800456 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200457 depends on TPL
458 help
459 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
460 SPL will return to the boot rom, which will then load the U-Boot
461 binary to keep going on.
462
Kever Yangbb337732019-07-22 20:02:01 +0800463config ROCKCHIP_COMMON_BOARD
464 bool "Rockchip common board file"
465 help
466 Rockchip SoCs have similar boot process, Common board file is mainly
467 in charge of common process of board_init() and board_late_init() for
468 U-Boot proper.
469
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800470config SPL_ROCKCHIP_COMMON_BOARD
471 bool "Rockchip SPL common board file"
472 depends on SPL
473 help
474 Rockchip SoCs have similar boot process, SPL is mainly in charge of
475 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
476 no TPL for the board.
477
Kever Yang34ead0f2019-07-09 22:05:55 +0800478config TPL_ROCKCHIP_COMMON_BOARD
Thomas Hebbcfbebf82019-12-20 18:05:22 -0800479 bool "Rockchip TPL common board file"
Kever Yang34ead0f2019-07-09 22:05:55 +0800480 depends on TPL
481 help
482 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
483 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
484 common board is a basic TPL board init which can be shared for most
Thomas Hebbfd37f242019-11-13 18:18:03 -0800485 of SoCs to avoid copy-paste for different SoCs.
Kever Yang34ead0f2019-07-09 22:05:55 +0800486
Jonas Karlman38ad6c92023-02-25 19:01:34 +0000487config ROCKCHIP_EXTERNAL_TPL
488 bool "Use external TPL binary"
Massimo Pegorer8c20dfa2023-09-09 11:33:24 +0200489 default y if ROCKCHIP_RK3308 || ROCKCHIP_RK3568 || ROCKCHIP_RK3588
Jonas Karlman38ad6c92023-02-25 19:01:34 +0000490 help
491 Some Rockchip SoCs require an external TPL to initialize DRAM.
492 Enable this option and build with ROCKCHIP_TPL=/path/to/ddr.bin to
493 include the external TPL in the image built by binman.
494
Andy Yan70378cb2017-10-11 15:00:16 +0800495config ROCKCHIP_BOOT_MODE_REG
496 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800497 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800498 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800499 according to the value from this register.
500
Chris Morgan7c9de742022-05-27 13:18:20 -0500501config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON
502 bool "Disable device boot on power plug-in"
503 depends on PMIC_RK8XX
Chris Morgan7c9de742022-05-27 13:18:20 -0500504 ---help---
505 Say Y here to prevent the device from booting up because of a plug-in
506 event. When set, the device will boot briefly to determine why it was
507 powered on, and if it was determined because of a plug-in event
508 instead of a button press event it will shut back off.
509
Johan Jonkerf6fc8952022-04-09 18:55:02 +0200510config ROCKCHIP_STIMER
511 bool "Rockchip STIMER support"
512 default y
513 help
514 Enable Rockchip STIMER support.
515
516config ROCKCHIP_STIMER_BASE
517 hex
518 depends on ROCKCHIP_STIMER
519
Kever Yange484f772017-04-20 17:03:46 +0800520config ROCKCHIP_SPL_RESERVE_IRAM
521 hex "Size of IRAM reserved in SPL"
Tom Rinif18679c2023-08-02 11:09:43 -0400522 default 0x0
Kever Yange484f772017-04-20 17:03:46 +0800523 help
524 SPL may need reserve memory for firmware loaded by SPL, whose load
525 address is in IRAM and may overlay with SPL text area if not
526 reserved.
527
Heiko Stübner355a8802017-02-18 19:46:25 +0100528config ROCKCHIP_BROM_HELPER
529 bool
530
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200531config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
532 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
533 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
534 help
535 Some Rockchip BROM variants (e.g. on the RK3188) load the
536 first stage in segments and enter multiple times. E.g. on
537 the RK3188, the first 1KB of the first stage are loaded
538 first and entered; after returning to the BROM, the
539 remainder of the first stage is loaded, but the BROM
540 re-enters at the same address/to the same code as previously.
541
542 This enables support code in the BOOT0 hook for the SPL stage
543 to allow multiple entries.
544
Quentin Schulz95b568f2024-03-11 13:01:54 +0100545config ROCKCHIP_DISABLE_FORCE_JTAG
546 bool "Disable force_jtag feature"
547 default y
548 depends on SPL
549 help
550 Rockchip SoCs can automatically switch between jtag and sdmmc based
551 on the following rules:
552 - all the SDMMC pins including SDMMC_DET set as SDMMC function in
553 GRF,
554 - force_jtag bit in GRF is 1,
555 - SDMMC_DET is low (no card detected),
556
557 Some HW design may not route the SD card card detect to SDMMC_DET
558 pin, thus breaking the SD card support in some cases because JTAG
559 would be auto-enabled by mistake.
560
561 Also, enabling JTAG at runtime may be an undesired feature, e.g.
562 because it could be a security vulnerability.
563
564 This disables force_jtag feature, which you may want for debugging
565 purposes.
566
567 If unsure, say Y.
568
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200569config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
570 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
571 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
572 help
573 Some Rockchip BROM variants (e.g. on the RK3188) load the
574 first stage in segments and enter multiple times. E.g. on
575 the RK3188, the first 1KB of the first stage are loaded
576 first and entered; after returning to the BROM, the
577 remainder of the first stage is loaded, but the BROM
578 re-enters at the same address/to the same code as previously.
579
580 This enables support code in the BOOT0 hook for the TPL stage
581 to allow multiple entries.
582
Simon Glassb58bfe02021-08-08 12:20:09 -0600583config SPL_MMC
Philipp Tomsich798370f2017-06-29 11:21:15 +0200584 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400585
Simon Glass88315f72020-07-19 13:55:57 -0600586config ROCKCHIP_SPI_IMAGE
587 bool "Build a SPI image for rockchip"
Simon Glass88315f72020-07-19 13:55:57 -0600588 help
589 Some Rockchip SoCs support booting from SPI flash. Enable this
Quentin Schulz12df9cf2022-09-02 15:10:54 +0200590 option to produce a SPI-flash image containing U-Boot. The image
591 is built by binman. U-Boot sits near the start of the image.
Simon Glass88315f72020-07-19 13:55:57 -0600592
Alper Nebi Yasakcf9159e2022-01-29 18:27:56 +0300593config LNX_KRNL_IMG_TEXT_OFFSET_BASE
Simon Glass72cc5382022-10-20 18:22:39 -0600594 default TEXT_BASE
Alper Nebi Yasakcf9159e2022-01-29 18:27:56 +0300595
Jonas Karlmane4453632024-03-02 19:16:11 +0000596config ROCKCHIP_COMMON_STACK_ADDR
597 bool
598 depends on SPL_SHARES_INIT_SP_ADDR
599 select HAS_CUSTOM_SYS_INIT_SP_ADDR
600 imply SPL_LIBCOMMON_SUPPORT if SPL
601 imply SPL_LIBGENERIC_SUPPORT if SPL
602 imply SPL_ROCKCHIP_COMMON_BOARD if SPL
603 imply SPL_SYS_MALLOC_F if SPL
604 imply SPL_SYS_MALLOC_SIMPLE if SPL
605 imply TPL_LIBCOMMON_SUPPORT if TPL
606 imply TPL_LIBGENERIC_SUPPORT if TPL
607 imply TPL_ROCKCHIP_COMMON_BOARD if TPL
608 imply TPL_SYS_MALLOC_F if TPL
609 imply TPL_SYS_MALLOC_SIMPLE if TPL
610
Quentin Schulzfb2d1ec2024-04-25 12:46:25 +0200611config NR_DRAM_BANKS
612 default 10 if ROCKCHIP_EXTERNAL_TPL
613
Heiko Stuebnerfc367852019-07-16 22:18:21 +0200614source "arch/arm/mach-rockchip/px30/Kconfig"
huang lin1115b642015-11-17 14:20:27 +0800615source "arch/arm/mach-rockchip/rk3036/Kconfig"
Johan Jonkera289fc72022-04-16 17:09:47 +0200616source "arch/arm/mach-rockchip/rk3066/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800617source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100618source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800619source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200620source "arch/arm/mach-rockchip/rk3288/Kconfig"
Andy Yanb5e16302019-11-14 11:21:12 +0800621source "arch/arm/mach-rockchip/rk3308/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800622source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800623source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800624source "arch/arm/mach-rockchip/rk3399/Kconfig"
Joseph Chen16899892021-06-02 16:13:46 +0800625source "arch/arm/mach-rockchip/rk3568/Kconfig"
Jagan Teki8967dea2023-01-30 20:27:45 +0530626source "arch/arm/mach-rockchip/rk3588/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800627source "arch/arm/mach-rockchip/rv1108/Kconfig"
Jagan Teki249a2382022-12-14 23:21:05 +0530628source "arch/arm/mach-rockchip/rv1126/Kconfig"
Jonas Karlmane4453632024-03-02 19:16:11 +0000629
630if ROCKCHIP_COMMON_STACK_ADDR && SPL_SHARES_INIT_SP_ADDR
631
632config CUSTOM_SYS_INIT_SP_ADDR
633 default 0x3f00000
634
635config SYS_MALLOC_F_LEN
636 default 0x10000 if CUSTOM_SYS_INIT_SP_ADDR = 0x3f00000
637
638config SPL_SYS_MALLOC_F_LEN
639 default 0x8000 if CUSTOM_SYS_INIT_SP_ADDR = 0x3f00000
640
641config TPL_SYS_MALLOC_F_LEN
642 default 0x4000 if CUSTOM_SYS_INIT_SP_ADDR = 0x3f00000
643
644config TEXT_BASE
645 default 0x00200000 if ARM64
646
647config SPL_TEXT_BASE
648 default 0x0 if ARM64
649
650config SPL_HAS_BSS_LINKER_SECTION
651 default y if ARM64
652
653config SPL_BSS_START_ADDR
654 default 0x3f80000
655
656config SPL_BSS_MAX_SIZE
657 default 0x8000 if SPL_BSS_START_ADDR = 0x3f80000
658
659config SPL_STACK_R
660 default y if CUSTOM_SYS_INIT_SP_ADDR = 0x3f00000
661
662config SPL_STACK_R_ADDR
663 default 0x3e00000 if CUSTOM_SYS_INIT_SP_ADDR = 0x3f00000
664
665config SPL_STACK_R_MALLOC_SIMPLE_LEN
666 default 0x200000 if SPL_STACK_R_ADDR = 0x3e00000
667
668endif
Simon Glass2cffe662015-08-30 16:55:38 -0600669endif