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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangaa827752017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080037 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020038 select BOARD_LATE_INIT
Kever Yang3bd90402019-07-22 19:59:18 +080039 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübneref6db5e2017-02-18 19:46:36 +010040 help
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
46
Kever Yang57d4dbf2017-06-23 17:17:52 +080047config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053049 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080050 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080051 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080052 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080053 select SPL_DM
54 select SPL_OF_LIBFDT
55 select TPL
56 select TPL_DM
57 select TPL_OF_LIBFDT
58 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
59 select TPL_NEEDS_SEPARATE_STACK if TPL
60 select SPL_DRIVERS_MISC_SUPPORT
61 imply SPL_SERIAL_SUPPORT
Kever Yangd877fd22019-07-22 19:59:20 +080062 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080063 imply TPL_SERIAL_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080064 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080065 select TPL_LIBCOMMON_SUPPORT
66 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080067 help
68 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
69 including NEON and GPU, Mali-400 graphics, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
71 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
72
Simon Glass2cffe662015-08-30 16:55:38 -060073config ROCKCHIP_RK3288
74 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053075 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080076 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080077 select SUPPORT_SPL
78 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080079 select SUPPORT_TPL
Kever Yangf7c0a332019-07-02 11:43:05 +080080 imply TPL_CLK
81 imply TPL_DM
82 imply TPL_DRIVERS_MISC_SUPPORT
83 imply TPL_LIBCOMMON_SUPPORT
84 imply TPL_LIBGENERIC_SUPPORT
85 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +080086 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +080087 imply TPL_OF_CONTROL
88 imply TPL_OF_PLATDATA
89 imply TPL_RAM
90 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +080091 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080092 imply TPL_SERIAL_SUPPORT
93 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +080094 imply USB_FUNCTION_ROCKUSB
95 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060096 help
97 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
98 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
99 video interfaces supporting HDMI and eDP, several DDR3 options
100 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100101 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600102
Kever Yangec02b3c2017-02-23 15:37:51 +0800103config ROCKCHIP_RK3328
104 bool "Support Rockchip RK3328"
105 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300106 select SUPPORT_SPL
107 select SPL
108 imply SPL_SERIAL_SUPPORT
109 imply SPL_SEPARATE_BSS
110 select ENABLE_ARM_SOC_BOOT0_HOOK
111 select DEBUG_UART_BOARD_INIT
112 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800113 help
114 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
115 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
116 video interfaces supporting HDMI and eDP, several DDR3 options
117 and video codec support. Peripherals include Gigabit Ethernet,
118 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
119
Andreas Färber9e3ad682017-05-15 17:51:18 +0800120config ROCKCHIP_RK3368
121 bool "Support Rockchip RK3368"
122 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200123 select SUPPORT_SPL
124 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200125 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
126 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200127 imply SPL_SEPARATE_BSS
128 imply SPL_SERIAL_SUPPORT
129 imply TPL_SERIAL_SUPPORT
Kever Yang48831b22019-07-09 22:05:58 +0800130 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800131 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200132 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
133 into a big and little cluster with 4 cores each) Cortex-A53 including
134 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
135 (for the little cluster), PowerVR G6110 based graphics, one video
136 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
137 video codec support.
138
139 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
140 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800141
Kever Yang0d3d7832016-07-19 21:16:59 +0800142config ROCKCHIP_RK3399
143 bool "Support Rockchip RK3399"
144 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800145 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800146 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800147 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530148 select SPL_ATF
149 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530150 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530151 select SPL_LOAD_FIT
152 select SPL_CLK if SPL
153 select SPL_PINCTRL if SPL
154 select SPL_RAM if SPL
155 select SPL_REGMAP if SPL
156 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800157 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
158 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800159 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200160 select SPL_SERIAL_SUPPORT
161 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530162 select CLK
163 select FIT
164 select PINCTRL
165 select RAM
166 select REGMAP
167 select SYSCON
168 select DM_PMIC
169 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800170 select BOARD_LATE_INIT
Kever Yangfca798d2018-11-09 11:18:15 +0800171 imply TPL_SERIAL_SUPPORT
172 imply TPL_LIBCOMMON_SUPPORT
173 imply TPL_LIBGENERIC_SUPPORT
174 imply TPL_SYS_MALLOC_SIMPLE
Kever Yangfca798d2018-11-09 11:18:15 +0800175 imply TPL_DRIVERS_MISC_SUPPORT
176 imply TPL_OF_CONTROL
177 imply TPL_DM
178 imply TPL_REGMAP
179 imply TPL_SYSCON
180 imply TPL_RAM
181 imply TPL_CLK
182 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800183 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang0d3d7832016-07-19 21:16:59 +0800184 help
185 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
186 and quad-core Cortex-A53.
187 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
188 video interfaces supporting HDMI and eDP, several DDR3 options
189 and video codec support. Peripherals include Gigabit Ethernet,
190 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
191
Andy Yan2d982da2017-06-01 18:00:55 +0800192config ROCKCHIP_RV1108
193 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530194 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800195 help
196 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
197 and a DSP.
198
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200199config ROCKCHIP_USB_UART
200 bool "Route uart output to usb pins"
201 help
202 Rockchip SoCs have the ability to route the signals of the debug
203 uart through the d+ and d- pins of a specific usb phy to enable
204 some form of closed-case debugging. With this option supported
205 SoCs will enable this routing as a debug measure.
206
Philipp Tomsich798370f2017-06-29 11:21:15 +0200207config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800208 bool "SPL returns to bootrom"
209 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100210 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800211 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200212 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800213 help
214 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
215 SPL will return to the boot rom, which will then load the U-Boot
216 binary to keep going on.
217
Philipp Tomsich798370f2017-06-29 11:21:15 +0200218config TPL_ROCKCHIP_BACK_TO_BROM
219 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800220 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200221 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800222 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200223 depends on TPL
224 help
225 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
226 SPL will return to the boot rom, which will then load the U-Boot
227 binary to keep going on.
228
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800229config SPL_ROCKCHIP_COMMON_BOARD
230 bool "Rockchip SPL common board file"
231 depends on SPL
232 help
233 Rockchip SoCs have similar boot process, SPL is mainly in charge of
234 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
235 no TPL for the board.
236
Kever Yang34ead0f2019-07-09 22:05:55 +0800237config TPL_ROCKCHIP_COMMON_BOARD
238 bool ""
239 depends on TPL
240 help
241 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
242 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
243 common board is a basic TPL board init which can be shared for most
244 of SoCs to avoid copy-pase for different SoCs.
245
Andy Yan70378cb2017-10-11 15:00:16 +0800246config ROCKCHIP_BOOT_MODE_REG
247 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800248 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800249 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800250 according to the value from this register.
251
Kever Yange484f772017-04-20 17:03:46 +0800252config ROCKCHIP_SPL_RESERVE_IRAM
253 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800254 default 0
Kever Yange484f772017-04-20 17:03:46 +0800255 help
256 SPL may need reserve memory for firmware loaded by SPL, whose load
257 address is in IRAM and may overlay with SPL text area if not
258 reserved.
259
Heiko Stübner355a8802017-02-18 19:46:25 +0100260config ROCKCHIP_BROM_HELPER
261 bool
262
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200263config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
264 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
265 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
266 help
267 Some Rockchip BROM variants (e.g. on the RK3188) load the
268 first stage in segments and enter multiple times. E.g. on
269 the RK3188, the first 1KB of the first stage are loaded
270 first and entered; after returning to the BROM, the
271 remainder of the first stage is loaded, but the BROM
272 re-enters at the same address/to the same code as previously.
273
274 This enables support code in the BOOT0 hook for the SPL stage
275 to allow multiple entries.
276
277config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
278 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
279 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
280 help
281 Some Rockchip BROM variants (e.g. on the RK3188) load the
282 first stage in segments and enter multiple times. E.g. on
283 the RK3188, the first 1KB of the first stage are loaded
284 first and entered; after returning to the BROM, the
285 remainder of the first stage is loaded, but the BROM
286 re-enters at the same address/to the same code as previously.
287
288 This enables support code in the BOOT0 hook for the TPL stage
289 to allow multiple entries.
290
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400291config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200292 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400293
huang lin1115b642015-11-17 14:20:27 +0800294source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800295source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100296source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800297source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200298source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800299source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800300source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800301source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800302source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600303endif