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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangaa827752017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080037 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020038 select BOARD_LATE_INIT
Heiko Stübneref6db5e2017-02-18 19:46:36 +010039 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
45
Kever Yang57d4dbf2017-06-23 17:17:52 +080046config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053048 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080049 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080050 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080051 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080052 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080062 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080063 select TPL_LIBCOMMON_SUPPORT
64 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080065 help
66 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
67 including NEON and GPU, Mali-400 graphics, several DDR3 options
68 and video codec support. Peripherals include Gigabit Ethernet,
69 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
70
Simon Glass2cffe662015-08-30 16:55:38 -060071config ROCKCHIP_RK3288
72 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053073 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080074 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080075 select SUPPORT_SPL
76 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080077 select SUPPORT_TPL
Kever Yangf7c0a332019-07-02 11:43:05 +080078 imply TPL_CLK
79 imply TPL_DM
80 imply TPL_DRIVERS_MISC_SUPPORT
81 imply TPL_LIBCOMMON_SUPPORT
82 imply TPL_LIBGENERIC_SUPPORT
83 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +080084 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +080085 imply TPL_OF_CONTROL
86 imply TPL_OF_PLATDATA
87 imply TPL_RAM
88 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +080089 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080090 imply TPL_SERIAL_SUPPORT
91 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +080092 imply USB_FUNCTION_ROCKUSB
93 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060094 help
95 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
96 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
97 video interfaces supporting HDMI and eDP, several DDR3 options
98 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +010099 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600100
Kever Yangec02b3c2017-02-23 15:37:51 +0800101config ROCKCHIP_RK3328
102 bool "Support Rockchip RK3328"
103 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300104 select SUPPORT_SPL
105 select SPL
106 imply SPL_SERIAL_SUPPORT
107 imply SPL_SEPARATE_BSS
108 select ENABLE_ARM_SOC_BOOT0_HOOK
109 select DEBUG_UART_BOARD_INIT
110 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800111 help
112 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
113 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
114 video interfaces supporting HDMI and eDP, several DDR3 options
115 and video codec support. Peripherals include Gigabit Ethernet,
116 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
117
Andreas Färber9e3ad682017-05-15 17:51:18 +0800118config ROCKCHIP_RK3368
119 bool "Support Rockchip RK3368"
120 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200121 select SUPPORT_SPL
122 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200123 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
124 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200125 imply SPL_SEPARATE_BSS
126 imply SPL_SERIAL_SUPPORT
127 imply TPL_SERIAL_SUPPORT
Kever Yang48831b22019-07-09 22:05:58 +0800128 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800129 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200130 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
131 into a big and little cluster with 4 cores each) Cortex-A53 including
132 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
133 (for the little cluster), PowerVR G6110 based graphics, one video
134 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
135 video codec support.
136
137 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
138 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800139
Kever Yang0d3d7832016-07-19 21:16:59 +0800140config ROCKCHIP_RK3399
141 bool "Support Rockchip RK3399"
142 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800143 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800144 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800145 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530146 select SPL_ATF
147 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530148 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530149 select SPL_LOAD_FIT
150 select SPL_CLK if SPL
151 select SPL_PINCTRL if SPL
152 select SPL_RAM if SPL
153 select SPL_REGMAP if SPL
154 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800155 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
156 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800157 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200158 select SPL_SERIAL_SUPPORT
159 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530160 select CLK
161 select FIT
162 select PINCTRL
163 select RAM
164 select REGMAP
165 select SYSCON
166 select DM_PMIC
167 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800168 select BOARD_LATE_INIT
Kever Yangfca798d2018-11-09 11:18:15 +0800169 imply TPL_SERIAL_SUPPORT
170 imply TPL_LIBCOMMON_SUPPORT
171 imply TPL_LIBGENERIC_SUPPORT
172 imply TPL_SYS_MALLOC_SIMPLE
Kever Yangfca798d2018-11-09 11:18:15 +0800173 imply TPL_DRIVERS_MISC_SUPPORT
174 imply TPL_OF_CONTROL
175 imply TPL_DM
176 imply TPL_REGMAP
177 imply TPL_SYSCON
178 imply TPL_RAM
179 imply TPL_CLK
180 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800181 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang0d3d7832016-07-19 21:16:59 +0800182 help
183 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
184 and quad-core Cortex-A53.
185 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
186 video interfaces supporting HDMI and eDP, several DDR3 options
187 and video codec support. Peripherals include Gigabit Ethernet,
188 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
189
Andy Yan2d982da2017-06-01 18:00:55 +0800190config ROCKCHIP_RV1108
191 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530192 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800193 help
194 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
195 and a DSP.
196
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200197config ROCKCHIP_USB_UART
198 bool "Route uart output to usb pins"
199 help
200 Rockchip SoCs have the ability to route the signals of the debug
201 uart through the d+ and d- pins of a specific usb phy to enable
202 some form of closed-case debugging. With this option supported
203 SoCs will enable this routing as a debug measure.
204
Philipp Tomsich798370f2017-06-29 11:21:15 +0200205config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800206 bool "SPL returns to bootrom"
207 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100208 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800209 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200210 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800211 help
212 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
213 SPL will return to the boot rom, which will then load the U-Boot
214 binary to keep going on.
215
Philipp Tomsich798370f2017-06-29 11:21:15 +0200216config TPL_ROCKCHIP_BACK_TO_BROM
217 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800218 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200219 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800220 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200221 depends on TPL
222 help
223 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
224 SPL will return to the boot rom, which will then load the U-Boot
225 binary to keep going on.
226
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800227config SPL_ROCKCHIP_COMMON_BOARD
228 bool "Rockchip SPL common board file"
229 depends on SPL
230 help
231 Rockchip SoCs have similar boot process, SPL is mainly in charge of
232 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
233 no TPL for the board.
234
Kever Yang34ead0f2019-07-09 22:05:55 +0800235config TPL_ROCKCHIP_COMMON_BOARD
236 bool ""
237 depends on TPL
238 help
239 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
240 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
241 common board is a basic TPL board init which can be shared for most
242 of SoCs to avoid copy-pase for different SoCs.
243
Andy Yan70378cb2017-10-11 15:00:16 +0800244config ROCKCHIP_BOOT_MODE_REG
245 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800246 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800247 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800248 according to the value from this register.
249
Kever Yange484f772017-04-20 17:03:46 +0800250config ROCKCHIP_SPL_RESERVE_IRAM
251 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800252 default 0
Kever Yange484f772017-04-20 17:03:46 +0800253 help
254 SPL may need reserve memory for firmware loaded by SPL, whose load
255 address is in IRAM and may overlay with SPL text area if not
256 reserved.
257
Heiko Stübner355a8802017-02-18 19:46:25 +0100258config ROCKCHIP_BROM_HELPER
259 bool
260
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200261config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
262 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
263 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
264 help
265 Some Rockchip BROM variants (e.g. on the RK3188) load the
266 first stage in segments and enter multiple times. E.g. on
267 the RK3188, the first 1KB of the first stage are loaded
268 first and entered; after returning to the BROM, the
269 remainder of the first stage is loaded, but the BROM
270 re-enters at the same address/to the same code as previously.
271
272 This enables support code in the BOOT0 hook for the SPL stage
273 to allow multiple entries.
274
275config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
276 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
277 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
278 help
279 Some Rockchip BROM variants (e.g. on the RK3188) load the
280 first stage in segments and enter multiple times. E.g. on
281 the RK3188, the first 1KB of the first stage are loaded
282 first and entered; after returning to the BROM, the
283 remainder of the first stage is loaded, but the BROM
284 re-enters at the same address/to the same code as previously.
285
286 This enables support code in the BOOT0 hook for the TPL stage
287 to allow multiple entries.
288
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400289config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200290 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400291
huang lin1115b642015-11-17 14:20:27 +0800292source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800293source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100294source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800295source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200296source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800297source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800298source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800299source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800300source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600301endif