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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangaa827752017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020037 select BOARD_LATE_INIT
Heiko Stübneref6db5e2017-02-18 19:46:36 +010038 select ROCKCHIP_BROM_HELPER
39 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
45
Kever Yang57d4dbf2017-06-23 17:17:52 +080046config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053048 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080049 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080050 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080051 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080052 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080062 select ROCKCHIP_BROM_HELPER
Kever Yangaff40c62019-04-02 20:41:24 +080063 select TPL_LIBCOMMON_SUPPORT
64 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080065 help
66 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
67 including NEON and GPU, Mali-400 graphics, several DDR3 options
68 and video codec support. Peripherals include Gigabit Ethernet,
69 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
70
Kever Yangaff40c62019-04-02 20:41:24 +080071if ROCKCHIP_RK322X
72
73config TPL_TEXT_BASE
74 default 0x10081000
75
76config TPL_MAX_SIZE
77 default 28672
78
79config TPL_STACK
80 default 0x10088000
81
82endif
83
Simon Glass2cffe662015-08-30 16:55:38 -060084config ROCKCHIP_RK3288
85 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053086 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080087 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080088 select SUPPORT_SPL
89 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080090 select SUPPORT_TPL
91 imply TPL_BOOTROM_SUPPORT
92 imply TPL_CLK
93 imply TPL_DM
94 imply TPL_DRIVERS_MISC_SUPPORT
95 imply TPL_LIBCOMMON_SUPPORT
96 imply TPL_LIBGENERIC_SUPPORT
97 imply TPL_NEEDS_SEPARATE_TEXT_BASE
98 imply TPL_OF_CONTROL
99 imply TPL_OF_PLATDATA
100 imply TPL_RAM
101 imply TPL_REGMAP
102 imply TPL_SERIAL_SUPPORT
103 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +0800104 imply USB_FUNCTION_ROCKUSB
105 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -0600106 help
107 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
108 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
109 video interfaces supporting HDMI and eDP, several DDR3 options
110 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100111 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600112
Jagan Tekie5df8342018-02-23 13:13:10 +0530113if ROCKCHIP_RK3288
114
Jagan Teki843ac352018-02-23 13:13:11 +0530115config TPL_TEXT_BASE
116 default 0xff704000
117
Tom Rinie34a2f32019-01-22 17:09:25 -0500118config TPL_MAX_SIZE
119 default 32768
120
Jagan Tekie5df8342018-02-23 13:13:10 +0530121endif
122
Kever Yangec02b3c2017-02-23 15:37:51 +0800123config ROCKCHIP_RK3328
124 bool "Support Rockchip RK3328"
125 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300126 select SUPPORT_SPL
127 select SPL
128 imply SPL_SERIAL_SUPPORT
129 imply SPL_SEPARATE_BSS
130 select ENABLE_ARM_SOC_BOOT0_HOOK
131 select DEBUG_UART_BOARD_INIT
132 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800133 help
134 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
135 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
136 video interfaces supporting HDMI and eDP, several DDR3 options
137 and video codec support. Peripherals include Gigabit Ethernet,
138 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
139
Andreas Färber9e3ad682017-05-15 17:51:18 +0800140config ROCKCHIP_RK3368
141 bool "Support Rockchip RK3368"
142 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200143 select SUPPORT_SPL
144 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200145 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
146 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200147 imply SPL_SEPARATE_BSS
148 imply SPL_SERIAL_SUPPORT
149 imply TPL_SERIAL_SUPPORT
Andreas Färber9e3ad682017-05-15 17:51:18 +0800150 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200151 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
152 into a big and little cluster with 4 cores each) Cortex-A53 including
153 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
154 (for the little cluster), PowerVR G6110 based graphics, one video
155 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
156 video codec support.
157
158 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
159 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800160
Philipp Tomsichcbacb402017-08-02 21:26:18 +0200161if ROCKCHIP_RK3368
162
Philipp Tomsich7d1319b2017-07-28 20:20:41 +0200163config TPL_TEXT_BASE
164 default 0xff8c1000
165
166config TPL_MAX_SIZE
167 default 28672
168
169config TPL_STACK
170 default 0xff8cffff
171
Philipp Tomsichcbacb402017-08-02 21:26:18 +0200172endif
173
Kever Yang0d3d7832016-07-19 21:16:59 +0800174config ROCKCHIP_RK3399
175 bool "Support Rockchip RK3399"
176 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800177 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800178 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800179 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530180 select SPL_ATF
181 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530182 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530183 select SPL_LOAD_FIT
184 select SPL_CLK if SPL
185 select SPL_PINCTRL if SPL
186 select SPL_RAM if SPL
187 select SPL_REGMAP if SPL
188 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800189 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
190 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800191 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200192 select SPL_SERIAL_SUPPORT
193 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530194 select CLK
195 select FIT
196 select PINCTRL
197 select RAM
198 select REGMAP
199 select SYSCON
200 select DM_PMIC
201 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800202 select BOARD_LATE_INIT
Andy Yand2349d92017-10-11 15:00:49 +0800203 select ROCKCHIP_BROM_HELPER
Kever Yangfca798d2018-11-09 11:18:15 +0800204 imply TPL_SERIAL_SUPPORT
205 imply TPL_LIBCOMMON_SUPPORT
206 imply TPL_LIBGENERIC_SUPPORT
207 imply TPL_SYS_MALLOC_SIMPLE
Jagan Teki64a44b82019-06-21 00:25:06 +0530208 imply TPL_BOARD_INIT
Kever Yangfca798d2018-11-09 11:18:15 +0800209 imply TPL_BOOTROM_SUPPORT
210 imply TPL_DRIVERS_MISC_SUPPORT
211 imply TPL_OF_CONTROL
212 imply TPL_DM
213 imply TPL_REGMAP
214 imply TPL_SYSCON
215 imply TPL_RAM
216 imply TPL_CLK
217 imply TPL_TINY_MEMSET
Kever Yang0d3d7832016-07-19 21:16:59 +0800218 help
219 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
220 and quad-core Cortex-A53.
221 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
222 video interfaces supporting HDMI and eDP, several DDR3 options
223 and video codec support. Peripherals include Gigabit Ethernet,
224 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
225
Kever Yangfca798d2018-11-09 11:18:15 +0800226if ROCKCHIP_RK3399
227
228config TPL_LDSCRIPT
229 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
230
231config TPL_TEXT_BASE
232 default 0xff8c2000
233
234config TPL_MAX_SIZE
235 default 188416
236
237config TPL_STACK
238 default 0xff8effff
239
240endif
241
Andy Yan2d982da2017-06-01 18:00:55 +0800242config ROCKCHIP_RV1108
243 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530244 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800245 help
246 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
247 and a DSP.
248
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200249config ROCKCHIP_USB_UART
250 bool "Route uart output to usb pins"
251 help
252 Rockchip SoCs have the ability to route the signals of the debug
253 uart through the d+ and d- pins of a specific usb phy to enable
254 some form of closed-case debugging. With this option supported
255 SoCs will enable this routing as a debug measure.
256
Philipp Tomsich798370f2017-06-29 11:21:15 +0200257config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800258 bool "SPL returns to bootrom"
259 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100260 select ROCKCHIP_BROM_HELPER
Philipp Tomsich798370f2017-06-29 11:21:15 +0200261 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800262 help
263 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
264 SPL will return to the boot rom, which will then load the U-Boot
265 binary to keep going on.
266
Philipp Tomsich798370f2017-06-29 11:21:15 +0200267config TPL_ROCKCHIP_BACK_TO_BROM
268 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800269 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200270 select ROCKCHIP_BROM_HELPER
271 depends on TPL
272 help
273 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
274 SPL will return to the boot rom, which will then load the U-Boot
275 binary to keep going on.
276
Andy Yan70378cb2017-10-11 15:00:16 +0800277config ROCKCHIP_BOOT_MODE_REG
278 hex "Rockchip boot mode flag register address"
279 default 0x200081c8 if ROCKCHIP_RK3036
280 default 0x20004040 if ROCKCHIP_RK3188
281 default 0x110005c8 if ROCKCHIP_RK322X
282 default 0xff730094 if ROCKCHIP_RK3288
283 default 0xff738200 if ROCKCHIP_RK3368
284 default 0xff320300 if ROCKCHIP_RK3399
285 default 0x10300580 if ROCKCHIP_RV1108
286 default 0
287 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800288 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800289 according to the value from this register.
290
Kever Yange484f772017-04-20 17:03:46 +0800291config ROCKCHIP_SPL_RESERVE_IRAM
292 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800293 default 0
Kever Yange484f772017-04-20 17:03:46 +0800294 help
295 SPL may need reserve memory for firmware loaded by SPL, whose load
296 address is in IRAM and may overlay with SPL text area if not
297 reserved.
298
Heiko Stübner355a8802017-02-18 19:46:25 +0100299config ROCKCHIP_BROM_HELPER
300 bool
301
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200302config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
303 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
304 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
305 help
306 Some Rockchip BROM variants (e.g. on the RK3188) load the
307 first stage in segments and enter multiple times. E.g. on
308 the RK3188, the first 1KB of the first stage are loaded
309 first and entered; after returning to the BROM, the
310 remainder of the first stage is loaded, but the BROM
311 re-enters at the same address/to the same code as previously.
312
313 This enables support code in the BOOT0 hook for the SPL stage
314 to allow multiple entries.
315
316config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
317 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
318 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
319 help
320 Some Rockchip BROM variants (e.g. on the RK3188) load the
321 first stage in segments and enter multiple times. E.g. on
322 the RK3188, the first 1KB of the first stage are loaded
323 first and entered; after returning to the BROM, the
324 remainder of the first stage is loaded, but the BROM
325 re-enters at the same address/to the same code as previously.
326
327 This enables support code in the BOOT0 hook for the TPL stage
328 to allow multiple entries.
329
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400330config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200331 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400332
huang lin1115b642015-11-17 14:20:27 +0800333source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800334source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100335source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800336source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200337source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800338source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800339source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800340source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800341source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600342endif