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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangaa827752017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020037 select BOARD_LATE_INIT
Heiko Stübneref6db5e2017-02-18 19:46:36 +010038 select ROCKCHIP_BROM_HELPER
39 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
45
Kever Yang57d4dbf2017-06-23 17:17:52 +080046config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053048 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080049 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080050 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080051 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080052 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080062 select ROCKCHIP_BROM_HELPER
Kever Yangaff40c62019-04-02 20:41:24 +080063 select TPL_LIBCOMMON_SUPPORT
64 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080065 help
66 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
67 including NEON and GPU, Mali-400 graphics, several DDR3 options
68 and video codec support. Peripherals include Gigabit Ethernet,
69 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
70
Kever Yangaff40c62019-04-02 20:41:24 +080071if ROCKCHIP_RK322X
72
73config TPL_TEXT_BASE
74 default 0x10081000
75
76config TPL_MAX_SIZE
77 default 28672
78
79config TPL_STACK
80 default 0x10088000
81
82endif
83
Simon Glass2cffe662015-08-30 16:55:38 -060084config ROCKCHIP_RK3288
85 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053086 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080087 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080088 select SUPPORT_SPL
89 select SPL
Eddie Caib3501fe2017-12-15 08:17:13 +080090 imply USB_FUNCTION_ROCKUSB
91 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060092 help
93 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
94 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
95 video interfaces supporting HDMI and eDP, several DDR3 options
96 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +010097 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -060098
Jagan Tekie5df8342018-02-23 13:13:10 +053099if ROCKCHIP_RK3288
100
Jagan Teki843ac352018-02-23 13:13:11 +0530101config TPL_TEXT_BASE
102 default 0xff704000
103
Tom Rinie34a2f32019-01-22 17:09:25 -0500104config TPL_MAX_SIZE
105 default 32768
106
Jagan Tekie5df8342018-02-23 13:13:10 +0530107endif
108
Kever Yangec02b3c2017-02-23 15:37:51 +0800109config ROCKCHIP_RK3328
110 bool "Support Rockchip RK3328"
111 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300112 select SUPPORT_SPL
113 select SPL
114 imply SPL_SERIAL_SUPPORT
115 imply SPL_SEPARATE_BSS
116 select ENABLE_ARM_SOC_BOOT0_HOOK
117 select DEBUG_UART_BOARD_INIT
118 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800119 help
120 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
121 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
122 video interfaces supporting HDMI and eDP, several DDR3 options
123 and video codec support. Peripherals include Gigabit Ethernet,
124 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
125
Andreas Färber9e3ad682017-05-15 17:51:18 +0800126config ROCKCHIP_RK3368
127 bool "Support Rockchip RK3368"
128 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200129 select SUPPORT_SPL
130 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200131 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
132 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200133 imply SPL_SEPARATE_BSS
134 imply SPL_SERIAL_SUPPORT
135 imply TPL_SERIAL_SUPPORT
Andreas Färber9e3ad682017-05-15 17:51:18 +0800136 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200137 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
138 into a big and little cluster with 4 cores each) Cortex-A53 including
139 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
140 (for the little cluster), PowerVR G6110 based graphics, one video
141 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
142 video codec support.
143
144 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
145 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800146
Philipp Tomsichcbacb402017-08-02 21:26:18 +0200147if ROCKCHIP_RK3368
148
Philipp Tomsich7d1319b2017-07-28 20:20:41 +0200149config TPL_TEXT_BASE
150 default 0xff8c1000
151
152config TPL_MAX_SIZE
153 default 28672
154
155config TPL_STACK
156 default 0xff8cffff
157
Philipp Tomsichcbacb402017-08-02 21:26:18 +0200158endif
159
Kever Yang0d3d7832016-07-19 21:16:59 +0800160config ROCKCHIP_RK3399
161 bool "Support Rockchip RK3399"
162 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800163 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800164 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800165 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530166 select SPL_ATF
167 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
168 select SPL_LOAD_FIT
169 select SPL_CLK if SPL
170 select SPL_PINCTRL if SPL
171 select SPL_RAM if SPL
172 select SPL_REGMAP if SPL
173 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800174 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
175 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800176 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200177 select SPL_SERIAL_SUPPORT
178 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530179 select CLK
180 select FIT
181 select PINCTRL
182 select RAM
183 select REGMAP
184 select SYSCON
185 select DM_PMIC
186 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800187 select BOARD_LATE_INIT
Andy Yand2349d92017-10-11 15:00:49 +0800188 select ROCKCHIP_BROM_HELPER
Kever Yangfca798d2018-11-09 11:18:15 +0800189 imply TPL_SERIAL_SUPPORT
190 imply TPL_LIBCOMMON_SUPPORT
191 imply TPL_LIBGENERIC_SUPPORT
192 imply TPL_SYS_MALLOC_SIMPLE
193 imply TPL_BOOTROM_SUPPORT
194 imply TPL_DRIVERS_MISC_SUPPORT
195 imply TPL_OF_CONTROL
196 imply TPL_DM
197 imply TPL_REGMAP
198 imply TPL_SYSCON
199 imply TPL_RAM
200 imply TPL_CLK
201 imply TPL_TINY_MEMSET
Kever Yang0d3d7832016-07-19 21:16:59 +0800202 help
203 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
204 and quad-core Cortex-A53.
205 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
206 video interfaces supporting HDMI and eDP, several DDR3 options
207 and video codec support. Peripherals include Gigabit Ethernet,
208 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
209
Kever Yangfca798d2018-11-09 11:18:15 +0800210if ROCKCHIP_RK3399
211
212config TPL_LDSCRIPT
213 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
214
215config TPL_TEXT_BASE
216 default 0xff8c2000
217
218config TPL_MAX_SIZE
219 default 188416
220
221config TPL_STACK
222 default 0xff8effff
223
224endif
225
Andy Yan2d982da2017-06-01 18:00:55 +0800226config ROCKCHIP_RV1108
227 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530228 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800229 help
230 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
231 and a DSP.
232
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200233config ROCKCHIP_USB_UART
234 bool "Route uart output to usb pins"
235 help
236 Rockchip SoCs have the ability to route the signals of the debug
237 uart through the d+ and d- pins of a specific usb phy to enable
238 some form of closed-case debugging. With this option supported
239 SoCs will enable this routing as a debug measure.
240
Philipp Tomsich798370f2017-06-29 11:21:15 +0200241config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800242 bool "SPL returns to bootrom"
243 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100244 select ROCKCHIP_BROM_HELPER
Philipp Tomsich798370f2017-06-29 11:21:15 +0200245 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800246 help
247 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
248 SPL will return to the boot rom, which will then load the U-Boot
249 binary to keep going on.
250
Philipp Tomsich798370f2017-06-29 11:21:15 +0200251config TPL_ROCKCHIP_BACK_TO_BROM
252 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800253 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200254 select ROCKCHIP_BROM_HELPER
255 depends on TPL
256 help
257 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
258 SPL will return to the boot rom, which will then load the U-Boot
259 binary to keep going on.
260
Andy Yan70378cb2017-10-11 15:00:16 +0800261config ROCKCHIP_BOOT_MODE_REG
262 hex "Rockchip boot mode flag register address"
263 default 0x200081c8 if ROCKCHIP_RK3036
264 default 0x20004040 if ROCKCHIP_RK3188
265 default 0x110005c8 if ROCKCHIP_RK322X
266 default 0xff730094 if ROCKCHIP_RK3288
267 default 0xff738200 if ROCKCHIP_RK3368
268 default 0xff320300 if ROCKCHIP_RK3399
269 default 0x10300580 if ROCKCHIP_RV1108
270 default 0
271 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800272 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800273 according to the value from this register.
274
Kever Yange484f772017-04-20 17:03:46 +0800275config ROCKCHIP_SPL_RESERVE_IRAM
276 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800277 default 0
Kever Yange484f772017-04-20 17:03:46 +0800278 help
279 SPL may need reserve memory for firmware loaded by SPL, whose load
280 address is in IRAM and may overlay with SPL text area if not
281 reserved.
282
Heiko Stübner355a8802017-02-18 19:46:25 +0100283config ROCKCHIP_BROM_HELPER
284 bool
285
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200286config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
287 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
288 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
289 help
290 Some Rockchip BROM variants (e.g. on the RK3188) load the
291 first stage in segments and enter multiple times. E.g. on
292 the RK3188, the first 1KB of the first stage are loaded
293 first and entered; after returning to the BROM, the
294 remainder of the first stage is loaded, but the BROM
295 re-enters at the same address/to the same code as previously.
296
297 This enables support code in the BOOT0 hook for the SPL stage
298 to allow multiple entries.
299
300config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
301 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
302 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
303 help
304 Some Rockchip BROM variants (e.g. on the RK3188) load the
305 first stage in segments and enter multiple times. E.g. on
306 the RK3188, the first 1KB of the first stage are loaded
307 first and entered; after returning to the BROM, the
308 remainder of the first stage is loaded, but the BROM
309 re-enters at the same address/to the same code as previously.
310
311 This enables support code in the BOOT0 hook for the TPL stage
312 to allow multiple entries.
313
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400314config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200315 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400316
huang lin1115b642015-11-17 14:20:27 +0800317source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800318source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100319source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800320source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200321source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800322source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800323source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800324source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800325source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600326endif