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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangaa827752017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020037 select BOARD_LATE_INIT
Heiko Stübneref6db5e2017-02-18 19:46:36 +010038 select ROCKCHIP_BROM_HELPER
39 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
45
Kever Yang57d4dbf2017-06-23 17:17:52 +080046config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053048 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080049 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080050 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080051 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080052 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
Kever Yang5bf79c22019-07-16 20:40:17 +080062 imply TPL_BOOTROM_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080063 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang57d4dbf2017-06-23 17:17:52 +080064 select ROCKCHIP_BROM_HELPER
Kever Yangaff40c62019-04-02 20:41:24 +080065 select TPL_LIBCOMMON_SUPPORT
66 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080067 help
68 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
69 including NEON and GPU, Mali-400 graphics, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
71 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
72
Simon Glass2cffe662015-08-30 16:55:38 -060073config ROCKCHIP_RK3288
74 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053075 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080076 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080077 select SUPPORT_SPL
78 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080079 select SUPPORT_TPL
80 imply TPL_BOOTROM_SUPPORT
81 imply TPL_CLK
82 imply TPL_DM
83 imply TPL_DRIVERS_MISC_SUPPORT
84 imply TPL_LIBCOMMON_SUPPORT
85 imply TPL_LIBGENERIC_SUPPORT
86 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +080087 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +080088 imply TPL_OF_CONTROL
89 imply TPL_OF_PLATDATA
90 imply TPL_RAM
91 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +080092 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080093 imply TPL_SERIAL_SUPPORT
94 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +080095 imply USB_FUNCTION_ROCKUSB
96 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060097 help
98 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
99 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
100 video interfaces supporting HDMI and eDP, several DDR3 options
101 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100102 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600103
Kever Yangec02b3c2017-02-23 15:37:51 +0800104config ROCKCHIP_RK3328
105 bool "Support Rockchip RK3328"
106 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300107 select SUPPORT_SPL
108 select SPL
109 imply SPL_SERIAL_SUPPORT
110 imply SPL_SEPARATE_BSS
111 select ENABLE_ARM_SOC_BOOT0_HOOK
112 select DEBUG_UART_BOARD_INIT
113 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800114 help
115 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
116 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
117 video interfaces supporting HDMI and eDP, several DDR3 options
118 and video codec support. Peripherals include Gigabit Ethernet,
119 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
120
Andreas Färber9e3ad682017-05-15 17:51:18 +0800121config ROCKCHIP_RK3368
122 bool "Support Rockchip RK3368"
123 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200124 select SUPPORT_SPL
125 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200126 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
127 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200128 imply SPL_SEPARATE_BSS
129 imply SPL_SERIAL_SUPPORT
130 imply TPL_SERIAL_SUPPORT
Kever Yang48831b22019-07-09 22:05:58 +0800131 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800132 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200133 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
134 into a big and little cluster with 4 cores each) Cortex-A53 including
135 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
136 (for the little cluster), PowerVR G6110 based graphics, one video
137 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
138 video codec support.
139
140 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
141 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800142
Kever Yang0d3d7832016-07-19 21:16:59 +0800143config ROCKCHIP_RK3399
144 bool "Support Rockchip RK3399"
145 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800146 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800147 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800148 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530149 select SPL_ATF
150 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530151 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530152 select SPL_LOAD_FIT
153 select SPL_CLK if SPL
154 select SPL_PINCTRL if SPL
155 select SPL_RAM if SPL
156 select SPL_REGMAP if SPL
157 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800158 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
159 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800160 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200161 select SPL_SERIAL_SUPPORT
162 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530163 select CLK
164 select FIT
165 select PINCTRL
166 select RAM
167 select REGMAP
168 select SYSCON
169 select DM_PMIC
170 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800171 select BOARD_LATE_INIT
Andy Yand2349d92017-10-11 15:00:49 +0800172 select ROCKCHIP_BROM_HELPER
Kever Yangfca798d2018-11-09 11:18:15 +0800173 imply TPL_SERIAL_SUPPORT
174 imply TPL_LIBCOMMON_SUPPORT
175 imply TPL_LIBGENERIC_SUPPORT
176 imply TPL_SYS_MALLOC_SIMPLE
177 imply TPL_BOOTROM_SUPPORT
178 imply TPL_DRIVERS_MISC_SUPPORT
179 imply TPL_OF_CONTROL
180 imply TPL_DM
181 imply TPL_REGMAP
182 imply TPL_SYSCON
183 imply TPL_RAM
184 imply TPL_CLK
185 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800186 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang0d3d7832016-07-19 21:16:59 +0800187 help
188 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
189 and quad-core Cortex-A53.
190 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
191 video interfaces supporting HDMI and eDP, several DDR3 options
192 and video codec support. Peripherals include Gigabit Ethernet,
193 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
194
Andy Yan2d982da2017-06-01 18:00:55 +0800195config ROCKCHIP_RV1108
196 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530197 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800198 help
199 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
200 and a DSP.
201
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200202config ROCKCHIP_USB_UART
203 bool "Route uart output to usb pins"
204 help
205 Rockchip SoCs have the ability to route the signals of the debug
206 uart through the d+ and d- pins of a specific usb phy to enable
207 some form of closed-case debugging. With this option supported
208 SoCs will enable this routing as a debug measure.
209
Philipp Tomsich798370f2017-06-29 11:21:15 +0200210config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800211 bool "SPL returns to bootrom"
212 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100213 select ROCKCHIP_BROM_HELPER
Philipp Tomsich798370f2017-06-29 11:21:15 +0200214 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800215 help
216 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
217 SPL will return to the boot rom, which will then load the U-Boot
218 binary to keep going on.
219
Philipp Tomsich798370f2017-06-29 11:21:15 +0200220config TPL_ROCKCHIP_BACK_TO_BROM
221 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800222 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200223 select ROCKCHIP_BROM_HELPER
224 depends on TPL
225 help
226 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
227 SPL will return to the boot rom, which will then load the U-Boot
228 binary to keep going on.
229
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800230config SPL_ROCKCHIP_COMMON_BOARD
231 bool "Rockchip SPL common board file"
232 depends on SPL
233 help
234 Rockchip SoCs have similar boot process, SPL is mainly in charge of
235 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
236 no TPL for the board.
237
Kever Yang34ead0f2019-07-09 22:05:55 +0800238config TPL_ROCKCHIP_COMMON_BOARD
239 bool ""
240 depends on TPL
241 help
242 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
243 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
244 common board is a basic TPL board init which can be shared for most
245 of SoCs to avoid copy-pase for different SoCs.
246
Andy Yan70378cb2017-10-11 15:00:16 +0800247config ROCKCHIP_BOOT_MODE_REG
248 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800249 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800250 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800251 according to the value from this register.
252
Kever Yange484f772017-04-20 17:03:46 +0800253config ROCKCHIP_SPL_RESERVE_IRAM
254 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800255 default 0
Kever Yange484f772017-04-20 17:03:46 +0800256 help
257 SPL may need reserve memory for firmware loaded by SPL, whose load
258 address is in IRAM and may overlay with SPL text area if not
259 reserved.
260
Heiko Stübner355a8802017-02-18 19:46:25 +0100261config ROCKCHIP_BROM_HELPER
262 bool
263
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200264config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
265 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
266 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
267 help
268 Some Rockchip BROM variants (e.g. on the RK3188) load the
269 first stage in segments and enter multiple times. E.g. on
270 the RK3188, the first 1KB of the first stage are loaded
271 first and entered; after returning to the BROM, the
272 remainder of the first stage is loaded, but the BROM
273 re-enters at the same address/to the same code as previously.
274
275 This enables support code in the BOOT0 hook for the SPL stage
276 to allow multiple entries.
277
278config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
279 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
280 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
281 help
282 Some Rockchip BROM variants (e.g. on the RK3188) load the
283 first stage in segments and enter multiple times. E.g. on
284 the RK3188, the first 1KB of the first stage are loaded
285 first and entered; after returning to the BROM, the
286 remainder of the first stage is loaded, but the BROM
287 re-enters at the same address/to the same code as previously.
288
289 This enables support code in the BOOT0 hook for the TPL stage
290 to allow multiple entries.
291
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400292config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200293 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400294
huang lin1115b642015-11-17 14:20:27 +0800295source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800296source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100297source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800298source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200299source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800300source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800301source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800302source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800303source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600304endif