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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangaa827752017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020037 select BOARD_LATE_INIT
Heiko Stübneref6db5e2017-02-18 19:46:36 +010038 select ROCKCHIP_BROM_HELPER
39 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
45
Kever Yang57d4dbf2017-06-23 17:17:52 +080046config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053048 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080049 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080050 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080051 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080052 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080062 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang57d4dbf2017-06-23 17:17:52 +080063 select ROCKCHIP_BROM_HELPER
Kever Yangaff40c62019-04-02 20:41:24 +080064 select TPL_LIBCOMMON_SUPPORT
65 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080066 help
67 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
68 including NEON and GPU, Mali-400 graphics, several DDR3 options
69 and video codec support. Peripherals include Gigabit Ethernet,
70 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
71
Simon Glass2cffe662015-08-30 16:55:38 -060072config ROCKCHIP_RK3288
73 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053074 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080075 select SPL_BOARD_INIT if SPL
Kever Yang0d3d7832016-07-19 21:16:59 +080076 select SUPPORT_SPL
77 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080078 select SUPPORT_TPL
79 imply TPL_BOOTROM_SUPPORT
80 imply TPL_CLK
81 imply TPL_DM
82 imply TPL_DRIVERS_MISC_SUPPORT
83 imply TPL_LIBCOMMON_SUPPORT
84 imply TPL_LIBGENERIC_SUPPORT
85 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +080086 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +080087 imply TPL_OF_CONTROL
88 imply TPL_OF_PLATDATA
89 imply TPL_RAM
90 imply TPL_REGMAP
91 imply TPL_SERIAL_SUPPORT
92 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +080093 imply USB_FUNCTION_ROCKUSB
94 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060095 help
96 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
97 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
98 video interfaces supporting HDMI and eDP, several DDR3 options
99 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100100 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600101
Kever Yangec02b3c2017-02-23 15:37:51 +0800102config ROCKCHIP_RK3328
103 bool "Support Rockchip RK3328"
104 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300105 select SUPPORT_SPL
106 select SPL
107 imply SPL_SERIAL_SUPPORT
108 imply SPL_SEPARATE_BSS
109 select ENABLE_ARM_SOC_BOOT0_HOOK
110 select DEBUG_UART_BOARD_INIT
111 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800112 help
113 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
114 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
115 video interfaces supporting HDMI and eDP, several DDR3 options
116 and video codec support. Peripherals include Gigabit Ethernet,
117 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
118
Andreas Färber9e3ad682017-05-15 17:51:18 +0800119config ROCKCHIP_RK3368
120 bool "Support Rockchip RK3368"
121 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200122 select SUPPORT_SPL
123 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200124 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
125 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200126 imply SPL_SEPARATE_BSS
127 imply SPL_SERIAL_SUPPORT
128 imply TPL_SERIAL_SUPPORT
Andreas Färber9e3ad682017-05-15 17:51:18 +0800129 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200130 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
131 into a big and little cluster with 4 cores each) Cortex-A53 including
132 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
133 (for the little cluster), PowerVR G6110 based graphics, one video
134 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
135 video codec support.
136
137 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
138 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800139
Kever Yang0d3d7832016-07-19 21:16:59 +0800140config ROCKCHIP_RK3399
141 bool "Support Rockchip RK3399"
142 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800143 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800144 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800145 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530146 select SPL_ATF
147 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530148 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530149 select SPL_LOAD_FIT
150 select SPL_CLK if SPL
151 select SPL_PINCTRL if SPL
152 select SPL_RAM if SPL
153 select SPL_REGMAP if SPL
154 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800155 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
156 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800157 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200158 select SPL_SERIAL_SUPPORT
159 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530160 select CLK
161 select FIT
162 select PINCTRL
163 select RAM
164 select REGMAP
165 select SYSCON
166 select DM_PMIC
167 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800168 select BOARD_LATE_INIT
Andy Yand2349d92017-10-11 15:00:49 +0800169 select ROCKCHIP_BROM_HELPER
Kever Yangfca798d2018-11-09 11:18:15 +0800170 imply TPL_SERIAL_SUPPORT
171 imply TPL_LIBCOMMON_SUPPORT
172 imply TPL_LIBGENERIC_SUPPORT
173 imply TPL_SYS_MALLOC_SIMPLE
Jagan Teki64a44b82019-06-21 00:25:06 +0530174 imply TPL_BOARD_INIT
Kever Yangfca798d2018-11-09 11:18:15 +0800175 imply TPL_BOOTROM_SUPPORT
176 imply TPL_DRIVERS_MISC_SUPPORT
177 imply TPL_OF_CONTROL
178 imply TPL_DM
179 imply TPL_REGMAP
180 imply TPL_SYSCON
181 imply TPL_RAM
182 imply TPL_CLK
183 imply TPL_TINY_MEMSET
Kever Yang0d3d7832016-07-19 21:16:59 +0800184 help
185 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
186 and quad-core Cortex-A53.
187 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
188 video interfaces supporting HDMI and eDP, several DDR3 options
189 and video codec support. Peripherals include Gigabit Ethernet,
190 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
191
Andy Yan2d982da2017-06-01 18:00:55 +0800192config ROCKCHIP_RV1108
193 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530194 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800195 help
196 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
197 and a DSP.
198
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200199config ROCKCHIP_USB_UART
200 bool "Route uart output to usb pins"
201 help
202 Rockchip SoCs have the ability to route the signals of the debug
203 uart through the d+ and d- pins of a specific usb phy to enable
204 some form of closed-case debugging. With this option supported
205 SoCs will enable this routing as a debug measure.
206
Philipp Tomsich798370f2017-06-29 11:21:15 +0200207config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800208 bool "SPL returns to bootrom"
209 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100210 select ROCKCHIP_BROM_HELPER
Philipp Tomsich798370f2017-06-29 11:21:15 +0200211 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800212 help
213 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
214 SPL will return to the boot rom, which will then load the U-Boot
215 binary to keep going on.
216
Philipp Tomsich798370f2017-06-29 11:21:15 +0200217config TPL_ROCKCHIP_BACK_TO_BROM
218 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800219 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200220 select ROCKCHIP_BROM_HELPER
221 depends on TPL
222 help
223 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
224 SPL will return to the boot rom, which will then load the U-Boot
225 binary to keep going on.
226
Kever Yang34ead0f2019-07-09 22:05:55 +0800227config TPL_ROCKCHIP_COMMON_BOARD
228 bool ""
229 depends on TPL
230 help
231 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
232 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
233 common board is a basic TPL board init which can be shared for most
234 of SoCs to avoid copy-pase for different SoCs.
235
Andy Yan70378cb2017-10-11 15:00:16 +0800236config ROCKCHIP_BOOT_MODE_REG
237 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800238 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800239 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800240 according to the value from this register.
241
Kever Yange484f772017-04-20 17:03:46 +0800242config ROCKCHIP_SPL_RESERVE_IRAM
243 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800244 default 0
Kever Yange484f772017-04-20 17:03:46 +0800245 help
246 SPL may need reserve memory for firmware loaded by SPL, whose load
247 address is in IRAM and may overlay with SPL text area if not
248 reserved.
249
Heiko Stübner355a8802017-02-18 19:46:25 +0100250config ROCKCHIP_BROM_HELPER
251 bool
252
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200253config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
254 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
255 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
256 help
257 Some Rockchip BROM variants (e.g. on the RK3188) load the
258 first stage in segments and enter multiple times. E.g. on
259 the RK3188, the first 1KB of the first stage are loaded
260 first and entered; after returning to the BROM, the
261 remainder of the first stage is loaded, but the BROM
262 re-enters at the same address/to the same code as previously.
263
264 This enables support code in the BOOT0 hook for the SPL stage
265 to allow multiple entries.
266
267config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
268 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
269 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
270 help
271 Some Rockchip BROM variants (e.g. on the RK3188) load the
272 first stage in segments and enter multiple times. E.g. on
273 the RK3188, the first 1KB of the first stage are loaded
274 first and entered; after returning to the BROM, the
275 remainder of the first stage is loaded, but the BROM
276 re-enters at the same address/to the same code as previously.
277
278 This enables support code in the BOOT0 hook for the TPL stage
279 to allow multiple entries.
280
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400281config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200282 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400283
huang lin1115b642015-11-17 14:20:27 +0800284source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800285source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100286source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800287source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200288source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800289source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800290source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800291source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800292source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600293endif