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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Kever Yang427cb672019-07-22 20:02:04 +080010 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020011 help
12 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
13 including NEON and GPU, Mali-400 graphics, several DDR3 options
14 and video codec support. Peripherals include Gigabit Ethernet,
15 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16
Kever Yangaa827752017-11-28 16:04:16 +080017config ROCKCHIP_RK3128
18 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053019 select CPU_V7A
Kever Yang96362722019-07-22 20:02:05 +080020 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa827752017-11-28 16:04:16 +080021 help
22 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
23 including NEON and GPU, Mali-400 graphics, several DDR3 options
24 and video codec support. Peripherals include Gigabit Ethernet,
25 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
26
Heiko Stübneref6db5e2017-02-18 19:46:36 +010027config ROCKCHIP_RK3188
28 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053029 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080030 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010031 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010032 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020033 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020034 select SPL_REGMAP
35 select SPL_SYSCON
36 select SPL_RAM
37 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020038 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080039 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020040 select BOARD_LATE_INIT
Kever Yang3bd90402019-07-22 19:59:18 +080041 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübneref6db5e2017-02-18 19:46:36 +010042 help
43 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
44 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
45 video interfaces, several memory options and video codec support.
46 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
47 UART, SPI, I2C and PWMs.
48
Kever Yang57d4dbf2017-06-23 17:17:52 +080049config ROCKCHIP_RK322X
50 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053051 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080052 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080053 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080054 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080055 select SPL_DM
56 select SPL_OF_LIBFDT
57 select TPL
58 select TPL_DM
59 select TPL_OF_LIBFDT
60 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
61 select TPL_NEEDS_SEPARATE_STACK if TPL
62 select SPL_DRIVERS_MISC_SUPPORT
Kever Yang0b517732019-07-22 20:02:07 +080063 imply ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080064 imply SPL_SERIAL_SUPPORT
Kever Yangd877fd22019-07-22 19:59:20 +080065 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080066 imply TPL_SERIAL_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080067 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080068 select TPL_LIBCOMMON_SUPPORT
69 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080070 help
71 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
72 including NEON and GPU, Mali-400 graphics, several DDR3 options
73 and video codec support. Peripherals include Gigabit Ethernet,
74 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
75
Simon Glass2cffe662015-08-30 16:55:38 -060076config ROCKCHIP_RK3288
77 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053078 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +080079 select SUPPORT_SPL
80 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080081 select SUPPORT_TPL
Kever Yangaa67deb2019-07-22 19:59:27 +080082 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080083 imply TPL_CLK
84 imply TPL_DM
85 imply TPL_DRIVERS_MISC_SUPPORT
86 imply TPL_LIBCOMMON_SUPPORT
87 imply TPL_LIBGENERIC_SUPPORT
88 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +080089 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +080090 imply TPL_OF_CONTROL
91 imply TPL_OF_PLATDATA
92 imply TPL_RAM
93 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +080094 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080095 imply TPL_SERIAL_SUPPORT
96 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +080097 imply USB_FUNCTION_ROCKUSB
98 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060099 help
100 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
101 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
102 video interfaces supporting HDMI and eDP, several DDR3 options
103 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100104 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600105
Kever Yangec02b3c2017-02-23 15:37:51 +0800106config ROCKCHIP_RK3328
107 bool "Support Rockchip RK3328"
108 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300109 select SUPPORT_SPL
110 select SPL
Kever Yangbb4c3252019-07-22 19:59:32 +0800111 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yang07be6692019-06-09 00:27:15 +0300112 imply SPL_SERIAL_SUPPORT
113 imply SPL_SEPARATE_BSS
114 select ENABLE_ARM_SOC_BOOT0_HOOK
115 select DEBUG_UART_BOARD_INIT
116 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800117 help
118 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
119 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
120 video interfaces supporting HDMI and eDP, several DDR3 options
121 and video codec support. Peripherals include Gigabit Ethernet,
122 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
123
Andreas Färber9e3ad682017-05-15 17:51:18 +0800124config ROCKCHIP_RK3368
125 bool "Support Rockchip RK3368"
126 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200127 select SUPPORT_SPL
128 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200129 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
130 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang8bf7ed42019-07-22 19:59:34 +0800131 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200132 imply SPL_SEPARATE_BSS
133 imply SPL_SERIAL_SUPPORT
134 imply TPL_SERIAL_SUPPORT
Kever Yang48831b22019-07-09 22:05:58 +0800135 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800136 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200137 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
138 into a big and little cluster with 4 cores each) Cortex-A53 including
139 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
140 (for the little cluster), PowerVR G6110 based graphics, one video
141 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
142 video codec support.
143
144 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
145 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800146
Kever Yang0d3d7832016-07-19 21:16:59 +0800147config ROCKCHIP_RK3399
148 bool "Support Rockchip RK3399"
149 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800150 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800151 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800152 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530153 select SPL_ATF
154 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530155 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530156 select SPL_LOAD_FIT
157 select SPL_CLK if SPL
158 select SPL_PINCTRL if SPL
159 select SPL_RAM if SPL
160 select SPL_REGMAP if SPL
161 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800162 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
163 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800164 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200165 select SPL_SERIAL_SUPPORT
166 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530167 select CLK
168 select FIT
169 select PINCTRL
170 select RAM
171 select REGMAP
172 select SYSCON
173 select DM_PMIC
174 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800175 select BOARD_LATE_INIT
Kever Yangff9afe42019-07-22 19:59:42 +0800176 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangfca798d2018-11-09 11:18:15 +0800177 imply TPL_SERIAL_SUPPORT
178 imply TPL_LIBCOMMON_SUPPORT
179 imply TPL_LIBGENERIC_SUPPORT
180 imply TPL_SYS_MALLOC_SIMPLE
Kever Yangfca798d2018-11-09 11:18:15 +0800181 imply TPL_DRIVERS_MISC_SUPPORT
182 imply TPL_OF_CONTROL
183 imply TPL_DM
184 imply TPL_REGMAP
185 imply TPL_SYSCON
186 imply TPL_RAM
187 imply TPL_CLK
188 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800189 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang0d3d7832016-07-19 21:16:59 +0800190 help
191 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
192 and quad-core Cortex-A53.
193 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
194 video interfaces supporting HDMI and eDP, several DDR3 options
195 and video codec support. Peripherals include Gigabit Ethernet,
196 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
197
Andy Yan2d982da2017-06-01 18:00:55 +0800198config ROCKCHIP_RV1108
199 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530200 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800201 help
202 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
203 and a DSP.
204
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200205config ROCKCHIP_USB_UART
206 bool "Route uart output to usb pins"
207 help
208 Rockchip SoCs have the ability to route the signals of the debug
209 uart through the d+ and d- pins of a specific usb phy to enable
210 some form of closed-case debugging. With this option supported
211 SoCs will enable this routing as a debug measure.
212
Philipp Tomsich798370f2017-06-29 11:21:15 +0200213config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800214 bool "SPL returns to bootrom"
215 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100216 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800217 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200218 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800219 help
220 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
221 SPL will return to the boot rom, which will then load the U-Boot
222 binary to keep going on.
223
Philipp Tomsich798370f2017-06-29 11:21:15 +0200224config TPL_ROCKCHIP_BACK_TO_BROM
225 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800226 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200227 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800228 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200229 depends on TPL
230 help
231 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
232 SPL will return to the boot rom, which will then load the U-Boot
233 binary to keep going on.
234
Kever Yangbb337732019-07-22 20:02:01 +0800235config ROCKCHIP_COMMON_BOARD
236 bool "Rockchip common board file"
237 help
238 Rockchip SoCs have similar boot process, Common board file is mainly
239 in charge of common process of board_init() and board_late_init() for
240 U-Boot proper.
241
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800242config SPL_ROCKCHIP_COMMON_BOARD
243 bool "Rockchip SPL common board file"
244 depends on SPL
245 help
246 Rockchip SoCs have similar boot process, SPL is mainly in charge of
247 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
248 no TPL for the board.
249
Kever Yang34ead0f2019-07-09 22:05:55 +0800250config TPL_ROCKCHIP_COMMON_BOARD
251 bool ""
252 depends on TPL
253 help
254 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
255 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
256 common board is a basic TPL board init which can be shared for most
257 of SoCs to avoid copy-pase for different SoCs.
258
Andy Yan70378cb2017-10-11 15:00:16 +0800259config ROCKCHIP_BOOT_MODE_REG
260 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800261 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800262 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800263 according to the value from this register.
264
Kever Yange484f772017-04-20 17:03:46 +0800265config ROCKCHIP_SPL_RESERVE_IRAM
266 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800267 default 0
Kever Yange484f772017-04-20 17:03:46 +0800268 help
269 SPL may need reserve memory for firmware loaded by SPL, whose load
270 address is in IRAM and may overlay with SPL text area if not
271 reserved.
272
Heiko Stübner355a8802017-02-18 19:46:25 +0100273config ROCKCHIP_BROM_HELPER
274 bool
275
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200276config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
277 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
278 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
279 help
280 Some Rockchip BROM variants (e.g. on the RK3188) load the
281 first stage in segments and enter multiple times. E.g. on
282 the RK3188, the first 1KB of the first stage are loaded
283 first and entered; after returning to the BROM, the
284 remainder of the first stage is loaded, but the BROM
285 re-enters at the same address/to the same code as previously.
286
287 This enables support code in the BOOT0 hook for the SPL stage
288 to allow multiple entries.
289
290config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
291 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
292 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
293 help
294 Some Rockchip BROM variants (e.g. on the RK3188) load the
295 first stage in segments and enter multiple times. E.g. on
296 the RK3188, the first 1KB of the first stage are loaded
297 first and entered; after returning to the BROM, the
298 remainder of the first stage is loaded, but the BROM
299 re-enters at the same address/to the same code as previously.
300
301 This enables support code in the BOOT0 hook for the TPL stage
302 to allow multiple entries.
303
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400304config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200305 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400306
huang lin1115b642015-11-17 14:20:27 +0800307source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800308source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100309source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800310source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200311source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800312source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800313source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800314source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800315source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600316endif