blob: 81dee9e5c7355cb26ef8e3b656a44ae2e78ea827 [file] [log] [blame]
Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangaa827752017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080037 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020038 select BOARD_LATE_INIT
Kever Yang3bd90402019-07-22 19:59:18 +080039 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübneref6db5e2017-02-18 19:46:36 +010040 help
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
46
Kever Yang57d4dbf2017-06-23 17:17:52 +080047config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053049 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080050 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080051 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080052 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080053 select SPL_DM
54 select SPL_OF_LIBFDT
55 select TPL
56 select TPL_DM
57 select TPL_OF_LIBFDT
58 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
59 select TPL_NEEDS_SEPARATE_STACK if TPL
60 select SPL_DRIVERS_MISC_SUPPORT
61 imply SPL_SERIAL_SUPPORT
Kever Yangd877fd22019-07-22 19:59:20 +080062 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080063 imply TPL_SERIAL_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080064 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080065 select TPL_LIBCOMMON_SUPPORT
66 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080067 help
68 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
69 including NEON and GPU, Mali-400 graphics, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
71 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
72
Simon Glass2cffe662015-08-30 16:55:38 -060073config ROCKCHIP_RK3288
74 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053075 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +080076 select SUPPORT_SPL
77 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080078 select SUPPORT_TPL
Kever Yangaa67deb2019-07-22 19:59:27 +080079 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080080 imply TPL_CLK
81 imply TPL_DM
82 imply TPL_DRIVERS_MISC_SUPPORT
83 imply TPL_LIBCOMMON_SUPPORT
84 imply TPL_LIBGENERIC_SUPPORT
85 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +080086 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +080087 imply TPL_OF_CONTROL
88 imply TPL_OF_PLATDATA
89 imply TPL_RAM
90 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +080091 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080092 imply TPL_SERIAL_SUPPORT
93 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +080094 imply USB_FUNCTION_ROCKUSB
95 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060096 help
97 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
98 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
99 video interfaces supporting HDMI and eDP, several DDR3 options
100 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100101 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600102
Kever Yangec02b3c2017-02-23 15:37:51 +0800103config ROCKCHIP_RK3328
104 bool "Support Rockchip RK3328"
105 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300106 select SUPPORT_SPL
107 select SPL
Kever Yangbb4c3252019-07-22 19:59:32 +0800108 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yang07be6692019-06-09 00:27:15 +0300109 imply SPL_SERIAL_SUPPORT
110 imply SPL_SEPARATE_BSS
111 select ENABLE_ARM_SOC_BOOT0_HOOK
112 select DEBUG_UART_BOARD_INIT
113 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800114 help
115 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
116 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
117 video interfaces supporting HDMI and eDP, several DDR3 options
118 and video codec support. Peripherals include Gigabit Ethernet,
119 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
120
Andreas Färber9e3ad682017-05-15 17:51:18 +0800121config ROCKCHIP_RK3368
122 bool "Support Rockchip RK3368"
123 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200124 select SUPPORT_SPL
125 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200126 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
127 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang8bf7ed42019-07-22 19:59:34 +0800128 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200129 imply SPL_SEPARATE_BSS
130 imply SPL_SERIAL_SUPPORT
131 imply TPL_SERIAL_SUPPORT
Kever Yang48831b22019-07-09 22:05:58 +0800132 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800133 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200134 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
135 into a big and little cluster with 4 cores each) Cortex-A53 including
136 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
137 (for the little cluster), PowerVR G6110 based graphics, one video
138 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
139 video codec support.
140
141 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
142 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800143
Kever Yang0d3d7832016-07-19 21:16:59 +0800144config ROCKCHIP_RK3399
145 bool "Support Rockchip RK3399"
146 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800147 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800148 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800149 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530150 select SPL_ATF
151 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530152 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530153 select SPL_LOAD_FIT
154 select SPL_CLK if SPL
155 select SPL_PINCTRL if SPL
156 select SPL_RAM if SPL
157 select SPL_REGMAP if SPL
158 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800159 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
160 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800161 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200162 select SPL_SERIAL_SUPPORT
163 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530164 select CLK
165 select FIT
166 select PINCTRL
167 select RAM
168 select REGMAP
169 select SYSCON
170 select DM_PMIC
171 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800172 select BOARD_LATE_INIT
Kever Yangff9afe42019-07-22 19:59:42 +0800173 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangfca798d2018-11-09 11:18:15 +0800174 imply TPL_SERIAL_SUPPORT
175 imply TPL_LIBCOMMON_SUPPORT
176 imply TPL_LIBGENERIC_SUPPORT
177 imply TPL_SYS_MALLOC_SIMPLE
Kever Yangfca798d2018-11-09 11:18:15 +0800178 imply TPL_DRIVERS_MISC_SUPPORT
179 imply TPL_OF_CONTROL
180 imply TPL_DM
181 imply TPL_REGMAP
182 imply TPL_SYSCON
183 imply TPL_RAM
184 imply TPL_CLK
185 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800186 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang0d3d7832016-07-19 21:16:59 +0800187 help
188 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
189 and quad-core Cortex-A53.
190 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
191 video interfaces supporting HDMI and eDP, several DDR3 options
192 and video codec support. Peripherals include Gigabit Ethernet,
193 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
194
Andy Yan2d982da2017-06-01 18:00:55 +0800195config ROCKCHIP_RV1108
196 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530197 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800198 help
199 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
200 and a DSP.
201
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200202config ROCKCHIP_USB_UART
203 bool "Route uart output to usb pins"
204 help
205 Rockchip SoCs have the ability to route the signals of the debug
206 uart through the d+ and d- pins of a specific usb phy to enable
207 some form of closed-case debugging. With this option supported
208 SoCs will enable this routing as a debug measure.
209
Philipp Tomsich798370f2017-06-29 11:21:15 +0200210config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800211 bool "SPL returns to bootrom"
212 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100213 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800214 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200215 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800216 help
217 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
218 SPL will return to the boot rom, which will then load the U-Boot
219 binary to keep going on.
220
Philipp Tomsich798370f2017-06-29 11:21:15 +0200221config TPL_ROCKCHIP_BACK_TO_BROM
222 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800223 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200224 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800225 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200226 depends on TPL
227 help
228 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
229 SPL will return to the boot rom, which will then load the U-Boot
230 binary to keep going on.
231
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800232config SPL_ROCKCHIP_COMMON_BOARD
233 bool "Rockchip SPL common board file"
234 depends on SPL
235 help
236 Rockchip SoCs have similar boot process, SPL is mainly in charge of
237 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
238 no TPL for the board.
239
Kever Yang34ead0f2019-07-09 22:05:55 +0800240config TPL_ROCKCHIP_COMMON_BOARD
241 bool ""
242 depends on TPL
243 help
244 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
245 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
246 common board is a basic TPL board init which can be shared for most
247 of SoCs to avoid copy-pase for different SoCs.
248
Andy Yan70378cb2017-10-11 15:00:16 +0800249config ROCKCHIP_BOOT_MODE_REG
250 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800251 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800252 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800253 according to the value from this register.
254
Kever Yange484f772017-04-20 17:03:46 +0800255config ROCKCHIP_SPL_RESERVE_IRAM
256 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800257 default 0
Kever Yange484f772017-04-20 17:03:46 +0800258 help
259 SPL may need reserve memory for firmware loaded by SPL, whose load
260 address is in IRAM and may overlay with SPL text area if not
261 reserved.
262
Heiko Stübner355a8802017-02-18 19:46:25 +0100263config ROCKCHIP_BROM_HELPER
264 bool
265
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200266config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
267 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
268 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
269 help
270 Some Rockchip BROM variants (e.g. on the RK3188) load the
271 first stage in segments and enter multiple times. E.g. on
272 the RK3188, the first 1KB of the first stage are loaded
273 first and entered; after returning to the BROM, the
274 remainder of the first stage is loaded, but the BROM
275 re-enters at the same address/to the same code as previously.
276
277 This enables support code in the BOOT0 hook for the SPL stage
278 to allow multiple entries.
279
280config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
281 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
282 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
283 help
284 Some Rockchip BROM variants (e.g. on the RK3188) load the
285 first stage in segments and enter multiple times. E.g. on
286 the RK3188, the first 1KB of the first stage are loaded
287 first and entered; after returning to the BROM, the
288 remainder of the first stage is loaded, but the BROM
289 re-enters at the same address/to the same code as previously.
290
291 This enables support code in the BOOT0 hook for the TPL stage
292 to allow multiple entries.
293
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400294config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200295 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400296
huang lin1115b642015-11-17 14:20:27 +0800297source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800298source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100299source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800300source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200301source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800302source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800303source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800304source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800305source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600306endif