Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 1 | if ARCH_ROCKCHIP |
| 2 | |
Heiko Stübner | 5c91e2b | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 3 | config ROCKCHIP_RK3036 |
| 4 | bool "Support Rockchip RK3036" |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 5 | select CPU_V7A |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 6 | select SUPPORT_SPL |
| 7 | select SPL |
Eddie Cai | a79b78f | 2018-01-17 09:51:41 +0800 | [diff] [blame] | 8 | imply USB_FUNCTION_ROCKUSB |
| 9 | imply CMD_ROCKUSB |
Kever Yang | 427cb67 | 2019-07-22 20:02:04 +0800 | [diff] [blame] | 10 | imply ROCKCHIP_COMMON_BOARD |
Heiko Stübner | 5c91e2b | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 11 | help |
| 12 | The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 |
| 13 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 14 | and video codec support. Peripherals include Gigabit Ethernet, |
| 15 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 16 | |
Kever Yang | aa82775 | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 17 | config ROCKCHIP_RK3128 |
| 18 | bool "Support Rockchip RK3128" |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 19 | select CPU_V7A |
Kever Yang | 9636272 | 2019-07-22 20:02:05 +0800 | [diff] [blame] | 20 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | aa82775 | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 21 | help |
| 22 | The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 |
| 23 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 24 | and video codec support. Peripherals include Gigabit Ethernet, |
| 25 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 26 | |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 27 | config ROCKCHIP_RK3188 |
| 28 | bool "Support Rockchip RK3188" |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 29 | select CPU_V7A |
Ley Foon Tan | 48fcc4a | 2017-05-03 17:13:32 +0800 | [diff] [blame] | 30 | select SPL_BOARD_INIT if SPL |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 31 | select SUPPORT_SPL |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 32 | select SPL |
Philipp Tomsich | 5aa3f9d | 2017-10-10 16:21:17 +0200 | [diff] [blame] | 33 | select SPL_CLK |
Philipp Tomsich | 5aa3f9d | 2017-10-10 16:21:17 +0200 | [diff] [blame] | 34 | select SPL_REGMAP |
| 35 | select SPL_SYSCON |
| 36 | select SPL_RAM |
| 37 | select SPL_DRIVERS_MISC_SUPPORT |
Philipp Tomsich | 16c689c | 2017-10-10 16:21:15 +0200 | [diff] [blame] | 38 | select SPL_ROCKCHIP_EARLYRETURN_TO_BROM |
Kever Yang | bd8532e | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 39 | select SPL_ROCKCHIP_BACK_TO_BROM |
Heiko Stübner | 015f69a | 2017-04-06 00:19:36 +0200 | [diff] [blame] | 40 | select BOARD_LATE_INIT |
Kever Yang | bfd3f87 | 2019-07-22 20:02:09 +0800 | [diff] [blame] | 41 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | 3bd9040 | 2019-07-22 19:59:18 +0800 | [diff] [blame] | 42 | imply SPL_ROCKCHIP_COMMON_BOARD |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 43 | help |
| 44 | The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 |
| 45 | including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two |
| 46 | video interfaces, several memory options and video codec support. |
| 47 | Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S, |
| 48 | UART, SPI, I2C and PWMs. |
| 49 | |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 50 | config ROCKCHIP_RK322X |
| 51 | bool "Support Rockchip RK3228/RK3229" |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 52 | select CPU_V7A |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 53 | select SUPPORT_SPL |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 54 | select SUPPORT_TPL |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 55 | select SPL |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 56 | select SPL_DM |
| 57 | select SPL_OF_LIBFDT |
| 58 | select TPL |
| 59 | select TPL_DM |
| 60 | select TPL_OF_LIBFDT |
| 61 | select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL |
| 62 | select TPL_NEEDS_SEPARATE_STACK if TPL |
| 63 | select SPL_DRIVERS_MISC_SUPPORT |
Kever Yang | 0b51773 | 2019-07-22 20:02:07 +0800 | [diff] [blame] | 64 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 65 | imply SPL_SERIAL_SUPPORT |
Kever Yang | d877fd2 | 2019-07-22 19:59:20 +0800 | [diff] [blame] | 66 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 67 | imply TPL_SERIAL_SUPPORT |
Kever Yang | 466f3fd | 2019-07-09 22:05:56 +0800 | [diff] [blame] | 68 | imply TPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | aff40c6 | 2019-04-02 20:41:24 +0800 | [diff] [blame] | 69 | select TPL_LIBCOMMON_SUPPORT |
| 70 | select TPL_LIBGENERIC_SUPPORT |
Kever Yang | 57d4dbf | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 71 | help |
| 72 | The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 |
| 73 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 74 | and video codec support. Peripherals include Gigabit Ethernet, |
| 75 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 76 | |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 77 | config ROCKCHIP_RK3288 |
| 78 | bool "Support Rockchip RK3288" |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 79 | select CPU_V7A |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 80 | select SUPPORT_SPL |
| 81 | select SPL |
Kever Yang | f7c0a33 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 82 | select SUPPORT_TPL |
Kever Yang | ba87501 | 2019-07-22 20:02:15 +0800 | [diff] [blame] | 83 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | aa67deb | 2019-07-22 19:59:27 +0800 | [diff] [blame] | 84 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | f7c0a33 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 85 | imply TPL_CLK |
| 86 | imply TPL_DM |
| 87 | imply TPL_DRIVERS_MISC_SUPPORT |
| 88 | imply TPL_LIBCOMMON_SUPPORT |
| 89 | imply TPL_LIBGENERIC_SUPPORT |
| 90 | imply TPL_NEEDS_SEPARATE_TEXT_BASE |
Kever Yang | b36e709 | 2019-07-02 11:43:06 +0800 | [diff] [blame] | 91 | imply TPL_NEEDS_SEPARATE_STACK |
Kever Yang | f7c0a33 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 92 | imply TPL_OF_CONTROL |
| 93 | imply TPL_OF_PLATDATA |
| 94 | imply TPL_RAM |
| 95 | imply TPL_REGMAP |
Kever Yang | e32f38e | 2019-07-09 22:05:57 +0800 | [diff] [blame] | 96 | imply TPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | f7c0a33 | 2019-07-02 11:43:05 +0800 | [diff] [blame] | 97 | imply TPL_SERIAL_SUPPORT |
| 98 | imply TPL_SYSCON |
Eddie Cai | b3501fe | 2017-12-15 08:17:13 +0800 | [diff] [blame] | 99 | imply USB_FUNCTION_ROCKUSB |
| 100 | imply CMD_ROCKUSB |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 101 | help |
| 102 | The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 |
| 103 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 104 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 105 | and video codec support. Peripherals include Gigabit Ethernet, |
Andreas Färber | 531e8e0 | 2016-11-02 18:03:01 +0100 | [diff] [blame] | 106 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 107 | |
Kever Yang | ec02b3c | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 108 | config ROCKCHIP_RK3328 |
| 109 | bool "Support Rockchip RK3328" |
| 110 | select ARM64 |
Kever Yang | 07be669 | 2019-06-09 00:27:15 +0300 | [diff] [blame] | 111 | select SUPPORT_SPL |
| 112 | select SPL |
Kever Yang | 6987185 | 2019-08-02 10:40:01 +0300 | [diff] [blame] | 113 | select SUPPORT_TPL |
| 114 | select TPL |
| 115 | select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL |
| 116 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | 205e2cc | 2019-07-22 20:02:16 +0800 | [diff] [blame] | 117 | imply ROCKCHIP_COMMON_BOARD |
YouMin Chen | b9f7df3 | 2019-11-15 11:04:44 +0800 | [diff] [blame] | 118 | imply ROCKCHIP_SDRAM_COMMON |
Kever Yang | bb4c325 | 2019-07-22 19:59:32 +0800 | [diff] [blame] | 119 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | 07be669 | 2019-06-09 00:27:15 +0300 | [diff] [blame] | 120 | imply SPL_SERIAL_SUPPORT |
Kever Yang | 6987185 | 2019-08-02 10:40:01 +0300 | [diff] [blame] | 121 | imply TPL_SERIAL_SUPPORT |
Kever Yang | 07be669 | 2019-06-09 00:27:15 +0300 | [diff] [blame] | 122 | imply SPL_SEPARATE_BSS |
| 123 | select ENABLE_ARM_SOC_BOOT0_HOOK |
| 124 | select DEBUG_UART_BOARD_INIT |
| 125 | select SYS_NS16550 |
Kever Yang | ec02b3c | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 126 | help |
| 127 | The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. |
| 128 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 129 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 130 | and video codec support. Peripherals include Gigabit Ethernet, |
| 131 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 132 | |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 133 | config ROCKCHIP_RK3368 |
| 134 | bool "Support Rockchip RK3368" |
| 135 | select ARM64 |
Philipp Tomsich | 84af43e | 2017-06-11 23:46:25 +0200 | [diff] [blame] | 136 | select SUPPORT_SPL |
| 137 | select SUPPORT_TPL |
Philipp Tomsich | 01b219e | 2017-07-28 20:03:07 +0200 | [diff] [blame] | 138 | select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL |
| 139 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | 35b401e | 2019-07-22 20:02:17 +0800 | [diff] [blame] | 140 | imply ROCKCHIP_COMMON_BOARD |
Kever Yang | 8bf7ed4 | 2019-07-22 19:59:34 +0800 | [diff] [blame] | 141 | imply SPL_ROCKCHIP_COMMON_BOARD |
Philipp Tomsich | 84af43e | 2017-06-11 23:46:25 +0200 | [diff] [blame] | 142 | imply SPL_SEPARATE_BSS |
| 143 | imply SPL_SERIAL_SUPPORT |
| 144 | imply TPL_SERIAL_SUPPORT |
Kever Yang | 48831b2 | 2019-07-09 22:05:58 +0800 | [diff] [blame] | 145 | imply TPL_ROCKCHIP_COMMON_BOARD |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 146 | help |
Philipp Tomsich | 9f3deaf | 2017-06-10 00:47:53 +0200 | [diff] [blame] | 147 | The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised |
| 148 | into a big and little cluster with 4 cores each) Cortex-A53 including |
| 149 | AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache |
| 150 | (for the little cluster), PowerVR G6110 based graphics, one video |
| 151 | output processor supporting LVDS/HDMI/eDP, several DDR3 options and |
| 152 | video codec support. |
| 153 | |
| 154 | On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, |
| 155 | I2S, UARTs, SPI, I2C and PWMs. |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 156 | |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 157 | config ROCKCHIP_RK3399 |
| 158 | bool "Support Rockchip RK3399" |
| 159 | select ARM64 |
Kever Yang | 16efdfd | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 160 | select SUPPORT_SPL |
Kever Yang | fca798d | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 161 | select SUPPORT_TPL |
Kever Yang | 16efdfd | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 162 | select SPL |
Jagan Teki | cd43389 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 163 | select SPL_ATF |
| 164 | select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF |
Jagan Teki | ce063b9 | 2019-06-21 00:25:03 +0530 | [diff] [blame] | 165 | select SPL_BOARD_INIT if SPL |
Jagan Teki | cd43389 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 166 | select SPL_LOAD_FIT |
| 167 | select SPL_CLK if SPL |
| 168 | select SPL_PINCTRL if SPL |
| 169 | select SPL_RAM if SPL |
| 170 | select SPL_REGMAP if SPL |
| 171 | select SPL_SYSCON if SPL |
Kever Yang | fca798d | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 172 | select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL |
| 173 | select TPL_NEEDS_SEPARATE_STACK if TPL |
Kever Yang | 16efdfd | 2017-02-22 16:56:38 +0800 | [diff] [blame] | 174 | select SPL_SEPARATE_BSS |
Philipp Tomsich | d17d8cf | 2017-07-26 12:29:01 +0200 | [diff] [blame] | 175 | select SPL_SERIAL_SUPPORT |
| 176 | select SPL_DRIVERS_MISC_SUPPORT |
Jagan Teki | cd43389 | 2019-05-08 11:11:43 +0530 | [diff] [blame] | 177 | select CLK |
| 178 | select FIT |
| 179 | select PINCTRL |
| 180 | select RAM |
| 181 | select REGMAP |
| 182 | select SYSCON |
| 183 | select DM_PMIC |
| 184 | select DM_REGULATOR_FIXED |
Andy Yan | 70378cb | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 185 | select BOARD_LATE_INIT |
Kever Yang | 9554a4e | 2019-07-22 20:02:19 +0800 | [diff] [blame] | 186 | imply ROCKCHIP_COMMON_BOARD |
YouMin Chen | 23ae72e | 2019-11-15 11:04:45 +0800 | [diff] [blame^] | 187 | imply ROCKCHIP_SDRAM_COMMON |
Kever Yang | ff9afe4 | 2019-07-22 19:59:42 +0800 | [diff] [blame] | 188 | imply SPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | fca798d | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 189 | imply TPL_SERIAL_SUPPORT |
| 190 | imply TPL_LIBCOMMON_SUPPORT |
| 191 | imply TPL_LIBGENERIC_SUPPORT |
| 192 | imply TPL_SYS_MALLOC_SIMPLE |
Kever Yang | fca798d | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 193 | imply TPL_DRIVERS_MISC_SUPPORT |
| 194 | imply TPL_OF_CONTROL |
| 195 | imply TPL_DM |
| 196 | imply TPL_REGMAP |
| 197 | imply TPL_SYSCON |
| 198 | imply TPL_RAM |
| 199 | imply TPL_CLK |
| 200 | imply TPL_TINY_MEMSET |
Kever Yang | 3cfbb94 | 2019-07-09 22:06:01 +0800 | [diff] [blame] | 201 | imply TPL_ROCKCHIP_COMMON_BOARD |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 202 | help |
| 203 | The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 |
| 204 | and quad-core Cortex-A53. |
| 205 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 206 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 207 | and video codec support. Peripherals include Gigabit Ethernet, |
| 208 | USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. |
| 209 | |
Andy Yan | 2d982da | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 210 | config ROCKCHIP_RV1108 |
| 211 | bool "Support Rockchip RV1108" |
Lokesh Vutla | 81b1a67 | 2018-04-26 18:21:26 +0530 | [diff] [blame] | 212 | select CPU_V7A |
Kever Yang | a2b336e | 2019-07-22 20:02:21 +0800 | [diff] [blame] | 213 | imply ROCKCHIP_COMMON_BOARD |
Andy Yan | 2d982da | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 214 | help |
| 215 | The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 |
| 216 | and a DSP. |
| 217 | |
Heiko Stuebner | 9cc8feb | 2018-10-08 13:01:56 +0200 | [diff] [blame] | 218 | config ROCKCHIP_USB_UART |
| 219 | bool "Route uart output to usb pins" |
| 220 | help |
| 221 | Rockchip SoCs have the ability to route the signals of the debug |
| 222 | uart through the d+ and d- pins of a specific usb phy to enable |
| 223 | some form of closed-case debugging. With this option supported |
| 224 | SoCs will enable this routing as a debug measure. |
| 225 | |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 226 | config SPL_ROCKCHIP_BACK_TO_BROM |
Xu Ziyuan | 5401eb8 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 227 | bool "SPL returns to bootrom" |
| 228 | default y if ROCKCHIP_RK3036 |
Heiko Stübner | 355a880 | 2017-02-18 19:46:25 +0100 | [diff] [blame] | 229 | select ROCKCHIP_BROM_HELPER |
Kever Yang | bd8532e | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 230 | select SPL_BOOTROM_SUPPORT |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 231 | depends on SPL |
Xu Ziyuan | 5401eb8 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 232 | help |
| 233 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 234 | SPL will return to the boot rom, which will then load the U-Boot |
| 235 | binary to keep going on. |
| 236 | |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 237 | config TPL_ROCKCHIP_BACK_TO_BROM |
| 238 | bool "TPL returns to bootrom" |
Kever Yang | fca798d | 2018-11-09 11:18:15 +0800 | [diff] [blame] | 239 | default y |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 240 | select ROCKCHIP_BROM_HELPER |
Kever Yang | bd8532e | 2019-07-22 19:59:15 +0800 | [diff] [blame] | 241 | select TPL_BOOTROM_SUPPORT |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 242 | depends on TPL |
| 243 | help |
| 244 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 245 | SPL will return to the boot rom, which will then load the U-Boot |
| 246 | binary to keep going on. |
| 247 | |
Kever Yang | bb33773 | 2019-07-22 20:02:01 +0800 | [diff] [blame] | 248 | config ROCKCHIP_COMMON_BOARD |
| 249 | bool "Rockchip common board file" |
| 250 | help |
| 251 | Rockchip SoCs have similar boot process, Common board file is mainly |
| 252 | in charge of common process of board_init() and board_late_init() for |
| 253 | U-Boot proper. |
| 254 | |
Kever Yang | 1d7cc72a | 2019-07-22 19:59:12 +0800 | [diff] [blame] | 255 | config SPL_ROCKCHIP_COMMON_BOARD |
| 256 | bool "Rockchip SPL common board file" |
| 257 | depends on SPL |
| 258 | help |
| 259 | Rockchip SoCs have similar boot process, SPL is mainly in charge of |
| 260 | load and boot Trust ATF/U-Boot firmware, and DRAM init if there is |
| 261 | no TPL for the board. |
| 262 | |
Kever Yang | 34ead0f | 2019-07-09 22:05:55 +0800 | [diff] [blame] | 263 | config TPL_ROCKCHIP_COMMON_BOARD |
| 264 | bool "" |
| 265 | depends on TPL |
| 266 | help |
| 267 | Rockchip SoCs have similar boot process, prefer to use TPL for DRAM |
| 268 | init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL |
| 269 | common board is a basic TPL board init which can be shared for most |
| 270 | of SoCs to avoid copy-pase for different SoCs. |
| 271 | |
Andy Yan | 70378cb | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 272 | config ROCKCHIP_BOOT_MODE_REG |
| 273 | hex "Rockchip boot mode flag register address" |
Andy Yan | 70378cb | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 274 | help |
Kever Yang | 9fbe17c | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 275 | The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h) |
Andy Yan | 70378cb | 2017-10-11 15:00:16 +0800 | [diff] [blame] | 276 | according to the value from this register. |
| 277 | |
Kever Yang | e484f77 | 2017-04-20 17:03:46 +0800 | [diff] [blame] | 278 | config ROCKCHIP_SPL_RESERVE_IRAM |
| 279 | hex "Size of IRAM reserved in SPL" |
Kever Yang | 60a5007 | 2017-12-18 15:13:19 +0800 | [diff] [blame] | 280 | default 0 |
Kever Yang | e484f77 | 2017-04-20 17:03:46 +0800 | [diff] [blame] | 281 | help |
| 282 | SPL may need reserve memory for firmware loaded by SPL, whose load |
| 283 | address is in IRAM and may overlay with SPL text area if not |
| 284 | reserved. |
| 285 | |
Heiko Stübner | 355a880 | 2017-02-18 19:46:25 +0100 | [diff] [blame] | 286 | config ROCKCHIP_BROM_HELPER |
| 287 | bool |
| 288 | |
Philipp Tomsich | 9f1a447 | 2017-10-10 16:21:10 +0200 | [diff] [blame] | 289 | config SPL_ROCKCHIP_EARLYRETURN_TO_BROM |
| 290 | bool "SPL requires early-return (for RK3188-style BROM) to BROM" |
| 291 | depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK |
| 292 | help |
| 293 | Some Rockchip BROM variants (e.g. on the RK3188) load the |
| 294 | first stage in segments and enter multiple times. E.g. on |
| 295 | the RK3188, the first 1KB of the first stage are loaded |
| 296 | first and entered; after returning to the BROM, the |
| 297 | remainder of the first stage is loaded, but the BROM |
| 298 | re-enters at the same address/to the same code as previously. |
| 299 | |
| 300 | This enables support code in the BOOT0 hook for the SPL stage |
| 301 | to allow multiple entries. |
| 302 | |
| 303 | config TPL_ROCKCHIP_EARLYRETURN_TO_BROM |
| 304 | bool "TPL requires early-return (for RK3188-style BROM) to BROM" |
| 305 | depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK |
| 306 | help |
| 307 | Some Rockchip BROM variants (e.g. on the RK3188) load the |
| 308 | first stage in segments and enter multiple times. E.g. on |
| 309 | the RK3188, the first 1KB of the first stage are loaded |
| 310 | first and entered; after returning to the BROM, the |
| 311 | remainder of the first stage is loaded, but the BROM |
| 312 | re-enters at the same address/to the same code as previously. |
| 313 | |
| 314 | This enables support code in the BOOT0 hook for the TPL stage |
| 315 | to allow multiple entries. |
| 316 | |
Sandy Patterson | d70f0f3 | 2016-08-29 07:31:16 -0400 | [diff] [blame] | 317 | config SPL_MMC_SUPPORT |
Philipp Tomsich | 798370f | 2017-06-29 11:21:15 +0200 | [diff] [blame] | 318 | default y if !SPL_ROCKCHIP_BACK_TO_BROM |
Sandy Patterson | d70f0f3 | 2016-08-29 07:31:16 -0400 | [diff] [blame] | 319 | |
huang lin | 1115b64 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 320 | source "arch/arm/mach-rockchip/rk3036/Kconfig" |
Kever Yang | aa82775 | 2017-11-28 16:04:16 +0800 | [diff] [blame] | 321 | source "arch/arm/mach-rockchip/rk3128/Kconfig" |
Heiko Stübner | ef6db5e | 2017-02-18 19:46:36 +0100 | [diff] [blame] | 322 | source "arch/arm/mach-rockchip/rk3188/Kconfig" |
Kever Yang | a4f460d | 2017-06-23 17:17:54 +0800 | [diff] [blame] | 323 | source "arch/arm/mach-rockchip/rk322x/Kconfig" |
Heiko Stübner | 5c91e2b | 2016-07-16 00:17:15 +0200 | [diff] [blame] | 324 | source "arch/arm/mach-rockchip/rk3288/Kconfig" |
Kever Yang | ec02b3c | 2017-02-23 15:37:51 +0800 | [diff] [blame] | 325 | source "arch/arm/mach-rockchip/rk3328/Kconfig" |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 326 | source "arch/arm/mach-rockchip/rk3368/Kconfig" |
Kever Yang | 0d3d783 | 2016-07-19 21:16:59 +0800 | [diff] [blame] | 327 | source "arch/arm/mach-rockchip/rk3399/Kconfig" |
Andy Yan | 2d982da | 2017-06-01 18:00:55 +0800 | [diff] [blame] | 328 | source "arch/arm/mach-rockchip/rv1108/Kconfig" |
Simon Glass | 2cffe66 | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 329 | endif |