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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stuebnerfc367852019-07-16 22:18:21 +02003config ROCKCHIP_PX30
4 bool "Support Rockchip PX30"
5 select ARM64
6 select SUPPORT_SPL
7 select SUPPORT_TPL
8 select SPL
9 select TPL
10 select TPL_TINY_FRAMEWORK if TPL
11 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
12 select TPL_NEEDS_SEPARATE_STACK if TPL
13 imply SPL_SEPARATE_BSS
14 select SPL_SERIAL_SUPPORT
15 select TPL_SERIAL_SUPPORT
16 select DEBUG_UART_BOARD_INIT
17 imply ROCKCHIP_COMMON_BOARD
18 imply SPL_ROCKCHIP_COMMON_BOARD
19 help
20 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020025config ROCKCHIP_RK3036
26 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +080028 select SUPPORT_SPL
29 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +080030 imply USB_FUNCTION_ROCKUSB
31 imply CMD_ROCKUSB
Kever Yang427cb672019-07-22 20:02:04 +080032 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020033 help
34 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
35 including NEON and GPU, Mali-400 graphics, several DDR3 options
36 and video codec support. Peripherals include Gigabit Ethernet,
37 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
38
Kever Yangaa827752017-11-28 16:04:16 +080039config ROCKCHIP_RK3128
40 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053041 select CPU_V7A
Kever Yang96362722019-07-22 20:02:05 +080042 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa827752017-11-28 16:04:16 +080043 help
44 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
45 including NEON and GPU, Mali-400 graphics, several DDR3 options
46 and video codec support. Peripherals include Gigabit Ethernet,
47 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
48
Heiko Stübneref6db5e2017-02-18 19:46:36 +010049config ROCKCHIP_RK3188
50 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053051 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080052 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010053 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010054 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020055 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020056 select SPL_REGMAP
57 select SPL_SYSCON
58 select SPL_RAM
Simon Glass284cb9c2021-07-10 21:14:31 -060059 select SPL_DRIVERS_MISC
Philipp Tomsich16c689c2017-10-10 16:21:15 +020060 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080061 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020062 select BOARD_LATE_INIT
Kever Yangbfd3f872019-07-22 20:02:09 +080063 imply ROCKCHIP_COMMON_BOARD
Kever Yang3bd90402019-07-22 19:59:18 +080064 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübneref6db5e2017-02-18 19:46:36 +010065 help
66 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
67 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
68 video interfaces, several memory options and video codec support.
69 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
70 UART, SPI, I2C and PWMs.
71
Kever Yang57d4dbf2017-06-23 17:17:52 +080072config ROCKCHIP_RK322X
73 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053074 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080075 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080076 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080077 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080078 select SPL_DM
79 select SPL_OF_LIBFDT
80 select TPL
81 select TPL_DM
82 select TPL_OF_LIBFDT
83 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
84 select TPL_NEEDS_SEPARATE_STACK if TPL
Simon Glass284cb9c2021-07-10 21:14:31 -060085 select SPL_DRIVERS_MISC
Kever Yang0b517732019-07-22 20:02:07 +080086 imply ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080087 imply SPL_SERIAL_SUPPORT
Kever Yangd877fd22019-07-22 19:59:20 +080088 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080089 imply TPL_SERIAL_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080090 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080091 select TPL_LIBCOMMON_SUPPORT
92 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080093 help
94 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
95 including NEON and GPU, Mali-400 graphics, several DDR3 options
96 and video codec support. Peripherals include Gigabit Ethernet,
97 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
98
Simon Glass2cffe662015-08-30 16:55:38 -060099config ROCKCHIP_RK3288
100 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530101 select CPU_V7A
Jagan Tekif461f452020-07-21 12:16:38 +0530102 select OF_BOARD_SETUP
Kever Yang0d3d7832016-07-19 21:16:59 +0800103 select SUPPORT_SPL
104 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +0800105 select SUPPORT_TPL
Jagan Teki7b7cc952020-01-23 19:42:19 +0530106 imply PRE_CONSOLE_BUFFER
Kever Yangba875012019-07-22 20:02:15 +0800107 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa67deb2019-07-22 19:59:27 +0800108 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +0800109 imply TPL_CLK
110 imply TPL_DM
Simon Glass284cb9c2021-07-10 21:14:31 -0600111 imply TPL_DRIVERS_MISC
Kever Yangf7c0a332019-07-02 11:43:05 +0800112 imply TPL_LIBCOMMON_SUPPORT
113 imply TPL_LIBGENERIC_SUPPORT
114 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +0800115 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +0800116 imply TPL_OF_CONTROL
117 imply TPL_OF_PLATDATA
118 imply TPL_RAM
119 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +0800120 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +0800121 imply TPL_SERIAL_SUPPORT
122 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +0800123 imply USB_FUNCTION_ROCKUSB
124 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -0600125 help
126 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
127 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
128 video interfaces supporting HDMI and eDP, several DDR3 options
129 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100130 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600131
Andy Yanb5e16302019-11-14 11:21:12 +0800132config ROCKCHIP_RK3308
133 bool "Support Rockchip RK3308"
134 select ARM64
135 select DEBUG_UART_BOARD_INIT
136 select SUPPORT_SPL
137 select SUPPORT_TPL
138 select SPL
139 select SPL_ATF
140 select SPL_ATF_NO_PLATFORM_PARAM
141 select SPL_LOAD_FIT
142 imply ROCKCHIP_COMMON_BOARD
143 imply SPL_ROCKCHIP_COMMON_BOARD
144 imply SPL_CLK
145 imply SPL_REGMAP
146 imply SPL_SYSCON
147 imply SPL_RAM
148 imply SPL_SERIAL_SUPPORT
149 imply TPL_SERIAL_SUPPORT
150 imply SPL_SEPARATE_BSS
151 help
152 The Rockchip RK3308 is a ARM-based Soc which embedded with quad
153 Cortex-A35 and highly integrated audio interfaces.
154
Kever Yangec02b3c2017-02-23 15:37:51 +0800155config ROCKCHIP_RK3328
156 bool "Support Rockchip RK3328"
157 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300158 select SUPPORT_SPL
159 select SPL
Kever Yang69871852019-08-02 10:40:01 +0300160 select SUPPORT_TPL
161 select TPL
162 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
163 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang205e2cc2019-07-22 20:02:16 +0800164 imply ROCKCHIP_COMMON_BOARD
YouMin Chenb9f7df32019-11-15 11:04:44 +0800165 imply ROCKCHIP_SDRAM_COMMON
Kever Yangbb4c3252019-07-22 19:59:32 +0800166 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yang07be6692019-06-09 00:27:15 +0300167 imply SPL_SERIAL_SUPPORT
Kever Yang69871852019-08-02 10:40:01 +0300168 imply TPL_SERIAL_SUPPORT
Kever Yang07be6692019-06-09 00:27:15 +0300169 imply SPL_SEPARATE_BSS
170 select ENABLE_ARM_SOC_BOOT0_HOOK
171 select DEBUG_UART_BOARD_INIT
172 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800173 help
174 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
175 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
176 video interfaces supporting HDMI and eDP, several DDR3 options
177 and video codec support. Peripherals include Gigabit Ethernet,
178 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
179
Andreas Färber9e3ad682017-05-15 17:51:18 +0800180config ROCKCHIP_RK3368
181 bool "Support Rockchip RK3368"
182 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200183 select SUPPORT_SPL
184 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200185 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
186 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang35b401e2019-07-22 20:02:17 +0800187 imply ROCKCHIP_COMMON_BOARD
Kever Yang8bf7ed42019-07-22 19:59:34 +0800188 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200189 imply SPL_SEPARATE_BSS
190 imply SPL_SERIAL_SUPPORT
191 imply TPL_SERIAL_SUPPORT
Kever Yang48831b22019-07-09 22:05:58 +0800192 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800193 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200194 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
195 into a big and little cluster with 4 cores each) Cortex-A53 including
196 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
197 (for the little cluster), PowerVR G6110 based graphics, one video
198 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
199 video codec support.
200
201 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
202 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800203
Kever Yang0d3d7832016-07-19 21:16:59 +0800204config ROCKCHIP_RK3399
205 bool "Support Rockchip RK3399"
206 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800207 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800208 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800209 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530210 select SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530211 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530212 select SPL_LOAD_FIT
213 select SPL_CLK if SPL
214 select SPL_PINCTRL if SPL
215 select SPL_RAM if SPL
216 select SPL_REGMAP if SPL
217 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800218 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
219 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800220 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200221 select SPL_SERIAL_SUPPORT
Simon Glass284cb9c2021-07-10 21:14:31 -0600222 select SPL_DRIVERS_MISC
Jagan Tekicd433892019-05-08 11:11:43 +0530223 select CLK
224 select FIT
225 select PINCTRL
226 select RAM
227 select REGMAP
228 select SYSCON
229 select DM_PMIC
230 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800231 select BOARD_LATE_INIT
Jagan Teki9249d5c2020-04-02 17:11:23 +0530232 imply PRE_CONSOLE_BUFFER
Kever Yang9554a4e2019-07-22 20:02:19 +0800233 imply ROCKCHIP_COMMON_BOARD
YouMin Chen23ae72e2019-11-15 11:04:45 +0800234 imply ROCKCHIP_SDRAM_COMMON
Hugh Cole-Bakerbf0fe0f2020-06-16 00:30:47 +0100235 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Kever Yangff9afe42019-07-22 19:59:42 +0800236 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangfca798d2018-11-09 11:18:15 +0800237 imply TPL_SERIAL_SUPPORT
238 imply TPL_LIBCOMMON_SUPPORT
239 imply TPL_LIBGENERIC_SUPPORT
240 imply TPL_SYS_MALLOC_SIMPLE
Simon Glass284cb9c2021-07-10 21:14:31 -0600241 imply TPL_DRIVERS_MISC
Kever Yangfca798d2018-11-09 11:18:15 +0800242 imply TPL_OF_CONTROL
243 imply TPL_DM
244 imply TPL_REGMAP
245 imply TPL_SYSCON
246 imply TPL_RAM
247 imply TPL_CLK
248 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800249 imply TPL_ROCKCHIP_COMMON_BOARD
Jagan Tekie7043012020-01-09 14:22:19 +0530250 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
251 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
Kever Yang0d3d7832016-07-19 21:16:59 +0800252 help
253 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
254 and quad-core Cortex-A53.
255 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
256 video interfaces supporting HDMI and eDP, several DDR3 options
257 and video codec support. Peripherals include Gigabit Ethernet,
258 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
259
Joseph Chen72cd8792021-06-02 15:58:25 +0800260config ROCKCHIP_RK3568
261 bool "Support Rockchip RK3568"
262 select ARM64
263 select CLK
264 select PINCTRL
265 select RAM
266 select REGMAP
267 select SYSCON
268 select BOARD_LATE_INIT
269 imply ROCKCHIP_COMMON_BOARD
270 help
271 The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
272 including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
273 two video interfaces supporting HDMI and eDP, several DDR3 options
274 and video codec support. Peripherals include Gigabit Ethernet,
275 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
276
Andy Yan2d982da2017-06-01 18:00:55 +0800277config ROCKCHIP_RV1108
278 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530279 select CPU_V7A
Kever Yanga2b336e2019-07-22 20:02:21 +0800280 imply ROCKCHIP_COMMON_BOARD
Andy Yan2d982da2017-06-01 18:00:55 +0800281 help
282 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
283 and a DSP.
284
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200285config ROCKCHIP_USB_UART
286 bool "Route uart output to usb pins"
287 help
288 Rockchip SoCs have the ability to route the signals of the debug
289 uart through the d+ and d- pins of a specific usb phy to enable
290 some form of closed-case debugging. With this option supported
291 SoCs will enable this routing as a debug measure.
292
Philipp Tomsich798370f2017-06-29 11:21:15 +0200293config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800294 bool "SPL returns to bootrom"
295 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100296 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800297 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200298 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800299 help
300 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
301 SPL will return to the boot rom, which will then load the U-Boot
302 binary to keep going on.
303
Philipp Tomsich798370f2017-06-29 11:21:15 +0200304config TPL_ROCKCHIP_BACK_TO_BROM
305 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800306 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200307 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800308 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200309 depends on TPL
310 help
311 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
312 SPL will return to the boot rom, which will then load the U-Boot
313 binary to keep going on.
314
Kever Yangbb337732019-07-22 20:02:01 +0800315config ROCKCHIP_COMMON_BOARD
316 bool "Rockchip common board file"
317 help
318 Rockchip SoCs have similar boot process, Common board file is mainly
319 in charge of common process of board_init() and board_late_init() for
320 U-Boot proper.
321
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800322config SPL_ROCKCHIP_COMMON_BOARD
323 bool "Rockchip SPL common board file"
324 depends on SPL
325 help
326 Rockchip SoCs have similar boot process, SPL is mainly in charge of
327 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
328 no TPL for the board.
329
Kever Yang34ead0f2019-07-09 22:05:55 +0800330config TPL_ROCKCHIP_COMMON_BOARD
Thomas Hebbcfbebf82019-12-20 18:05:22 -0800331 bool "Rockchip TPL common board file"
Kever Yang34ead0f2019-07-09 22:05:55 +0800332 depends on TPL
333 help
334 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
335 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
336 common board is a basic TPL board init which can be shared for most
Thomas Hebbfd37f242019-11-13 18:18:03 -0800337 of SoCs to avoid copy-paste for different SoCs.
Kever Yang34ead0f2019-07-09 22:05:55 +0800338
Andy Yan70378cb2017-10-11 15:00:16 +0800339config ROCKCHIP_BOOT_MODE_REG
340 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800341 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800342 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800343 according to the value from this register.
344
Kever Yange484f772017-04-20 17:03:46 +0800345config ROCKCHIP_SPL_RESERVE_IRAM
346 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800347 default 0
Kever Yange484f772017-04-20 17:03:46 +0800348 help
349 SPL may need reserve memory for firmware loaded by SPL, whose load
350 address is in IRAM and may overlay with SPL text area if not
351 reserved.
352
Heiko Stübner355a8802017-02-18 19:46:25 +0100353config ROCKCHIP_BROM_HELPER
354 bool
355
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200356config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
357 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
358 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
359 help
360 Some Rockchip BROM variants (e.g. on the RK3188) load the
361 first stage in segments and enter multiple times. E.g. on
362 the RK3188, the first 1KB of the first stage are loaded
363 first and entered; after returning to the BROM, the
364 remainder of the first stage is loaded, but the BROM
365 re-enters at the same address/to the same code as previously.
366
367 This enables support code in the BOOT0 hook for the SPL stage
368 to allow multiple entries.
369
370config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
371 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
372 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
373 help
374 Some Rockchip BROM variants (e.g. on the RK3188) load the
375 first stage in segments and enter multiple times. E.g. on
376 the RK3188, the first 1KB of the first stage are loaded
377 first and entered; after returning to the BROM, the
378 remainder of the first stage is loaded, but the BROM
379 re-enters at the same address/to the same code as previously.
380
381 This enables support code in the BOOT0 hook for the TPL stage
382 to allow multiple entries.
383
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400384config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200385 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400386
Simon Glass88315f72020-07-19 13:55:57 -0600387config ROCKCHIP_SPI_IMAGE
388 bool "Build a SPI image for rockchip"
389 depends on HAS_ROM
390 help
391 Some Rockchip SoCs support booting from SPI flash. Enable this
392 option to produce a 4MB SPI-flash image (called u-boot.rom)
393 containing U-Boot. The image is built by binman. U-Boot sits near
394 the start of the image.
395
Heiko Stuebnerfc367852019-07-16 22:18:21 +0200396source "arch/arm/mach-rockchip/px30/Kconfig"
huang lin1115b642015-11-17 14:20:27 +0800397source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800398source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100399source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800400source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200401source "arch/arm/mach-rockchip/rk3288/Kconfig"
Andy Yanb5e16302019-11-14 11:21:12 +0800402source "arch/arm/mach-rockchip/rk3308/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800403source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800404source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800405source "arch/arm/mach-rockchip/rk3399/Kconfig"
Joseph Chen16899892021-06-02 16:13:46 +0800406source "arch/arm/mach-rockchip/rk3568/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800407source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600408endif