blob: da6871eb182b65de5e61131aacd2162b427ce90b [file] [log] [blame]
Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stuebnerfc367852019-07-16 22:18:21 +02003config ROCKCHIP_PX30
4 bool "Support Rockchip PX30"
5 select ARM64
6 select SUPPORT_SPL
7 select SUPPORT_TPL
8 select SPL
9 select TPL
10 select TPL_TINY_FRAMEWORK if TPL
11 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
12 select TPL_NEEDS_SEPARATE_STACK if TPL
13 imply SPL_SEPARATE_BSS
Simon Glassf4d60392021-08-08 12:20:12 -060014 select SPL_SERIAL
15 select TPL_SERIAL
Heiko Stuebnerfc367852019-07-16 22:18:21 +020016 select DEBUG_UART_BOARD_INIT
17 imply ROCKCHIP_COMMON_BOARD
18 imply SPL_ROCKCHIP_COMMON_BOARD
19 help
20 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020025config ROCKCHIP_RK3036
26 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +080028 select SUPPORT_SPL
29 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +080030 imply USB_FUNCTION_ROCKUSB
31 imply CMD_ROCKUSB
Kever Yang427cb672019-07-22 20:02:04 +080032 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020033 help
34 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
35 including NEON and GPU, Mali-400 graphics, several DDR3 options
36 and video codec support. Peripherals include Gigabit Ethernet,
37 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
38
Kever Yangaa827752017-11-28 16:04:16 +080039config ROCKCHIP_RK3128
40 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053041 select CPU_V7A
Kever Yang96362722019-07-22 20:02:05 +080042 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa827752017-11-28 16:04:16 +080043 help
44 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
45 including NEON and GPU, Mali-400 graphics, several DDR3 options
46 and video codec support. Peripherals include Gigabit Ethernet,
47 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
48
Heiko Stübneref6db5e2017-02-18 19:46:36 +010049config ROCKCHIP_RK3188
50 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053051 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080052 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010053 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010054 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020055 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020056 select SPL_REGMAP
57 select SPL_SYSCON
58 select SPL_RAM
Simon Glass284cb9c2021-07-10 21:14:31 -060059 select SPL_DRIVERS_MISC
Philipp Tomsich16c689c2017-10-10 16:21:15 +020060 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080061 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020062 select BOARD_LATE_INIT
Kever Yangbfd3f872019-07-22 20:02:09 +080063 imply ROCKCHIP_COMMON_BOARD
Kever Yang3bd90402019-07-22 19:59:18 +080064 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübneref6db5e2017-02-18 19:46:36 +010065 help
66 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
67 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
68 video interfaces, several memory options and video codec support.
69 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
70 UART, SPI, I2C and PWMs.
71
Kever Yang57d4dbf2017-06-23 17:17:52 +080072config ROCKCHIP_RK322X
73 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053074 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080075 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080076 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080077 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080078 select SPL_DM
79 select SPL_OF_LIBFDT
80 select TPL
81 select TPL_DM
82 select TPL_OF_LIBFDT
83 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
84 select TPL_NEEDS_SEPARATE_STACK if TPL
Simon Glass284cb9c2021-07-10 21:14:31 -060085 select SPL_DRIVERS_MISC
Kever Yang0b517732019-07-22 20:02:07 +080086 imply ROCKCHIP_COMMON_BOARD
Simon Glassf4d60392021-08-08 12:20:12 -060087 imply SPL_SERIAL
Kever Yangd877fd22019-07-22 19:59:20 +080088 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glassf4d60392021-08-08 12:20:12 -060089 imply TPL_SERIAL
Kever Yang466f3fd2019-07-09 22:05:56 +080090 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080091 select TPL_LIBCOMMON_SUPPORT
92 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080093 help
94 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
95 including NEON and GPU, Mali-400 graphics, several DDR3 options
96 and video codec support. Peripherals include Gigabit Ethernet,
97 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
98
Simon Glass2cffe662015-08-30 16:55:38 -060099config ROCKCHIP_RK3288
100 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530101 select CPU_V7A
Jagan Tekif461f452020-07-21 12:16:38 +0530102 select OF_BOARD_SETUP
Tom Rinie1e85442021-08-27 21:18:30 -0400103 select SKIP_LOWLEVEL_INIT_ONLY
Kever Yang0d3d7832016-07-19 21:16:59 +0800104 select SUPPORT_SPL
105 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +0800106 select SUPPORT_TPL
Jagan Teki7b7cc952020-01-23 19:42:19 +0530107 imply PRE_CONSOLE_BUFFER
Kever Yangba875012019-07-22 20:02:15 +0800108 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa67deb2019-07-22 19:59:27 +0800109 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +0800110 imply TPL_CLK
111 imply TPL_DM
Simon Glass284cb9c2021-07-10 21:14:31 -0600112 imply TPL_DRIVERS_MISC
Kever Yangf7c0a332019-07-02 11:43:05 +0800113 imply TPL_LIBCOMMON_SUPPORT
114 imply TPL_LIBGENERIC_SUPPORT
115 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +0800116 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +0800117 imply TPL_OF_CONTROL
118 imply TPL_OF_PLATDATA
119 imply TPL_RAM
120 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +0800121 imply TPL_ROCKCHIP_COMMON_BOARD
Simon Glassf4d60392021-08-08 12:20:12 -0600122 imply TPL_SERIAL
Kever Yangf7c0a332019-07-02 11:43:05 +0800123 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +0800124 imply USB_FUNCTION_ROCKUSB
125 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -0600126 help
127 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
128 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
129 video interfaces supporting HDMI and eDP, several DDR3 options
130 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100131 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600132
Andy Yanb5e16302019-11-14 11:21:12 +0800133config ROCKCHIP_RK3308
134 bool "Support Rockchip RK3308"
135 select ARM64
136 select DEBUG_UART_BOARD_INIT
137 select SUPPORT_SPL
138 select SUPPORT_TPL
139 select SPL
140 select SPL_ATF
141 select SPL_ATF_NO_PLATFORM_PARAM
142 select SPL_LOAD_FIT
143 imply ROCKCHIP_COMMON_BOARD
144 imply SPL_ROCKCHIP_COMMON_BOARD
145 imply SPL_CLK
146 imply SPL_REGMAP
147 imply SPL_SYSCON
148 imply SPL_RAM
Simon Glassf4d60392021-08-08 12:20:12 -0600149 imply SPL_SERIAL
150 imply TPL_SERIAL
Andy Yanb5e16302019-11-14 11:21:12 +0800151 imply SPL_SEPARATE_BSS
152 help
153 The Rockchip RK3308 is a ARM-based Soc which embedded with quad
154 Cortex-A35 and highly integrated audio interfaces.
155
Kever Yangec02b3c2017-02-23 15:37:51 +0800156config ROCKCHIP_RK3328
157 bool "Support Rockchip RK3328"
158 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300159 select SUPPORT_SPL
160 select SPL
Kever Yang69871852019-08-02 10:40:01 +0300161 select SUPPORT_TPL
162 select TPL
163 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
164 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang205e2cc2019-07-22 20:02:16 +0800165 imply ROCKCHIP_COMMON_BOARD
YouMin Chenb9f7df32019-11-15 11:04:44 +0800166 imply ROCKCHIP_SDRAM_COMMON
Kever Yangbb4c3252019-07-22 19:59:32 +0800167 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glassf4d60392021-08-08 12:20:12 -0600168 imply SPL_SERIAL
169 imply TPL_SERIAL
Kever Yang07be6692019-06-09 00:27:15 +0300170 imply SPL_SEPARATE_BSS
171 select ENABLE_ARM_SOC_BOOT0_HOOK
172 select DEBUG_UART_BOARD_INIT
173 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800174 help
175 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
176 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
177 video interfaces supporting HDMI and eDP, several DDR3 options
178 and video codec support. Peripherals include Gigabit Ethernet,
179 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
180
Andreas Färber9e3ad682017-05-15 17:51:18 +0800181config ROCKCHIP_RK3368
182 bool "Support Rockchip RK3368"
183 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200184 select SUPPORT_SPL
185 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200186 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
187 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang35b401e2019-07-22 20:02:17 +0800188 imply ROCKCHIP_COMMON_BOARD
Kever Yang8bf7ed42019-07-22 19:59:34 +0800189 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200190 imply SPL_SEPARATE_BSS
Simon Glassf4d60392021-08-08 12:20:12 -0600191 imply SPL_SERIAL
192 imply TPL_SERIAL
Kever Yang48831b22019-07-09 22:05:58 +0800193 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800194 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200195 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
196 into a big and little cluster with 4 cores each) Cortex-A53 including
197 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
198 (for the little cluster), PowerVR G6110 based graphics, one video
199 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
200 video codec support.
201
202 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
203 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800204
Kever Yang0d3d7832016-07-19 21:16:59 +0800205config ROCKCHIP_RK3399
206 bool "Support Rockchip RK3399"
207 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800208 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800209 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800210 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530211 select SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530212 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530213 select SPL_LOAD_FIT
214 select SPL_CLK if SPL
215 select SPL_PINCTRL if SPL
216 select SPL_RAM if SPL
217 select SPL_REGMAP if SPL
218 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800219 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
220 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800221 select SPL_SEPARATE_BSS
Simon Glassf4d60392021-08-08 12:20:12 -0600222 select SPL_SERIAL
Simon Glass284cb9c2021-07-10 21:14:31 -0600223 select SPL_DRIVERS_MISC
Jagan Tekicd433892019-05-08 11:11:43 +0530224 select CLK
225 select FIT
226 select PINCTRL
227 select RAM
228 select REGMAP
229 select SYSCON
230 select DM_PMIC
231 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800232 select BOARD_LATE_INIT
Jagan Teki9249d5c2020-04-02 17:11:23 +0530233 imply PRE_CONSOLE_BUFFER
Kever Yang9554a4e2019-07-22 20:02:19 +0800234 imply ROCKCHIP_COMMON_BOARD
YouMin Chen23ae72e2019-11-15 11:04:45 +0800235 imply ROCKCHIP_SDRAM_COMMON
Hugh Cole-Bakerbf0fe0f2020-06-16 00:30:47 +0100236 imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Kever Yangff9afe42019-07-22 19:59:42 +0800237 imply SPL_ROCKCHIP_COMMON_BOARD
Simon Glassf4d60392021-08-08 12:20:12 -0600238 imply TPL_SERIAL
Kever Yangfca798d2018-11-09 11:18:15 +0800239 imply TPL_LIBCOMMON_SUPPORT
240 imply TPL_LIBGENERIC_SUPPORT
241 imply TPL_SYS_MALLOC_SIMPLE
Simon Glass284cb9c2021-07-10 21:14:31 -0600242 imply TPL_DRIVERS_MISC
Kever Yangfca798d2018-11-09 11:18:15 +0800243 imply TPL_OF_CONTROL
244 imply TPL_DM
245 imply TPL_REGMAP
246 imply TPL_SYSCON
247 imply TPL_RAM
248 imply TPL_CLK
249 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800250 imply TPL_ROCKCHIP_COMMON_BOARD
Jagan Tekie7043012020-01-09 14:22:19 +0530251 imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
252 imply CMD_BOOTCOUNT if BOOTCOUNT_LIMIT
Kever Yang0d3d7832016-07-19 21:16:59 +0800253 help
254 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
255 and quad-core Cortex-A53.
256 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
257 video interfaces supporting HDMI and eDP, several DDR3 options
258 and video codec support. Peripherals include Gigabit Ethernet,
259 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
260
Joseph Chen72cd8792021-06-02 15:58:25 +0800261config ROCKCHIP_RK3568
262 bool "Support Rockchip RK3568"
263 select ARM64
264 select CLK
265 select PINCTRL
266 select RAM
267 select REGMAP
268 select SYSCON
269 select BOARD_LATE_INIT
270 imply ROCKCHIP_COMMON_BOARD
271 help
272 The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
273 including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
274 two video interfaces supporting HDMI and eDP, several DDR3 options
275 and video codec support. Peripherals include Gigabit Ethernet,
276 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
277
Andy Yan2d982da2017-06-01 18:00:55 +0800278config ROCKCHIP_RV1108
279 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530280 select CPU_V7A
Kever Yanga2b336e2019-07-22 20:02:21 +0800281 imply ROCKCHIP_COMMON_BOARD
Andy Yan2d982da2017-06-01 18:00:55 +0800282 help
283 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
284 and a DSP.
285
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200286config ROCKCHIP_USB_UART
287 bool "Route uart output to usb pins"
288 help
289 Rockchip SoCs have the ability to route the signals of the debug
290 uart through the d+ and d- pins of a specific usb phy to enable
291 some form of closed-case debugging. With this option supported
292 SoCs will enable this routing as a debug measure.
293
Philipp Tomsich798370f2017-06-29 11:21:15 +0200294config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800295 bool "SPL returns to bootrom"
296 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100297 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800298 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200299 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800300 help
301 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
302 SPL will return to the boot rom, which will then load the U-Boot
303 binary to keep going on.
304
Philipp Tomsich798370f2017-06-29 11:21:15 +0200305config TPL_ROCKCHIP_BACK_TO_BROM
306 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800307 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200308 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800309 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200310 depends on TPL
311 help
312 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
313 SPL will return to the boot rom, which will then load the U-Boot
314 binary to keep going on.
315
Kever Yangbb337732019-07-22 20:02:01 +0800316config ROCKCHIP_COMMON_BOARD
317 bool "Rockchip common board file"
318 help
319 Rockchip SoCs have similar boot process, Common board file is mainly
320 in charge of common process of board_init() and board_late_init() for
321 U-Boot proper.
322
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800323config SPL_ROCKCHIP_COMMON_BOARD
324 bool "Rockchip SPL common board file"
325 depends on SPL
326 help
327 Rockchip SoCs have similar boot process, SPL is mainly in charge of
328 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
329 no TPL for the board.
330
Kever Yang34ead0f2019-07-09 22:05:55 +0800331config TPL_ROCKCHIP_COMMON_BOARD
Thomas Hebbcfbebf82019-12-20 18:05:22 -0800332 bool "Rockchip TPL common board file"
Kever Yang34ead0f2019-07-09 22:05:55 +0800333 depends on TPL
334 help
335 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
336 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
337 common board is a basic TPL board init which can be shared for most
Thomas Hebbfd37f242019-11-13 18:18:03 -0800338 of SoCs to avoid copy-paste for different SoCs.
Kever Yang34ead0f2019-07-09 22:05:55 +0800339
Andy Yan70378cb2017-10-11 15:00:16 +0800340config ROCKCHIP_BOOT_MODE_REG
341 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800342 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800343 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800344 according to the value from this register.
345
Kever Yange484f772017-04-20 17:03:46 +0800346config ROCKCHIP_SPL_RESERVE_IRAM
347 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800348 default 0
Kever Yange484f772017-04-20 17:03:46 +0800349 help
350 SPL may need reserve memory for firmware loaded by SPL, whose load
351 address is in IRAM and may overlay with SPL text area if not
352 reserved.
353
Heiko Stübner355a8802017-02-18 19:46:25 +0100354config ROCKCHIP_BROM_HELPER
355 bool
356
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200357config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
358 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
359 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
360 help
361 Some Rockchip BROM variants (e.g. on the RK3188) load the
362 first stage in segments and enter multiple times. E.g. on
363 the RK3188, the first 1KB of the first stage are loaded
364 first and entered; after returning to the BROM, the
365 remainder of the first stage is loaded, but the BROM
366 re-enters at the same address/to the same code as previously.
367
368 This enables support code in the BOOT0 hook for the SPL stage
369 to allow multiple entries.
370
371config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
372 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
373 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
374 help
375 Some Rockchip BROM variants (e.g. on the RK3188) load the
376 first stage in segments and enter multiple times. E.g. on
377 the RK3188, the first 1KB of the first stage are loaded
378 first and entered; after returning to the BROM, the
379 remainder of the first stage is loaded, but the BROM
380 re-enters at the same address/to the same code as previously.
381
382 This enables support code in the BOOT0 hook for the TPL stage
383 to allow multiple entries.
384
Simon Glassb58bfe02021-08-08 12:20:09 -0600385config SPL_MMC
Philipp Tomsich798370f2017-06-29 11:21:15 +0200386 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400387
Simon Glass88315f72020-07-19 13:55:57 -0600388config ROCKCHIP_SPI_IMAGE
389 bool "Build a SPI image for rockchip"
390 depends on HAS_ROM
391 help
392 Some Rockchip SoCs support booting from SPI flash. Enable this
393 option to produce a 4MB SPI-flash image (called u-boot.rom)
394 containing U-Boot. The image is built by binman. U-Boot sits near
395 the start of the image.
396
Heiko Stuebnerfc367852019-07-16 22:18:21 +0200397source "arch/arm/mach-rockchip/px30/Kconfig"
huang lin1115b642015-11-17 14:20:27 +0800398source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800399source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100400source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800401source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200402source "arch/arm/mach-rockchip/rk3288/Kconfig"
Andy Yanb5e16302019-11-14 11:21:12 +0800403source "arch/arm/mach-rockchip/rk3308/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800404source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800405source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800406source "arch/arm/mach-rockchip/rk3399/Kconfig"
Joseph Chen16899892021-06-02 16:13:46 +0800407source "arch/arm/mach-rockchip/rk3568/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800408source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600409endif