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Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Kever Yang427cb672019-07-22 20:02:04 +080010 imply ROCKCHIP_COMMON_BOARD
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020011 help
12 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
13 including NEON and GPU, Mali-400 graphics, several DDR3 options
14 and video codec support. Peripherals include Gigabit Ethernet,
15 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
16
Kever Yangaa827752017-11-28 16:04:16 +080017config ROCKCHIP_RK3128
18 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053019 select CPU_V7A
Kever Yang96362722019-07-22 20:02:05 +080020 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa827752017-11-28 16:04:16 +080021 help
22 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
23 including NEON and GPU, Mali-400 graphics, several DDR3 options
24 and video codec support. Peripherals include Gigabit Ethernet,
25 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
26
Heiko Stübneref6db5e2017-02-18 19:46:36 +010027config ROCKCHIP_RK3188
28 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053029 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080030 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010031 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010032 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020033 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020034 select SPL_REGMAP
35 select SPL_SYSCON
36 select SPL_RAM
37 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020038 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080039 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020040 select BOARD_LATE_INIT
Kever Yangbfd3f872019-07-22 20:02:09 +080041 imply ROCKCHIP_COMMON_BOARD
Kever Yang3bd90402019-07-22 19:59:18 +080042 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübneref6db5e2017-02-18 19:46:36 +010043 help
44 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
45 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
46 video interfaces, several memory options and video codec support.
47 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
48 UART, SPI, I2C and PWMs.
49
Kever Yang57d4dbf2017-06-23 17:17:52 +080050config ROCKCHIP_RK322X
51 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053052 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080053 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080054 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080055 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080056 select SPL_DM
57 select SPL_OF_LIBFDT
58 select TPL
59 select TPL_DM
60 select TPL_OF_LIBFDT
61 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
62 select TPL_NEEDS_SEPARATE_STACK if TPL
63 select SPL_DRIVERS_MISC_SUPPORT
Kever Yang0b517732019-07-22 20:02:07 +080064 imply ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080065 imply SPL_SERIAL_SUPPORT
Kever Yangd877fd22019-07-22 19:59:20 +080066 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080067 imply TPL_SERIAL_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080068 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080069 select TPL_LIBCOMMON_SUPPORT
70 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080071 help
72 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
73 including NEON and GPU, Mali-400 graphics, several DDR3 options
74 and video codec support. Peripherals include Gigabit Ethernet,
75 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
76
Simon Glass2cffe662015-08-30 16:55:38 -060077config ROCKCHIP_RK3288
78 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053079 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +080080 select SUPPORT_SPL
81 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080082 select SUPPORT_TPL
Kever Yangba875012019-07-22 20:02:15 +080083 imply ROCKCHIP_COMMON_BOARD
Kever Yangaa67deb2019-07-22 19:59:27 +080084 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080085 imply TPL_CLK
86 imply TPL_DM
87 imply TPL_DRIVERS_MISC_SUPPORT
88 imply TPL_LIBCOMMON_SUPPORT
89 imply TPL_LIBGENERIC_SUPPORT
90 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +080091 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +080092 imply TPL_OF_CONTROL
93 imply TPL_OF_PLATDATA
94 imply TPL_RAM
95 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +080096 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080097 imply TPL_SERIAL_SUPPORT
98 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +080099 imply USB_FUNCTION_ROCKUSB
100 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -0600101 help
102 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
103 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
104 video interfaces supporting HDMI and eDP, several DDR3 options
105 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100106 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600107
Kever Yangec02b3c2017-02-23 15:37:51 +0800108config ROCKCHIP_RK3328
109 bool "Support Rockchip RK3328"
110 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300111 select SUPPORT_SPL
112 select SPL
Kever Yang205e2cc2019-07-22 20:02:16 +0800113 imply ROCKCHIP_COMMON_BOARD
Kever Yangbb4c3252019-07-22 19:59:32 +0800114 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yang07be6692019-06-09 00:27:15 +0300115 imply SPL_SERIAL_SUPPORT
116 imply SPL_SEPARATE_BSS
117 select ENABLE_ARM_SOC_BOOT0_HOOK
118 select DEBUG_UART_BOARD_INIT
119 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800120 help
121 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
122 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
123 video interfaces supporting HDMI and eDP, several DDR3 options
124 and video codec support. Peripherals include Gigabit Ethernet,
125 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
126
Andreas Färber9e3ad682017-05-15 17:51:18 +0800127config ROCKCHIP_RK3368
128 bool "Support Rockchip RK3368"
129 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200130 select SUPPORT_SPL
131 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200132 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
133 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang35b401e2019-07-22 20:02:17 +0800134 imply ROCKCHIP_COMMON_BOARD
Kever Yang8bf7ed42019-07-22 19:59:34 +0800135 imply SPL_ROCKCHIP_COMMON_BOARD
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200136 imply SPL_SEPARATE_BSS
137 imply SPL_SERIAL_SUPPORT
138 imply TPL_SERIAL_SUPPORT
Kever Yang48831b22019-07-09 22:05:58 +0800139 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800140 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200141 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
142 into a big and little cluster with 4 cores each) Cortex-A53 including
143 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
144 (for the little cluster), PowerVR G6110 based graphics, one video
145 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
146 video codec support.
147
148 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
149 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800150
Kever Yang0d3d7832016-07-19 21:16:59 +0800151config ROCKCHIP_RK3399
152 bool "Support Rockchip RK3399"
153 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800154 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800155 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800156 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530157 select SPL_ATF
158 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530159 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530160 select SPL_LOAD_FIT
161 select SPL_CLK if SPL
162 select SPL_PINCTRL if SPL
163 select SPL_RAM if SPL
164 select SPL_REGMAP if SPL
165 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800166 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
167 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800168 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200169 select SPL_SERIAL_SUPPORT
170 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530171 select CLK
172 select FIT
173 select PINCTRL
174 select RAM
175 select REGMAP
176 select SYSCON
177 select DM_PMIC
178 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800179 select BOARD_LATE_INIT
Kever Yang9554a4e2019-07-22 20:02:19 +0800180 imply ROCKCHIP_COMMON_BOARD
Kever Yangff9afe42019-07-22 19:59:42 +0800181 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangfca798d2018-11-09 11:18:15 +0800182 imply TPL_SERIAL_SUPPORT
183 imply TPL_LIBCOMMON_SUPPORT
184 imply TPL_LIBGENERIC_SUPPORT
185 imply TPL_SYS_MALLOC_SIMPLE
Kever Yangfca798d2018-11-09 11:18:15 +0800186 imply TPL_DRIVERS_MISC_SUPPORT
187 imply TPL_OF_CONTROL
188 imply TPL_DM
189 imply TPL_REGMAP
190 imply TPL_SYSCON
191 imply TPL_RAM
192 imply TPL_CLK
193 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800194 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang0d3d7832016-07-19 21:16:59 +0800195 help
196 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
197 and quad-core Cortex-A53.
198 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
199 video interfaces supporting HDMI and eDP, several DDR3 options
200 and video codec support. Peripherals include Gigabit Ethernet,
201 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
202
Andy Yan2d982da2017-06-01 18:00:55 +0800203config ROCKCHIP_RV1108
204 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530205 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800206 help
207 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
208 and a DSP.
209
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200210config ROCKCHIP_USB_UART
211 bool "Route uart output to usb pins"
212 help
213 Rockchip SoCs have the ability to route the signals of the debug
214 uart through the d+ and d- pins of a specific usb phy to enable
215 some form of closed-case debugging. With this option supported
216 SoCs will enable this routing as a debug measure.
217
Philipp Tomsich798370f2017-06-29 11:21:15 +0200218config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800219 bool "SPL returns to bootrom"
220 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100221 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800222 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200223 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800224 help
225 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
226 SPL will return to the boot rom, which will then load the U-Boot
227 binary to keep going on.
228
Philipp Tomsich798370f2017-06-29 11:21:15 +0200229config TPL_ROCKCHIP_BACK_TO_BROM
230 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800231 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200232 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800233 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200234 depends on TPL
235 help
236 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
237 SPL will return to the boot rom, which will then load the U-Boot
238 binary to keep going on.
239
Kever Yangbb337732019-07-22 20:02:01 +0800240config ROCKCHIP_COMMON_BOARD
241 bool "Rockchip common board file"
242 help
243 Rockchip SoCs have similar boot process, Common board file is mainly
244 in charge of common process of board_init() and board_late_init() for
245 U-Boot proper.
246
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800247config SPL_ROCKCHIP_COMMON_BOARD
248 bool "Rockchip SPL common board file"
249 depends on SPL
250 help
251 Rockchip SoCs have similar boot process, SPL is mainly in charge of
252 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
253 no TPL for the board.
254
Kever Yang34ead0f2019-07-09 22:05:55 +0800255config TPL_ROCKCHIP_COMMON_BOARD
256 bool ""
257 depends on TPL
258 help
259 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
260 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
261 common board is a basic TPL board init which can be shared for most
262 of SoCs to avoid copy-pase for different SoCs.
263
Andy Yan70378cb2017-10-11 15:00:16 +0800264config ROCKCHIP_BOOT_MODE_REG
265 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800266 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800267 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800268 according to the value from this register.
269
Kever Yange484f772017-04-20 17:03:46 +0800270config ROCKCHIP_SPL_RESERVE_IRAM
271 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800272 default 0
Kever Yange484f772017-04-20 17:03:46 +0800273 help
274 SPL may need reserve memory for firmware loaded by SPL, whose load
275 address is in IRAM and may overlay with SPL text area if not
276 reserved.
277
Heiko Stübner355a8802017-02-18 19:46:25 +0100278config ROCKCHIP_BROM_HELPER
279 bool
280
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200281config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
282 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
283 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
284 help
285 Some Rockchip BROM variants (e.g. on the RK3188) load the
286 first stage in segments and enter multiple times. E.g. on
287 the RK3188, the first 1KB of the first stage are loaded
288 first and entered; after returning to the BROM, the
289 remainder of the first stage is loaded, but the BROM
290 re-enters at the same address/to the same code as previously.
291
292 This enables support code in the BOOT0 hook for the SPL stage
293 to allow multiple entries.
294
295config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
296 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
297 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
298 help
299 Some Rockchip BROM variants (e.g. on the RK3188) load the
300 first stage in segments and enter multiple times. E.g. on
301 the RK3188, the first 1KB of the first stage are loaded
302 first and entered; after returning to the BROM, the
303 remainder of the first stage is loaded, but the BROM
304 re-enters at the same address/to the same code as previously.
305
306 This enables support code in the BOOT0 hook for the TPL stage
307 to allow multiple entries.
308
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400309config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200310 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400311
huang lin1115b642015-11-17 14:20:27 +0800312source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800313source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100314source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800315source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200316source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800317source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800318source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800319source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800320source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600321endif