blob: 464bd0798f62e0c1662c7a58a1b26d3dfd2e2534 [file] [log] [blame]
Trevor Woerner513f6402020-05-06 08:02:41 -04001if ARCH_TEGRA
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09002
Simon Glass035939e2021-07-10 21:14:30 -06003config SPL_GPIO
Simon Glass0bdfc3e2016-09-12 23:18:39 -06004 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glassf4d60392021-08-08 12:20:12 -060012config SPL_SERIAL
Simon Glasse076d6f2016-09-12 23:18:56 -060013 default y
14
Thierry Reding45ad0b02019-04-15 11:32:18 +020015config TEGRA_CLKRST
16 bool
17
Svyatoslav Ryhel7d5a2f42023-02-14 19:35:35 +020018config TEGRA_CRYPTO
19 bool "Tegra AES128 crypto module"
20 select AES
21 default n
22
Thierry Redingc3598a42019-04-15 11:32:19 +020023config TEGRA_GP_PADCTRL
24 bool
25
Stephen Warrenadf3abd2016-07-18 12:17:11 -060026config TEGRA_IVC
27 bool "Tegra IVC protocol"
28 help
29 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
30 (Inter Processor Communication) framework. Within the context of
31 U-Boot, it is typically used for communication between the main CPU
32 and various auxiliary processors.
33
Thierry Reding17987bb2019-04-15 11:32:20 +020034config TEGRA_MC
35 bool
36
Thierry Reding7c0b1502019-04-15 11:32:21 +020037config TEGRA_PINCTRL
38 bool
39
Thierry Reding8ffbcfc2019-04-15 11:32:22 +020040config TEGRA_PMC
41 bool
42
Thierry Redingce7eb162019-04-15 11:32:25 +020043config TEGRA_PMC_SECURE
44 bool
45 depends on TEGRA_PMC
46
Stephen Warren8c29e652015-11-23 10:32:01 -070047config TEGRA_COMMON
48 bool "Tegra common options"
Michal Simek84f3dec2018-07-23 15:55:13 +020049 select BOARD_EARLY_INIT_F
Stephen Warren905752c2016-09-13 10:46:00 -060050 select CLK
Tom Warren7b5002e2015-07-17 08:12:51 -070051 select DM
Tom Warren7b5002e2015-07-17 08:12:51 -070052 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070053 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060054 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060055 select DM_MMC
Simon Glassd8af3c92016-01-30 16:38:01 -070056 select DM_PWM
Stephen Warren905752c2016-09-13 10:46:00 -060057 select DM_RESET
Stephen Warren8c29e652015-11-23 10:32:01 -070058 select DM_SERIAL
59 select DM_SPI
60 select DM_SPI_FLASH
Stephen Warren905752c2016-09-13 10:46:00 -060061 select MISC
Stephen Warren8c29e652015-11-23 10:32:01 -070062 select OF_CONTROL
Michal Simek84f3dec2018-07-23 15:55:13 +020063 select SPI
Michal Simek2e7c8192018-07-23 15:55:14 +020064 imply CMD_DM
Daniel Thompsona9e2c672017-05-19 17:26:58 +010065 imply CRC32_VERIFY
Stephen Warren8c29e652015-11-23 10:32:01 -070066
Stephen Warren905752c2016-09-13 10:46:00 -060067config TEGRA_NO_BPMP
68 bool "Tegra common options for SoCs without BPMP"
69 select TEGRA_CAR
70 select TEGRA_CAR_CLOCK
71 select TEGRA_CAR_RESET
72
Stephen Warren8c29e652015-11-23 10:32:01 -070073config TEGRA_ARMV7_COMMON
74 bool "Tegra 32-bit common options"
Simon Glassa0c32762020-07-19 13:56:00 -060075 select BINMAN
Lokesh Vutla81b1a672018-04-26 18:21:26 +053076 select CPU_V7A
Stephen Warren8c29e652015-11-23 10:32:01 -070077 select SPL
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080078 select SPL_BOARD_INIT if SPL
Tom Rinie1e85442021-08-27 21:18:30 -040079 select SPL_SKIP_LOWLEVEL_INIT_ONLY if SPL
Stephen Warren8c29e652015-11-23 10:32:01 -070080 select SUPPORT_SPL
Svyatoslav Ryhel79a7e412023-02-01 10:53:03 +020081 select TIMER
Thierry Reding45ad0b02019-04-15 11:32:18 +020082 select TEGRA_CLKRST
Stephen Warren8c29e652015-11-23 10:32:01 -070083 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060084 select TEGRA_GPIO
Thierry Redingc3598a42019-04-15 11:32:19 +020085 select TEGRA_GP_PADCTRL
Thierry Reding17987bb2019-04-15 11:32:20 +020086 select TEGRA_MC
Stephen Warren905752c2016-09-13 10:46:00 -060087 select TEGRA_NO_BPMP
Thierry Reding7c0b1502019-04-15 11:32:21 +020088 select TEGRA_PINCTRL
Thierry Reding8ffbcfc2019-04-15 11:32:22 +020089 select TEGRA_PMC
Svyatoslav Ryhel79a7e412023-02-01 10:53:03 +020090 select TEGRA_TIMER
Stephen Warren8c29e652015-11-23 10:32:01 -070091
92config TEGRA_ARMV8_COMMON
93 bool "Tegra 64-bit common options"
94 select ARM64
Masahiro Yamadabf4645c2019-06-26 13:51:46 +090095 select INIT_SP_RELATIVE
Stephen Warreneab36052018-01-03 14:31:52 -070096 select LINUX_KERNEL_IMAGE_HEADER
Thierry Reding29ce1d02019-04-15 11:32:32 +020097 select POSITION_INDEPENDENT
Stephen Warren8c29e652015-11-23 10:32:01 -070098 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070099
Stephen Warreneab36052018-01-03 14:31:52 -0700100if TEGRA_ARMV8_COMMON
101config LNX_KRNL_IMG_TEXT_OFFSET_BASE
102 default 0x80000000
103endif
104
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900105choice
106 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -0500107 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900108
109config TEGRA20
110 bool "Tegra20 family"
Tom Rinibacb52c2017-03-07 07:13:42 -0500111 select ARM_ERRATA_716044
112 select ARM_ERRATA_742230
113 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -0700114 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900115
116config TEGRA30
117 bool "Tegra30 family"
Tom Rinibacb52c2017-03-07 07:13:42 -0500118 select ARM_ERRATA_743622
119 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -0700120 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900121
122config TEGRA114
123 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700124 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900125
126config TEGRA124
127 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700128 select TEGRA_ARMV7_COMMON
Simon Glass0662cf22017-07-25 08:29:58 -0600129 imply REGMAP
130 imply SYSCON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900131
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700132config TEGRA210
133 bool "Tegra210 family"
Tom Rini249f11f2021-08-19 14:19:39 -0400134 select GICV2
Svyatoslav Ryhel79a7e412023-02-01 10:53:03 +0200135 select TIMER
Stephen Warren8c29e652015-11-23 10:32:01 -0700136 select TEGRA_ARMV8_COMMON
Thierry Reding45ad0b02019-04-15 11:32:18 +0200137 select TEGRA_CLKRST
Michal Simek84f3dec2018-07-23 15:55:13 +0200138 select TEGRA_GPIO
Thierry Redingc3598a42019-04-15 11:32:19 +0200139 select TEGRA_GP_PADCTRL
Thierry Reding17987bb2019-04-15 11:32:20 +0200140 select TEGRA_MC
Stephen Warren905752c2016-09-13 10:46:00 -0600141 select TEGRA_NO_BPMP
Thierry Reding7c0b1502019-04-15 11:32:21 +0200142 select TEGRA_PINCTRL
Thierry Reding8ffbcfc2019-04-15 11:32:22 +0200143 select TEGRA_PMC
Thierry Redingce7eb162019-04-15 11:32:25 +0200144 select TEGRA_PMC_SECURE
Svyatoslav Ryhel79a7e412023-02-01 10:53:03 +0200145 select TEGRA_TIMER
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700146
Stephen Warren03667eb2016-05-12 13:32:55 -0600147config TEGRA186
148 bool "Tegra186 family"
Stephen Warrene0e2b262016-06-17 09:43:57 -0600149 select DM_MAILBOX
Tom Rini249f11f2021-08-19 14:19:39 -0400150 select GICV2
Stephen Warrena2148922016-08-08 09:41:34 -0600151 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600152 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600153 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600154 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600155 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600156 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600157 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600158
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900159endchoice
160
Stephen Warren5a44ab42016-01-26 10:59:42 -0700161config TEGRA_DISCONNECT_UDC_ON_BOOT
162 bool "Disconnect USB device mode controller on boot"
Thierry Reding4e9260c2019-04-15 11:32:26 +0200163 depends on CI_UDC
Stephen Warren5a44ab42016-01-26 10:59:42 -0700164 default y
165 help
166 When loading U-Boot into RAM over USB protocols using tools such as
167 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
168 mode controller is initialized and enumerated by the host PC running
169 the tool. Unfortunately, these tools do not shut down the USB
170 controller before executing the downloaded code, and so the host PC
171 does not "de-enumerate" the USB device. This option shuts down the
172 USB controller when U-Boot boots to avoid leaving a stale USB device
173 present.
174
Tom Rinid8d1fb62022-03-30 18:07:13 -0400175config CI_UDC_HAS_HOSTPC
176 def_bool y
177 depends on CI_UDC && !TEGRA20
178
Simon Glass838723b2015-02-11 16:32:59 -0700179config SYS_MALLOC_F_LEN
180 default 0x1800
181
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900182source "arch/arm/mach-tegra/tegra20/Kconfig"
183source "arch/arm/mach-tegra/tegra30/Kconfig"
184source "arch/arm/mach-tegra/tegra114/Kconfig"
185source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700186source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600187source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900188
Tom Rini4b3e7c02022-12-02 16:42:45 -0500189config TEGRA_SPI
190 def_bool y
191 depends on TEGRA20_SFLASH || TEGRA20_SLINK || TEGRA114_SPI
192
193choice
194 prompt "UART to use for console"
195 depends on TEGRA_PINCTRL
196 default TEGRA_ENABLE_UARTA
197
198config TEGRA_ENABLE_UARTA
199 bool "Use UARTA"
200
201config TEGRA_ENABLE_UARTB
202 bool "Use UARTB"
203
204config TEGRA_ENABLE_UARTC
205 bool "Use UARTC"
206
207config TEGRA_ENABLE_UARTD
208 bool "Use UARTD"
209
210endchoice
211
Tom Rini4dbaf6f2022-06-08 08:24:33 -0400212config TEGRA_GPU
213 bool "Enable setting up the GPU"
214 depends on TEGRA124 || TEGRA210
215
Simon Glassbd74b032017-05-17 03:25:11 -0600216config CMD_ENTERRCM
217 bool "Enable 'enterrcm' command"
218 default y
219 help
220 Tegra's boot ROM supports a mode whereby code may be downloaded and
221 flash-programmed over a USB connection. On dev boards, this is
222 typically entered by holding down a "force recovery" button and
223 resetting the CPU. However, not all boards have such a button (one
224 example is the Compulab Trimslice), so a method to enter RCM from
225 software is useful.
226
227 Even on boards other than Trimslice, controlling this over a UART
228 may be useful, e.g. to allow simple remote control without the need
229 for mechanical button actuators, or hooking up relays/... to the
230 button.
231
Ramin Khonsarif2f708d2023-02-14 19:35:37 +0200232config CMD_EBTUPDATE
233 bool "Enable 'ebtupdate' command"
Svyatoslav Ryhelf8700e42023-02-14 19:35:38 +0200234 depends on TEGRA20 || TEGRA30
Ramin Khonsarif2f708d2023-02-14 19:35:37 +0200235 select TEGRA_CRYPTO
236 help
237 Updating u-boot from within u-boot in rather complex or even
238 impossible on production devices. To make it easier procedure of
239 re-cryption was created. If your device was re-crypted choose Y.
240
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900241endif