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Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Stephen Warrenadf3abd2016-07-18 12:17:11 -060015config TEGRA_IVC
16 bool "Tegra IVC protocol"
17 help
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19 (Inter Processor Communication) framework. Within the context of
20 U-Boot, it is typically used for communication between the main CPU
21 and various auxiliary processors.
22
Stephen Warren8c29e652015-11-23 10:32:01 -070023config TEGRA_COMMON
24 bool "Tegra common options"
Stephen Warren905752c2016-09-13 10:46:00 -060025 select CLK
Tom Warren7b5002e2015-07-17 08:12:51 -070026 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070027 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070028 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070029 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060030 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060031 select DM_MMC
Simon Glassd8af3c92016-01-30 16:38:01 -070032 select DM_PWM
Stephen Warren905752c2016-09-13 10:46:00 -060033 select DM_RESET
Stephen Warren8c29e652015-11-23 10:32:01 -070034 select DM_SERIAL
35 select DM_SPI
36 select DM_SPI_FLASH
Stephen Warren905752c2016-09-13 10:46:00 -060037 select MISC
Adam Ford4e96ff82018-04-15 13:51:26 -040038 select SPI
Stephen Warren8c29e652015-11-23 10:32:01 -070039 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -070040 select VIDCONSOLE_AS_LCD if DM_VIDEO
Simon Glass7a99a872017-01-23 13:31:20 -070041 select BOARD_EARLY_INIT_F
Simon Glass878c09b2017-11-13 18:55:06 -070042 select BINMAN
Daniel Thompsona9e2c672017-05-19 17:26:58 +010043 imply CRC32_VERIFY
Stephen Warren8c29e652015-11-23 10:32:01 -070044
Stephen Warren905752c2016-09-13 10:46:00 -060045config TEGRA_NO_BPMP
46 bool "Tegra common options for SoCs without BPMP"
47 select TEGRA_CAR
48 select TEGRA_CAR_CLOCK
49 select TEGRA_CAR_RESET
50
Stephen Warren8c29e652015-11-23 10:32:01 -070051config TEGRA_ARMV7_COMMON
52 bool "Tegra 32-bit common options"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053053 select CPU_V7A
Stephen Warren8c29e652015-11-23 10:32:01 -070054 select SPL
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080055 select SPL_BOARD_INIT if SPL
Stephen Warren8c29e652015-11-23 10:32:01 -070056 select SUPPORT_SPL
57 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060058 select TEGRA_GPIO
Stephen Warren905752c2016-09-13 10:46:00 -060059 select TEGRA_NO_BPMP
Stephen Warren8c29e652015-11-23 10:32:01 -070060
61config TEGRA_ARMV8_COMMON
62 bool "Tegra 64-bit common options"
63 select ARM64
Stephen Warreneab36052018-01-03 14:31:52 -070064 select LINUX_KERNEL_IMAGE_HEADER
Stephen Warren8c29e652015-11-23 10:32:01 -070065 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070066
Stephen Warreneab36052018-01-03 14:31:52 -070067if TEGRA_ARMV8_COMMON
68config LNX_KRNL_IMG_TEXT_OFFSET_BASE
69 default 0x80000000
70endif
71
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090072choice
73 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050074 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090075
76config TEGRA20
77 bool "Tegra20 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050078 select ARM_ERRATA_716044
79 select ARM_ERRATA_742230
80 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070081 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090082
83config TEGRA30
84 bool "Tegra30 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050085 select ARM_ERRATA_743622
86 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070087 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090088
89config TEGRA114
90 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070091 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090092
93config TEGRA124
94 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070095 select TEGRA_ARMV7_COMMON
Simon Glass0662cf22017-07-25 08:29:58 -060096 imply REGMAP
97 imply SYSCON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090098
Tom Warrenab0cc6b2015-03-04 16:36:00 -070099config TEGRA210
100 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -0600101 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700102 select TEGRA_ARMV8_COMMON
Stephen Warren905752c2016-09-13 10:46:00 -0600103 select TEGRA_NO_BPMP
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700104
Stephen Warren03667eb2016-05-12 13:32:55 -0600105config TEGRA186
106 bool "Tegra186 family"
Stephen Warrene0e2b262016-06-17 09:43:57 -0600107 select DM_MAILBOX
Stephen Warrena2148922016-08-08 09:41:34 -0600108 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600109 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600110 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600111 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600112 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600113 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600114 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600115
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900116endchoice
117
Stephen Warren5a44ab42016-01-26 10:59:42 -0700118config TEGRA_DISCONNECT_UDC_ON_BOOT
119 bool "Disconnect USB device mode controller on boot"
120 default y
121 help
122 When loading U-Boot into RAM over USB protocols using tools such as
123 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
124 mode controller is initialized and enumerated by the host PC running
125 the tool. Unfortunately, these tools do not shut down the USB
126 controller before executing the downloaded code, and so the host PC
127 does not "de-enumerate" the USB device. This option shuts down the
128 USB controller when U-Boot boots to avoid leaving a stale USB device
129 present.
130
Simon Glass838723b2015-02-11 16:32:59 -0700131config SYS_MALLOC_F_LEN
132 default 0x1800
133
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900134source "arch/arm/mach-tegra/tegra20/Kconfig"
135source "arch/arm/mach-tegra/tegra30/Kconfig"
136source "arch/arm/mach-tegra/tegra114/Kconfig"
137source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700138source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600139source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900140
Simon Glassbd74b032017-05-17 03:25:11 -0600141config CMD_ENTERRCM
142 bool "Enable 'enterrcm' command"
143 default y
144 help
145 Tegra's boot ROM supports a mode whereby code may be downloaded and
146 flash-programmed over a USB connection. On dev boards, this is
147 typically entered by holding down a "force recovery" button and
148 resetting the CPU. However, not all boards have such a button (one
149 example is the Compulab Trimslice), so a method to enter RCM from
150 software is useful.
151
152 Even on boards other than Trimslice, controlling this over a UART
153 may be useful, e.g. to allow simple remote control without the need
154 for mechanical button actuators, or hooking up relays/... to the
155 button.
156
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900157endif