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git01.mediatek.com / filogic / uboot / fccc9c51a4d7a521c92268aa3d5d4ed62d214af7 / . / arch / arm / mach-tegra / Kconfig
blob: 1eaf40627254d3f8e3992a56a77eaafd34b01ffe [file] [log] [blame]
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]1if TEGRA
2
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600[diff] [blame]3config TEGRA_IVC
4 bool "Tegra IVC protocol"
5 help
6 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
7 (Inter Processor Communication) framework. Within the context of
8 U-Boot, it is typically used for communication between the main CPU
9 and various auxiliary processors.
10
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]11config TEGRA_COMMON
12 bool "Tegra common options"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]13 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -0700[diff] [blame]14 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]15 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]16 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -0600[diff] [blame]17 select DM_KEYBOARD
Simon Glass46fcfc12015-11-19 20:27:02 -0700[diff] [blame]18 select DM_PCI
Simon Glasseca7b0d2015-11-26 19:51:30 -0700[diff] [blame]19 select DM_PCI_COMPAT
Simon Glassd8af3c92016-01-30 16:38:01 -0700[diff] [blame]20 select DM_PWM
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]21 select DM_SERIAL
22 select DM_SPI
23 select DM_SPI_FLASH
24 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -0700[diff] [blame]25 select VIDCONSOLE_AS_LCD if DM_VIDEO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]26
27config TEGRA_ARMV7_COMMON
28 bool "Tegra 32-bit common options"
29 select CPU_V7
30 select SPL
31 select SUPPORT_SPL
32 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -0600[diff] [blame]33 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]34
35config TEGRA_ARMV8_COMMON
36 bool "Tegra 64-bit common options"
37 select ARM64
38 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]39
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]40choice
41 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -0500[diff] [blame]42 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]43
44config TEGRA20
45 bool "Tegra20 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]46 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]47
48config TEGRA30
49 bool "Tegra30 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]50 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]51
52config TEGRA114
53 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]54 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]55
56config TEGRA124
57 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]58 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]59
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]60config TEGRA210
61 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -0600[diff] [blame]62 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]63 select TEGRA_ARMV8_COMMON
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]64
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]65config TEGRA186
66 bool "Tegra186 family"
Stephen Warrene8e3f202016-08-08 11:28:24 -0600[diff] [blame]67 select CLK
Stephen Warrene0e2b262016-06-17 09:43:57 -0600[diff] [blame]68 select DM_MAILBOX
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600[diff] [blame^]69 select DM_RESET
Stephen Warrena2148922016-08-08 09:41:34 -0600[diff] [blame]70 select MISC
71 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600[diff] [blame]72 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]73 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600[diff] [blame^]74 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]75 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600[diff] [blame]76 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600[diff] [blame]77 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]78
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]79endchoice
80
Stephen Warren5a44ab42016-01-26 10:59:42 -0700[diff] [blame]81config TEGRA_DISCONNECT_UDC_ON_BOOT
82 bool "Disconnect USB device mode controller on boot"
83 default y
84 help
85 When loading U-Boot into RAM over USB protocols using tools such as
86 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
87 mode controller is initialized and enumerated by the host PC running
88 the tool. Unfortunately, these tools do not shut down the USB
89 controller before executing the downloaded code, and so the host PC
90 does not "de-enumerate" the USB device. This option shuts down the
91 USB controller when U-Boot boots to avoid leaving a stale USB device
92 present.
93
Simon Glass838723b2015-02-11 16:32:59 -0700[diff] [blame]94config SYS_MALLOC_F_LEN
95 default 0x1800
96
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900[diff] [blame]97source "arch/arm/mach-tegra/tegra20/Kconfig"
98source "arch/arm/mach-tegra/tegra30/Kconfig"
99source "arch/arm/mach-tegra/tegra114/Kconfig"
100source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]101source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]102source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]103
104endif