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Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Stephen Warrenadf3abd2016-07-18 12:17:11 -060015config TEGRA_IVC
16 bool "Tegra IVC protocol"
17 help
18 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
19 (Inter Processor Communication) framework. Within the context of
20 U-Boot, it is typically used for communication between the main CPU
21 and various auxiliary processors.
22
Stephen Warren8c29e652015-11-23 10:32:01 -070023config TEGRA_COMMON
24 bool "Tegra common options"
Stephen Warren905752c2016-09-13 10:46:00 -060025 select CLK
Tom Warren7b5002e2015-07-17 08:12:51 -070026 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070027 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070028 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070029 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060030 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060031 select DM_MMC
Simon Glassd8af3c92016-01-30 16:38:01 -070032 select DM_PWM
Stephen Warren905752c2016-09-13 10:46:00 -060033 select DM_RESET
Stephen Warren8c29e652015-11-23 10:32:01 -070034 select DM_SERIAL
35 select DM_SPI
36 select DM_SPI_FLASH
Stephen Warren905752c2016-09-13 10:46:00 -060037 select MISC
Stephen Warren8c29e652015-11-23 10:32:01 -070038 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -070039 select VIDCONSOLE_AS_LCD if DM_VIDEO
Simon Glass7a99a872017-01-23 13:31:20 -070040 select BOARD_EARLY_INIT_F
Simon Glass878c09b2017-11-13 18:55:06 -070041 select BINMAN
Daniel Thompsona9e2c672017-05-19 17:26:58 +010042 imply CRC32_VERIFY
Stephen Warren8c29e652015-11-23 10:32:01 -070043
Stephen Warren905752c2016-09-13 10:46:00 -060044config TEGRA_NO_BPMP
45 bool "Tegra common options for SoCs without BPMP"
46 select TEGRA_CAR
47 select TEGRA_CAR_CLOCK
48 select TEGRA_CAR_RESET
49
Stephen Warren8c29e652015-11-23 10:32:01 -070050config TEGRA_ARMV7_COMMON
51 bool "Tegra 32-bit common options"
52 select CPU_V7
53 select SPL
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080054 select SPL_BOARD_INIT if SPL
Stephen Warren8c29e652015-11-23 10:32:01 -070055 select SUPPORT_SPL
56 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060057 select TEGRA_GPIO
Stephen Warren905752c2016-09-13 10:46:00 -060058 select TEGRA_NO_BPMP
Stephen Warren8c29e652015-11-23 10:32:01 -070059
60config TEGRA_ARMV8_COMMON
61 bool "Tegra 64-bit common options"
62 select ARM64
Stephen Warreneab36052018-01-03 14:31:52 -070063 select LINUX_KERNEL_IMAGE_HEADER
Stephen Warren8c29e652015-11-23 10:32:01 -070064 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070065
Stephen Warreneab36052018-01-03 14:31:52 -070066if TEGRA_ARMV8_COMMON
67config LNX_KRNL_IMG_TEXT_OFFSET_BASE
68 default 0x80000000
69endif
70
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090071choice
72 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050073 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090074
75config TEGRA20
76 bool "Tegra20 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050077 select ARM_ERRATA_716044
78 select ARM_ERRATA_742230
79 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070080 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090081
82config TEGRA30
83 bool "Tegra30 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050084 select ARM_ERRATA_743622
85 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070086 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090087
88config TEGRA114
89 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070090 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090091
92config TEGRA124
93 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070094 select TEGRA_ARMV7_COMMON
Simon Glass0662cf22017-07-25 08:29:58 -060095 imply REGMAP
96 imply SYSCON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090097
Tom Warrenab0cc6b2015-03-04 16:36:00 -070098config TEGRA210
99 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -0600100 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700101 select TEGRA_ARMV8_COMMON
Stephen Warren905752c2016-09-13 10:46:00 -0600102 select TEGRA_NO_BPMP
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700103
Stephen Warren03667eb2016-05-12 13:32:55 -0600104config TEGRA186
105 bool "Tegra186 family"
Stephen Warrene0e2b262016-06-17 09:43:57 -0600106 select DM_MAILBOX
Stephen Warrena2148922016-08-08 09:41:34 -0600107 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600108 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600109 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600110 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600111 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600112 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600113 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600114
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900115endchoice
116
Stephen Warren5a44ab42016-01-26 10:59:42 -0700117config TEGRA_DISCONNECT_UDC_ON_BOOT
118 bool "Disconnect USB device mode controller on boot"
119 default y
120 help
121 When loading U-Boot into RAM over USB protocols using tools such as
122 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
123 mode controller is initialized and enumerated by the host PC running
124 the tool. Unfortunately, these tools do not shut down the USB
125 controller before executing the downloaded code, and so the host PC
126 does not "de-enumerate" the USB device. This option shuts down the
127 USB controller when U-Boot boots to avoid leaving a stale USB device
128 present.
129
Simon Glass838723b2015-02-11 16:32:59 -0700130config SYS_MALLOC_F_LEN
131 default 0x1800
132
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900133source "arch/arm/mach-tegra/tegra20/Kconfig"
134source "arch/arm/mach-tegra/tegra30/Kconfig"
135source "arch/arm/mach-tegra/tegra114/Kconfig"
136source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700137source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600138source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900139
Simon Glassbd74b032017-05-17 03:25:11 -0600140config CMD_ENTERRCM
141 bool "Enable 'enterrcm' command"
142 default y
143 help
144 Tegra's boot ROM supports a mode whereby code may be downloaded and
145 flash-programmed over a USB connection. On dev boards, this is
146 typically entered by holding down a "force recovery" button and
147 resetting the CPU. However, not all boards have such a button (one
148 example is the Compulab Trimslice), so a method to enter RCM from
149 software is useful.
150
151 Even on boards other than Trimslice, controlling this over a UART
152 may be useful, e.g. to allow simple remote control without the need
153 for mechanical button actuators, or hooking up relays/... to the
154 button.
155
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900156endif