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git01.mediatek.com / filogic / uboot / b16c92c17580330ebcd3514ed2c1becaff2e34b8 / . / arch / arm / mach-tegra / Kconfig
blob: d0cc86ea808d5593a7a80cc169ed183dabdb26d7 [file] [log] [blame]
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]1if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -0600[diff] [blame]3config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]6config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame^]9config SPL_LIBGENERIC_SUPPORT
10 default y
11
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600[diff] [blame]12config TEGRA_IVC
13 bool "Tegra IVC protocol"
14 help
15 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
16 (Inter Processor Communication) framework. Within the context of
17 U-Boot, it is typically used for communication between the main CPU
18 and various auxiliary processors.
19
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]20config TEGRA_COMMON
21 bool "Tegra common options"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]22 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -0700[diff] [blame]23 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]24 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]25 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -0600[diff] [blame]26 select DM_KEYBOARD
Simon Glass46fcfc12015-11-19 20:27:02 -0700[diff] [blame]27 select DM_PCI
Simon Glasseca7b0d2015-11-26 19:51:30 -0700[diff] [blame]28 select DM_PCI_COMPAT
Simon Glassd8af3c92016-01-30 16:38:01 -0700[diff] [blame]29 select DM_PWM
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]30 select DM_SERIAL
31 select DM_SPI
32 select DM_SPI_FLASH
33 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -0700[diff] [blame]34 select VIDCONSOLE_AS_LCD if DM_VIDEO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]35
36config TEGRA_ARMV7_COMMON
37 bool "Tegra 32-bit common options"
38 select CPU_V7
39 select SPL
40 select SUPPORT_SPL
41 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -0600[diff] [blame]42 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]43
44config TEGRA_ARMV8_COMMON
45 bool "Tegra 64-bit common options"
46 select ARM64
47 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]48
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]49choice
50 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -0500[diff] [blame]51 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]52
53config TEGRA20
54 bool "Tegra20 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]55 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]56
57config TEGRA30
58 bool "Tegra30 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]59 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]60
61config TEGRA114
62 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]63 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]64
65config TEGRA124
66 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]67 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]68
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]69config TEGRA210
70 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -0600[diff] [blame]71 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]72 select TEGRA_ARMV8_COMMON
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]73
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]74config TEGRA186
75 bool "Tegra186 family"
Stephen Warrene8e3f202016-08-08 11:28:24 -0600[diff] [blame]76 select CLK
Stephen Warrene0e2b262016-06-17 09:43:57 -0600[diff] [blame]77 select DM_MAILBOX
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600[diff] [blame]78 select DM_RESET
Stephen Warrena2148922016-08-08 09:41:34 -0600[diff] [blame]79 select MISC
80 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600[diff] [blame]81 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]82 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600[diff] [blame]83 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]84 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600[diff] [blame]85 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600[diff] [blame]86 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]87
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]88endchoice
89
Stephen Warren5a44ab42016-01-26 10:59:42 -0700[diff] [blame]90config TEGRA_DISCONNECT_UDC_ON_BOOT
91 bool "Disconnect USB device mode controller on boot"
92 default y
93 help
94 When loading U-Boot into RAM over USB protocols using tools such as
95 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
96 mode controller is initialized and enumerated by the host PC running
97 the tool. Unfortunately, these tools do not shut down the USB
98 controller before executing the downloaded code, and so the host PC
99 does not "de-enumerate" the USB device. This option shuts down the
100 USB controller when U-Boot boots to avoid leaving a stale USB device
101 present.
102
Simon Glass838723b2015-02-11 16:32:59 -0700[diff] [blame]103config SYS_MALLOC_F_LEN
104 default 0x1800
105
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900[diff] [blame]106source "arch/arm/mach-tegra/tegra20/Kconfig"
107source "arch/arm/mach-tegra/tegra30/Kconfig"
108source "arch/arm/mach-tegra/tegra114/Kconfig"
109source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]110source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]111source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]112
113endif