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git01.mediatek.com / filogic / uboot / f6de257d251a3ea12836cd6a2d9935d03dfe5c40 / . / arch / arm / mach-tegra / Kconfig
blob: ce48d25886b2bf6474243a08afae48e732154957 [file] [log] [blame]
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]1if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -0600[diff] [blame]3config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]6config SPL_LIBCOMMON_SUPPORT
7 default y
8
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600[diff] [blame]9config TEGRA_IVC
10 bool "Tegra IVC protocol"
11 help
12 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
13 (Inter Processor Communication) framework. Within the context of
14 U-Boot, it is typically used for communication between the main CPU
15 and various auxiliary processors.
16
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]17config TEGRA_COMMON
18 bool "Tegra common options"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]19 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -0700[diff] [blame]20 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]21 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]22 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -0600[diff] [blame]23 select DM_KEYBOARD
Simon Glass46fcfc12015-11-19 20:27:02 -0700[diff] [blame]24 select DM_PCI
Simon Glasseca7b0d2015-11-26 19:51:30 -0700[diff] [blame]25 select DM_PCI_COMPAT
Simon Glassd8af3c92016-01-30 16:38:01 -0700[diff] [blame]26 select DM_PWM
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]27 select DM_SERIAL
28 select DM_SPI
29 select DM_SPI_FLASH
30 select OF_CONTROL
Simon Glassfe4ee972016-02-16 18:09:19 -0700[diff] [blame]31 select VIDCONSOLE_AS_LCD if DM_VIDEO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]32
33config TEGRA_ARMV7_COMMON
34 bool "Tegra 32-bit common options"
35 select CPU_V7
36 select SPL
37 select SUPPORT_SPL
38 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -0600[diff] [blame]39 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]40
41config TEGRA_ARMV8_COMMON
42 bool "Tegra 64-bit common options"
43 select ARM64
44 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]45
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]46choice
47 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -0500[diff] [blame]48 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]49
50config TEGRA20
51 bool "Tegra20 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]52 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]53
54config TEGRA30
55 bool "Tegra30 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]56 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]57
58config TEGRA114
59 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]60 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]61
62config TEGRA124
63 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700[diff] [blame]64 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]65
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]66config TEGRA210
67 bool "Tegra210 family"
Stephen Warrenaf974be2016-05-12 12:07:41 -0600[diff] [blame]68 select TEGRA_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -0700[diff] [blame]69 select TEGRA_ARMV8_COMMON
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]70
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]71config TEGRA186
72 bool "Tegra186 family"
Stephen Warrene8e3f202016-08-08 11:28:24 -0600[diff] [blame]73 select CLK
Stephen Warrene0e2b262016-06-17 09:43:57 -0600[diff] [blame]74 select DM_MAILBOX
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600[diff] [blame]75 select DM_RESET
Stephen Warrena2148922016-08-08 09:41:34 -0600[diff] [blame]76 select MISC
77 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600[diff] [blame]78 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]79 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600[diff] [blame]80 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]81 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600[diff] [blame]82 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600[diff] [blame]83 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]84
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]85endchoice
86
Stephen Warren5a44ab42016-01-26 10:59:42 -0700[diff] [blame]87config TEGRA_DISCONNECT_UDC_ON_BOOT
88 bool "Disconnect USB device mode controller on boot"
89 default y
90 help
91 When loading U-Boot into RAM over USB protocols using tools such as
92 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
93 mode controller is initialized and enumerated by the host PC running
94 the tool. Unfortunately, these tools do not shut down the USB
95 controller before executing the downloaded code, and so the host PC
96 does not "de-enumerate" the USB device. This option shuts down the
97 USB controller when U-Boot boots to avoid leaving a stale USB device
98 present.
99
Simon Glass838723b2015-02-11 16:32:59 -0700[diff] [blame]100config SYS_MALLOC_F_LEN
101 default 0x1800
102
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900[diff] [blame]103source "arch/arm/mach-tegra/tegra20/Kconfig"
104source "arch/arm/mach-tegra/tegra30/Kconfig"
105source "arch/arm/mach-tegra/tegra114/Kconfig"
106source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700[diff] [blame]107source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]108source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900[diff] [blame]109
110endif