blob: be20ac2e804e3dd430473109d4e3483b08ced413 [file] [log] [blame]
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Thierry Reding45ad0b02019-04-15 11:32:18 +020015config TEGRA_CLKRST
16 bool
17
Thierry Redingc3598a42019-04-15 11:32:19 +020018config TEGRA_GP_PADCTRL
19 bool
20
Stephen Warrenadf3abd2016-07-18 12:17:11 -060021config TEGRA_IVC
22 bool "Tegra IVC protocol"
23 help
24 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
25 (Inter Processor Communication) framework. Within the context of
26 U-Boot, it is typically used for communication between the main CPU
27 and various auxiliary processors.
28
Thierry Reding17987bb2019-04-15 11:32:20 +020029config TEGRA_MC
30 bool
31
Thierry Reding7c0b1502019-04-15 11:32:21 +020032config TEGRA_PINCTRL
33 bool
34
Stephen Warren8c29e652015-11-23 10:32:01 -070035config TEGRA_COMMON
36 bool "Tegra common options"
Michal Simek84f3dec2018-07-23 15:55:13 +020037 select BINMAN
38 select BOARD_EARLY_INIT_F
Stephen Warren905752c2016-09-13 10:46:00 -060039 select CLK
Tom Warren7b5002e2015-07-17 08:12:51 -070040 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070041 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070042 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070043 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060044 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060045 select DM_MMC
Simon Glassd8af3c92016-01-30 16:38:01 -070046 select DM_PWM
Stephen Warren905752c2016-09-13 10:46:00 -060047 select DM_RESET
Stephen Warren8c29e652015-11-23 10:32:01 -070048 select DM_SERIAL
49 select DM_SPI
50 select DM_SPI_FLASH
Stephen Warren905752c2016-09-13 10:46:00 -060051 select MISC
Stephen Warren8c29e652015-11-23 10:32:01 -070052 select OF_CONTROL
Michal Simek84f3dec2018-07-23 15:55:13 +020053 select SPI
Simon Glassfe4ee972016-02-16 18:09:19 -070054 select VIDCONSOLE_AS_LCD if DM_VIDEO
Michal Simek2e7c8192018-07-23 15:55:14 +020055 imply CMD_DM
Daniel Thompsona9e2c672017-05-19 17:26:58 +010056 imply CRC32_VERIFY
Stephen Warren8c29e652015-11-23 10:32:01 -070057
Stephen Warren905752c2016-09-13 10:46:00 -060058config TEGRA_NO_BPMP
59 bool "Tegra common options for SoCs without BPMP"
60 select TEGRA_CAR
61 select TEGRA_CAR_CLOCK
62 select TEGRA_CAR_RESET
63
Stephen Warren8c29e652015-11-23 10:32:01 -070064config TEGRA_ARMV7_COMMON
65 bool "Tegra 32-bit common options"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053066 select CPU_V7A
Stephen Warren8c29e652015-11-23 10:32:01 -070067 select SPL
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080068 select SPL_BOARD_INIT if SPL
Stephen Warren8c29e652015-11-23 10:32:01 -070069 select SUPPORT_SPL
Thierry Reding45ad0b02019-04-15 11:32:18 +020070 select TEGRA_CLKRST
Stephen Warren8c29e652015-11-23 10:32:01 -070071 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060072 select TEGRA_GPIO
Thierry Redingc3598a42019-04-15 11:32:19 +020073 select TEGRA_GP_PADCTRL
Thierry Reding17987bb2019-04-15 11:32:20 +020074 select TEGRA_MC
Stephen Warren905752c2016-09-13 10:46:00 -060075 select TEGRA_NO_BPMP
Thierry Reding7c0b1502019-04-15 11:32:21 +020076 select TEGRA_PINCTRL
Stephen Warren8c29e652015-11-23 10:32:01 -070077
78config TEGRA_ARMV8_COMMON
79 bool "Tegra 64-bit common options"
80 select ARM64
Stephen Warreneab36052018-01-03 14:31:52 -070081 select LINUX_KERNEL_IMAGE_HEADER
Stephen Warren8c29e652015-11-23 10:32:01 -070082 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070083
Stephen Warreneab36052018-01-03 14:31:52 -070084if TEGRA_ARMV8_COMMON
85config LNX_KRNL_IMG_TEXT_OFFSET_BASE
86 default 0x80000000
87endif
88
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090089choice
90 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050091 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090092
93config TEGRA20
94 bool "Tegra20 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050095 select ARM_ERRATA_716044
96 select ARM_ERRATA_742230
97 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070098 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090099
100config TEGRA30
101 bool "Tegra30 family"
Tom Rinibacb52c2017-03-07 07:13:42 -0500102 select ARM_ERRATA_743622
103 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -0700104 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900105
106config TEGRA114
107 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700108 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900109
110config TEGRA124
111 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700112 select TEGRA_ARMV7_COMMON
Simon Glass0662cf22017-07-25 08:29:58 -0600113 imply REGMAP
114 imply SYSCON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900115
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700116config TEGRA210
117 bool "Tegra210 family"
Stephen Warren8c29e652015-11-23 10:32:01 -0700118 select TEGRA_ARMV8_COMMON
Thierry Reding45ad0b02019-04-15 11:32:18 +0200119 select TEGRA_CLKRST
Michal Simek84f3dec2018-07-23 15:55:13 +0200120 select TEGRA_GPIO
Thierry Redingc3598a42019-04-15 11:32:19 +0200121 select TEGRA_GP_PADCTRL
Thierry Reding17987bb2019-04-15 11:32:20 +0200122 select TEGRA_MC
Stephen Warren905752c2016-09-13 10:46:00 -0600123 select TEGRA_NO_BPMP
Thierry Reding7c0b1502019-04-15 11:32:21 +0200124 select TEGRA_PINCTRL
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700125
Stephen Warren03667eb2016-05-12 13:32:55 -0600126config TEGRA186
127 bool "Tegra186 family"
Stephen Warrene0e2b262016-06-17 09:43:57 -0600128 select DM_MAILBOX
Stephen Warrena2148922016-08-08 09:41:34 -0600129 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600130 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600131 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600132 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600133 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600134 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600135 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600136
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900137endchoice
138
Stephen Warren5a44ab42016-01-26 10:59:42 -0700139config TEGRA_DISCONNECT_UDC_ON_BOOT
140 bool "Disconnect USB device mode controller on boot"
141 default y
142 help
143 When loading U-Boot into RAM over USB protocols using tools such as
144 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
145 mode controller is initialized and enumerated by the host PC running
146 the tool. Unfortunately, these tools do not shut down the USB
147 controller before executing the downloaded code, and so the host PC
148 does not "de-enumerate" the USB device. This option shuts down the
149 USB controller when U-Boot boots to avoid leaving a stale USB device
150 present.
151
Simon Glass838723b2015-02-11 16:32:59 -0700152config SYS_MALLOC_F_LEN
153 default 0x1800
154
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900155source "arch/arm/mach-tegra/tegra20/Kconfig"
156source "arch/arm/mach-tegra/tegra30/Kconfig"
157source "arch/arm/mach-tegra/tegra114/Kconfig"
158source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700159source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600160source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900161
Simon Glassbd74b032017-05-17 03:25:11 -0600162config CMD_ENTERRCM
163 bool "Enable 'enterrcm' command"
164 default y
165 help
166 Tegra's boot ROM supports a mode whereby code may be downloaded and
167 flash-programmed over a USB connection. On dev boards, this is
168 typically entered by holding down a "force recovery" button and
169 resetting the CPU. However, not all boards have such a button (one
170 example is the Compulab Trimslice), so a method to enter RCM from
171 software is useful.
172
173 Even on boards other than Trimslice, controlling this over a UART
174 may be useful, e.g. to allow simple remote control without the need
175 for mechanical button actuators, or hooking up relays/... to the
176 button.
177
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900178endif