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Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Thierry Reding45ad0b02019-04-15 11:32:18 +020015config TEGRA_CLKRST
16 bool
17
Stephen Warrenadf3abd2016-07-18 12:17:11 -060018config TEGRA_IVC
19 bool "Tegra IVC protocol"
20 help
21 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
22 (Inter Processor Communication) framework. Within the context of
23 U-Boot, it is typically used for communication between the main CPU
24 and various auxiliary processors.
25
Stephen Warren8c29e652015-11-23 10:32:01 -070026config TEGRA_COMMON
27 bool "Tegra common options"
Michal Simek84f3dec2018-07-23 15:55:13 +020028 select BINMAN
29 select BOARD_EARLY_INIT_F
Stephen Warren905752c2016-09-13 10:46:00 -060030 select CLK
Tom Warren7b5002e2015-07-17 08:12:51 -070031 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070032 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070033 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070034 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060035 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060036 select DM_MMC
Simon Glassd8af3c92016-01-30 16:38:01 -070037 select DM_PWM
Stephen Warren905752c2016-09-13 10:46:00 -060038 select DM_RESET
Stephen Warren8c29e652015-11-23 10:32:01 -070039 select DM_SERIAL
40 select DM_SPI
41 select DM_SPI_FLASH
Stephen Warren905752c2016-09-13 10:46:00 -060042 select MISC
Stephen Warren8c29e652015-11-23 10:32:01 -070043 select OF_CONTROL
Michal Simek84f3dec2018-07-23 15:55:13 +020044 select SPI
Simon Glassfe4ee972016-02-16 18:09:19 -070045 select VIDCONSOLE_AS_LCD if DM_VIDEO
Michal Simek2e7c8192018-07-23 15:55:14 +020046 imply CMD_DM
Daniel Thompsona9e2c672017-05-19 17:26:58 +010047 imply CRC32_VERIFY
Stephen Warren8c29e652015-11-23 10:32:01 -070048
Stephen Warren905752c2016-09-13 10:46:00 -060049config TEGRA_NO_BPMP
50 bool "Tegra common options for SoCs without BPMP"
51 select TEGRA_CAR
52 select TEGRA_CAR_CLOCK
53 select TEGRA_CAR_RESET
54
Stephen Warren8c29e652015-11-23 10:32:01 -070055config TEGRA_ARMV7_COMMON
56 bool "Tegra 32-bit common options"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053057 select CPU_V7A
Stephen Warren8c29e652015-11-23 10:32:01 -070058 select SPL
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080059 select SPL_BOARD_INIT if SPL
Stephen Warren8c29e652015-11-23 10:32:01 -070060 select SUPPORT_SPL
Thierry Reding45ad0b02019-04-15 11:32:18 +020061 select TEGRA_CLKRST
Stephen Warren8c29e652015-11-23 10:32:01 -070062 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060063 select TEGRA_GPIO
Stephen Warren905752c2016-09-13 10:46:00 -060064 select TEGRA_NO_BPMP
Stephen Warren8c29e652015-11-23 10:32:01 -070065
66config TEGRA_ARMV8_COMMON
67 bool "Tegra 64-bit common options"
68 select ARM64
Stephen Warreneab36052018-01-03 14:31:52 -070069 select LINUX_KERNEL_IMAGE_HEADER
Stephen Warren8c29e652015-11-23 10:32:01 -070070 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070071
Stephen Warreneab36052018-01-03 14:31:52 -070072if TEGRA_ARMV8_COMMON
73config LNX_KRNL_IMG_TEXT_OFFSET_BASE
74 default 0x80000000
75endif
76
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090077choice
78 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050079 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090080
81config TEGRA20
82 bool "Tegra20 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050083 select ARM_ERRATA_716044
84 select ARM_ERRATA_742230
85 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070086 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090087
88config TEGRA30
89 bool "Tegra30 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050090 select ARM_ERRATA_743622
91 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -070092 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090093
94config TEGRA114
95 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -070096 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090097
98config TEGRA124
99 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700100 select TEGRA_ARMV7_COMMON
Simon Glass0662cf22017-07-25 08:29:58 -0600101 imply REGMAP
102 imply SYSCON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900103
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700104config TEGRA210
105 bool "Tegra210 family"
Stephen Warren8c29e652015-11-23 10:32:01 -0700106 select TEGRA_ARMV8_COMMON
Thierry Reding45ad0b02019-04-15 11:32:18 +0200107 select TEGRA_CLKRST
Michal Simek84f3dec2018-07-23 15:55:13 +0200108 select TEGRA_GPIO
Stephen Warren905752c2016-09-13 10:46:00 -0600109 select TEGRA_NO_BPMP
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700110
Stephen Warren03667eb2016-05-12 13:32:55 -0600111config TEGRA186
112 bool "Tegra186 family"
Stephen Warrene0e2b262016-06-17 09:43:57 -0600113 select DM_MAILBOX
Stephen Warrena2148922016-08-08 09:41:34 -0600114 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600115 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600116 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600117 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600118 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600119 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600120 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600121
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900122endchoice
123
Stephen Warren5a44ab42016-01-26 10:59:42 -0700124config TEGRA_DISCONNECT_UDC_ON_BOOT
125 bool "Disconnect USB device mode controller on boot"
126 default y
127 help
128 When loading U-Boot into RAM over USB protocols using tools such as
129 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
130 mode controller is initialized and enumerated by the host PC running
131 the tool. Unfortunately, these tools do not shut down the USB
132 controller before executing the downloaded code, and so the host PC
133 does not "de-enumerate" the USB device. This option shuts down the
134 USB controller when U-Boot boots to avoid leaving a stale USB device
135 present.
136
Simon Glass838723b2015-02-11 16:32:59 -0700137config SYS_MALLOC_F_LEN
138 default 0x1800
139
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900140source "arch/arm/mach-tegra/tegra20/Kconfig"
141source "arch/arm/mach-tegra/tegra30/Kconfig"
142source "arch/arm/mach-tegra/tegra114/Kconfig"
143source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700144source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600145source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900146
Simon Glassbd74b032017-05-17 03:25:11 -0600147config CMD_ENTERRCM
148 bool "Enable 'enterrcm' command"
149 default y
150 help
151 Tegra's boot ROM supports a mode whereby code may be downloaded and
152 flash-programmed over a USB connection. On dev boards, this is
153 typically entered by holding down a "force recovery" button and
154 resetting the CPU. However, not all boards have such a button (one
155 example is the Compulab Trimslice), so a method to enter RCM from
156 software is useful.
157
158 Even on boards other than Trimslice, controlling this over a UART
159 may be useful, e.g. to allow simple remote control without the need
160 for mechanical button actuators, or hooking up relays/... to the
161 button.
162
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900163endif