blob: 97db7340c51c6c36dd7fc2face294d18aba02f31 [file] [log] [blame]
Soby Mathew802f8652014-08-14 16:19:29 +01001#
Manish Pandey3880a362020-01-24 11:54:44 +00002# Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
Varun Wadekar5ee3abc2018-06-12 16:49:12 -07003# Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
Soby Mathew802f8652014-08-14 16:19:29 +01004#
dp-armfa3cf0b2017-05-03 09:38:09 +01005# SPDX-License-Identifier: BSD-3-Clause
Soby Mathew802f8652014-08-14 16:19:29 +01006#
7
Soby Mathew937488b2014-09-22 14:13:34 +01008# Cortex A57 specific optimisation to skip L1 cache flush when
9# cluster is powered down.
10SKIP_A57_L1_FLUSH_PWR_DWN ?=0
11
Sandrine Bailleuxd4817592016-01-13 14:57:38 +000012# Flag to disable the cache non-temporal hint.
13# It is enabled by default.
14A53_DISABLE_NON_TEMPORAL_HINT ?=1
15
16# Flag to disable the cache non-temporal hint.
17# It is enabled by default.
18A57_DISABLE_NON_TEMPORAL_HINT ?=1
19
Varun Wadekar5ee3abc2018-06-12 16:49:12 -070020# Flag to enable higher performance non-cacheable load forwarding.
21# It is disabled by default.
22A57_ENABLE_NONCACHEABLE_LOAD_FWD ?= 0
23
Dimitris Papastamos446f7f12017-11-30 14:53:53 +000024WORKAROUND_CVE_2017_5715 ?=1
Dimitris Papastamose6625ec2018-04-05 14:38:26 +010025WORKAROUND_CVE_2018_3639 ?=1
Dimitris Papastamosba51d9e2018-05-16 11:36:14 +010026DYNAMIC_WORKAROUND_CVE_2018_3639 ?=0
Dimitris Papastamos446f7f12017-11-30 14:53:53 +000027
Manish Pandey3880a362020-01-24 11:54:44 +000028# Flag to indicate internal or external Last level cache
29# By default internal
30NEOVERSE_N1_EXTERNAL_LLC ?=0
31
Varun Wadekar5ee3abc2018-06-12 16:49:12 -070032# Process A57_ENABLE_NONCACHEABLE_LOAD_FWD flag
33$(eval $(call assert_boolean,A57_ENABLE_NONCACHEABLE_LOAD_FWD))
34$(eval $(call add_define,A57_ENABLE_NONCACHEABLE_LOAD_FWD))
35
Soby Mathew937488b2014-09-22 14:13:34 +010036# Process SKIP_A57_L1_FLUSH_PWR_DWN flag
37$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN))
38$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN))
39
Sandrine Bailleuxd4817592016-01-13 14:57:38 +000040# Process A53_DISABLE_NON_TEMPORAL_HINT flag
41$(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT))
42$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT))
43
44# Process A57_DISABLE_NON_TEMPORAL_HINT flag
45$(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT))
46$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT))
47
Dimitris Papastamos446f7f12017-11-30 14:53:53 +000048# Process WORKAROUND_CVE_2017_5715 flag
49$(eval $(call assert_boolean,WORKAROUND_CVE_2017_5715))
50$(eval $(call add_define,WORKAROUND_CVE_2017_5715))
Soby Mathew937488b2014-09-22 14:13:34 +010051
Dimitris Papastamose6625ec2018-04-05 14:38:26 +010052# Process WORKAROUND_CVE_2018_3639 flag
53$(eval $(call assert_boolean,WORKAROUND_CVE_2018_3639))
54$(eval $(call add_define,WORKAROUND_CVE_2018_3639))
55
Dimitris Papastamosba51d9e2018-05-16 11:36:14 +010056$(eval $(call assert_boolean,DYNAMIC_WORKAROUND_CVE_2018_3639))
57$(eval $(call add_define,DYNAMIC_WORKAROUND_CVE_2018_3639))
58
Manish Pandey3880a362020-01-24 11:54:44 +000059$(eval $(call assert_boolean,NEOVERSE_N1_EXTERNAL_LLC))
60$(eval $(call add_define,NEOVERSE_N1_EXTERNAL_LLC))
61
Dimitris Papastamosba51d9e2018-05-16 11:36:14 +010062ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0)
63 ifeq (${WORKAROUND_CVE_2018_3639},0)
64 $(error "Error: WORKAROUND_CVE_2018_3639 must be 1 if DYNAMIC_WORKAROUND_CVE_2018_3639 is 1")
65 endif
66endif
67
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +010068# CPU Errata Build flags.
69# These should be enabled by the platform if the erratum workaround needs to be
70# applied.
Soby Mathew802f8652014-08-14 16:19:29 +010071
Joel Hutton26d16762019-04-10 12:52:52 +010072# Flag to apply erratum 794073 workaround when disabling mmu.
73ERRATA_A9_794073 ?=0
74
Ambroise Vincentd4a51eb2019-03-04 16:56:26 +000075# Flag to apply erratum 816470 workaround during power down. This erratum
76# applies only to revision >= r3p0 of the Cortex A15 cpu.
77ERRATA_A15_816470 ?=0
78
Ambroise Vincent68b38122019-03-05 09:54:21 +000079# Flag to apply erratum 827671 workaround during reset. This erratum applies
80# only to revision >= r3p0 of the Cortex A15 cpu.
81ERRATA_A15_827671 ?=0
82
Ambroise Vincent8cf9eef2019-02-28 16:23:53 +000083# Flag to apply erratum 852421 workaround during reset. This erratum applies
84# only to revision <= r1p2 of the Cortex A17 cpu.
85ERRATA_A17_852421 ?=0
86
Ambroise Vincentfa5c9512019-03-04 13:20:56 +000087# Flag to apply erratum 852423 workaround during reset. This erratum applies
88# only to revision <= r1p2 of the Cortex A17 cpu.
89ERRATA_A17_852423 ?=0
90
Louis Mayencourt8a061272019-04-05 16:25:25 +010091# Flag to apply erratum 855472 workaround during reset. This erratum applies
92# only to revision r0p0 of the Cortex A35 cpu.
93ERRATA_A35_855472 ?=0
94
Ambroise Vincentf5fdfbc2019-02-21 14:16:24 +000095# Flag to apply erratum 819472 workaround during reset. This erratum applies
96# only to revision <= r0p1 of the Cortex A53 cpu.
97ERRATA_A53_819472 ?=0
98
99# Flag to apply erratum 824069 workaround during reset. This erratum applies
100# only to revision <= r0p2 of the Cortex A53 cpu.
101ERRATA_A53_824069 ?=0
102
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +0100103# Flag to apply erratum 826319 workaround during reset. This erratum applies
104# only to revision <= r0p2 of the Cortex A53 cpu.
developer4fceaca2015-07-29 20:55:31 +0800105ERRATA_A53_826319 ?=0
106
Ambroise Vincentf5fdfbc2019-02-21 14:16:24 +0000107# Flag to apply erratum 827319 workaround during reset. This erratum applies
108# only to revision <= r0p2 of the Cortex A53 cpu.
109ERRATA_A53_827319 ?=0
110
Douglas Raillardd56fb042017-06-19 15:38:02 +0100111# Flag to apply erratum 835769 workaround at compile and link time. This
112# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
113# workaround can lead the linker to create "*.stub" sections.
114ERRATA_A53_835769 ?=0
115
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +0100116# Flag to apply erratum 836870 workaround during reset. This erratum applies
117# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this
Douglas Raillardc847f662017-02-15 17:38:43 +0000118# erratum workaround is enabled by default in hardware.
developer4fceaca2015-07-29 20:55:31 +0800119ERRATA_A53_836870 ?=0
120
Douglas Raillardd56fb042017-06-19 15:38:02 +0100121# Flag to apply erratum 843419 workaround at link time.
122# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
123# workaround could lead the linker to emit "*.stub" sections which are 4kB
124# aligned.
125ERRATA_A53_843419 ?=0
126
Andre Przywara00eefd92016-10-06 16:54:53 +0100127# Flag to apply errata 855873 during reset. This errata applies to all
128# revisions of the Cortex A53 CPU, but this firmware workaround only works
129# for revisions r0p3 and higher. Earlier revisions are taken care
130# of by the rich OS.
131ERRATA_A53_855873 ?=0
132
Ambroise Vincent7927fa02019-02-21 16:20:43 +0000133# Flag to apply erratum 768277 workaround during reset. This erratum applies
134# only to revision r0p0 of the Cortex A55 cpu.
135ERRATA_A55_768277 ?=0
136
Ambroise Vincent6f319602019-02-21 16:25:37 +0000137# Flag to apply erratum 778703 workaround during reset. This erratum applies
138# only to revision r0p0 of the Cortex A55 cpu.
139ERRATA_A55_778703 ?=0
140
Ambroise Vincent6a77f052019-02-21 16:27:34 +0000141# Flag to apply erratum 798797 workaround during reset. This erratum applies
142# only to revision r0p0 of the Cortex A55 cpu.
143ERRATA_A55_798797 ?=0
144
Ambroise Vincentdd961f72019-02-21 16:29:16 +0000145# Flag to apply erratum 846532 workaround during reset. This erratum applies
146# only to revision <= r0p1 of the Cortex A55 cpu.
147ERRATA_A55_846532 ?=0
148
Ambroise Vincenta1d64462019-02-21 16:29:50 +0000149# Flag to apply erratum 903758 workaround during reset. This erratum applies
150# only to revision <= r0p1 of the Cortex A55 cpu.
151ERRATA_A55_903758 ?=0
152
Ambroise Vincentb72fe7a2019-05-28 09:52:48 +0100153# Flag to apply erratum 1221012 workaround during reset. This erratum applies
154# only to revision <= r1p0 of the Cortex A55 cpu.
155ERRATA_A55_1221012 ?=0
156
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +0100157# Flag to apply erratum 806969 workaround during reset. This erratum applies
158# only to revision r0p0 of the Cortex A57 cpu.
Soby Mathew802f8652014-08-14 16:19:29 +0100159ERRATA_A57_806969 ?=0
160
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000161# Flag to apply erratum 813419 workaround during reset. This erratum applies
162# only to revision r0p0 of the Cortex A57 cpu.
163ERRATA_A57_813419 ?=0
164
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +0100165# Flag to apply erratum 813420 workaround during reset. This erratum applies
166# only to revision r0p0 of the Cortex A57 cpu.
Soby Mathew802f8652014-08-14 16:19:29 +0100167ERRATA_A57_813420 ?=0
168
Ambroise Vincent1b0db762019-02-21 16:35:07 +0000169# Flag to apply erratum 814670 workaround during reset. This erratum applies
170# only to revision r0p0 of the Cortex A57 cpu.
171ERRATA_A57_814670 ?=0
172
Ambroise Vincentaa2c0292019-02-21 16:35:49 +0000173# Flag to apply erratum 817169 workaround during power down. This erratum
174# applies only to revision <= r0p1 of the Cortex A57 cpu.
175ERRATA_A57_817169 ?=0
176
Sandrine Bailleuxa7e0c532016-04-14 13:32:31 +0100177# Flag to apply erratum 826974 workaround during reset. This erratum applies
178# only to revision <= r1p1 of the Cortex A57 cpu.
179ERRATA_A57_826974 ?=0
180
Sandrine Bailleuxadcbd552016-04-14 14:24:13 +0100181# Flag to apply erratum 826977 workaround during reset. This erratum applies
182# only to revision <= r1p1 of the Cortex A57 cpu.
183ERRATA_A57_826977 ?=0
184
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +0100185# Flag to apply erratum 828024 workaround during reset. This erratum applies
186# only to revision <= r1p1 of the Cortex A57 cpu.
187ERRATA_A57_828024 ?=0
188
Sandrine Bailleux48cbe852016-04-14 14:18:07 +0100189# Flag to apply erratum 829520 workaround during reset. This erratum applies
190# only to revision <= r1p2 of the Cortex A57 cpu.
191ERRATA_A57_829520 ?=0
192
Sandrine Bailleux143ef1a2016-04-21 11:10:52 +0100193# Flag to apply erratum 833471 workaround during reset. This erratum applies
194# only to revision <= r1p2 of the Cortex A57 cpu.
195ERRATA_A57_833471 ?=0
196
Eleanor Bonnici0c9bd272017-08-02 16:35:04 +0100197# Flag to apply erratum 855972 workaround during reset. This erratum applies
198# only to revision <= r1p3 of the Cortex A57 cpu.
199ERRATA_A57_859972 ?=0
200
Eleanor Bonnicic3b4ca12017-08-02 18:33:41 +0100201# Flag to apply erratum 855971 workaround during reset. This erratum applies
202# only to revision <= r0p3 of the Cortex A72 cpu.
203ERRATA_A72_859971 ?=0
204
Louis Mayencourtd69722c2019-02-27 14:24:16 +0000205# Flag to apply erratum 852427 workaround during reset. This erratum applies
206# only to revision r0p0 of the Cortex A73 cpu.
207ERRATA_A73_852427 ?=0
208
Louis Mayencourt4405de62019-02-21 16:38:16 +0000209# Flag to apply erratum 855423 workaround during reset. This erratum applies
210# only to revision <= r0p1 of the Cortex A73 cpu.
211ERRATA_A73_855423 ?=0
212
Louis Mayencourt78a0aed2019-02-20 12:11:41 +0000213# Flag to apply erratum 764081 workaround during reset. This erratum applies
214# only to revision <= r0p0 of the Cortex A75 cpu.
215ERRATA_A75_764081 ?=0
216
Louis Mayencourt8d868702019-02-25 14:57:57 +0000217# Flag to apply erratum 790748 workaround during reset. This erratum applies
218# only to revision <= r0p0 of the Cortex A75 cpu.
219ERRATA_A75_790748 ?=0
220
Louis Mayencourt59fa2182019-02-25 15:17:44 +0000221# Flag to apply erratum 1073348 workaround during reset. This erratum applies
222# only to revision <= r1p0 of the Cortex A76 cpu.
223ERRATA_A76_1073348 ?=0
224
Louis Mayencourt09924472019-02-21 17:35:07 +0000225# Flag to apply erratum 1130799 workaround during reset. This erratum applies
226# only to revision <= r2p0 of the Cortex A76 cpu.
227ERRATA_A76_1130799 ?=0
228
Louis Mayencourtadda9d42019-02-25 11:37:38 +0000229# Flag to apply erratum 1220197 workaround during reset. This erratum applies
230# only to revision <= r2p0 of the Cortex A76 cpu.
231ERRATA_A76_1220197 ?=0
232
Soby Mathew1d3ba1c2019-05-01 09:43:18 +0100233# Flag to apply erratum 1257314 workaround during reset. This erratum applies
234# only to revision <= r3p0 of the Cortex A76 cpu.
235ERRATA_A76_1257314 ?=0
236
237# Flag to apply erratum 1262606 workaround during reset. This erratum applies
238# only to revision <= r3p0 of the Cortex A76 cpu.
239ERRATA_A76_1262606 ?=0
240
241# Flag to apply erratum 1262888 workaround during reset. This erratum applies
242# only to revision <= r3p0 of the Cortex A76 cpu.
243ERRATA_A76_1262888 ?=0
244
245# Flag to apply erratum 1275112 workaround during reset. This erratum applies
246# only to revision <= r3p0 of the Cortex A76 cpu.
247ERRATA_A76_1275112 ?=0
248
Soby Mathew16d006b2019-05-03 13:17:56 +0100249# Flag to apply erratum 1286807 workaround during reset. This erratum applies
250# only to revision <= r3p0 of the Cortex A76 cpu.
251ERRATA_A76_1286807 ?=0
252
johpow019603f982020-05-29 14:17:38 -0500253# Flag to apply erratum 1791580 workaround during reset. This erratum applies
254# only to revision <= r4p0 of the Cortex A76 cpu.
255ERRATA_A76_1791580 ?=0
256
Madhukar Pappireddy4efede72019-12-18 15:56:27 -0600257# Flag to apply erratum 1688305 workaround during reset. This erratum applies
Jimmy Brisson3571fb92020-06-01 10:18:22 -0500258# to revisions r0p0 - r1p0 of the A78 cpu.
259ERRATA_A78_1688305 ?=0
Madhukar Pappireddy4efede72019-12-18 15:56:27 -0600260
Dimitris Papastamos7ca21db2018-03-26 16:46:01 +0100261# Flag to apply T32 CLREX workaround during reset. This erratum applies
John Tsichritzis56369c12019-02-19 13:49:06 +0000262# only to r0p0 and r1p0 of the Neoverse N1 cpu.
laurenw-armc0763b62020-01-22 13:30:39 -0600263ERRATA_N1_1043202 ?=0
Dimitris Papastamos7ca21db2018-03-26 16:46:01 +0100264
lauwal01bd555f42019-06-24 11:23:50 -0500265# Flag to apply erratum 1073348 workaround during reset. This erratum applies
266# only to revision r0p0 and r1p0 of the Neoverse N1 cpu.
267ERRATA_N1_1073348 ?=0
268
lauwal01363ee3c2019-06-24 11:28:34 -0500269# Flag to apply erratum 1130799 workaround during reset. This erratum applies
270# only to revision <= r2p0 of the Neoverse N1 cpu.
271ERRATA_N1_1130799 ?=0
272
lauwal01f2adb132019-06-24 11:32:40 -0500273# Flag to apply erratum 1165347 workaround during reset. This erratum applies
274# only to revision <= r2p0 of the Neoverse N1 cpu.
275ERRATA_N1_1165347 ?=0
276
lauwal01e1590442019-06-24 11:35:37 -0500277# Flag to apply erratum 1207823 workaround during reset. This erratum applies
278# only to revision <= r2p0 of the Neoverse N1 cpu.
279ERRATA_N1_1207823 ?=0
280
lauwal01197f14c2019-06-24 11:38:53 -0500281# Flag to apply erratum 1220197 workaround during reset. This erratum applies
282# only to revision <= r2p0 of the Neoverse N1 cpu.
283ERRATA_N1_1220197 ?=0
284
lauwal0107c2a232019-06-24 11:42:02 -0500285# Flag to apply erratum 1257314 workaround during reset. This erratum applies
286# only to revision <= r3p0 of the Neoverse N1 cpu.
287ERRATA_N1_1257314 ?=0
288
lauwal0142771af2019-06-24 11:44:58 -0500289# Flag to apply erratum 1262606 workaround during reset. This erratum applies
290# only to revision <= r3p0 of the Neoverse N1 cpu.
291ERRATA_N1_1262606 ?=0
292
lauwal0100396bf2019-06-24 11:47:30 -0500293# Flag to apply erratum 1262888 workaround during reset. This erratum applies
294# only to revision <= r3p0 of the Neoverse N1 cpu.
295ERRATA_N1_1262888 ?=0
296
lauwal01644b6ed2019-06-24 11:49:01 -0500297# Flag to apply erratum 1275112 workaround during reset. This erratum applies
298# only to revision <= r3p0 of the Neoverse N1 cpu.
299ERRATA_N1_1275112 ?=0
300
Andre Przywarab9347402019-05-20 14:57:06 +0100301# Flag to apply erratum 1315703 workaround during reset. This erratum applies
302# to revisions before r3p1 of the Neoverse N1 cpu.
laurenw-armc0763b62020-01-22 13:30:39 -0600303ERRATA_N1_1315703 ?=0
Andre Przywarab9347402019-05-20 14:57:06 +0100304
laurenw-arm94accd32019-08-20 15:51:24 -0500305# Flag to apply erratum 1542419 workaround during reset. This erratum applies
306# to revisions r3p0 - r4p0 of the Neoverse N1 cpu.
307ERRATA_N1_1542419 ?=0
308
Louis Mayencourt4498b152019-04-09 16:29:01 +0100309# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
310# Applying the workaround results in higher DSU power consumption on idle.
311ERRATA_DSU_798953 ?=0
312
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100313# Flag to apply DSU erratum 936184. This erratum applies to DSUs containing
314# the ACP interface and revision < r2p0. Applying the workaround results in
315# higher DSU power consumption on idle.
316ERRATA_DSU_936184 ?=0
317
Joel Hutton26d16762019-04-10 12:52:52 +0100318# Process ERRATA_A9_794073 flag
319$(eval $(call assert_boolean,ERRATA_A9_794073))
320$(eval $(call add_define,ERRATA_A9_794073))
321
Ambroise Vincentd4a51eb2019-03-04 16:56:26 +0000322# Process ERRATA_A15_816470 flag
323$(eval $(call assert_boolean,ERRATA_A15_816470))
324$(eval $(call add_define,ERRATA_A15_816470))
325
Ambroise Vincent68b38122019-03-05 09:54:21 +0000326# Process ERRATA_A15_827671 flag
327$(eval $(call assert_boolean,ERRATA_A15_827671))
328$(eval $(call add_define,ERRATA_A15_827671))
329
Ambroise Vincent8cf9eef2019-02-28 16:23:53 +0000330# Process ERRATA_A17_852421 flag
331$(eval $(call assert_boolean,ERRATA_A17_852421))
332$(eval $(call add_define,ERRATA_A17_852421))
333
Ambroise Vincentfa5c9512019-03-04 13:20:56 +0000334# Process ERRATA_A17_852423 flag
335$(eval $(call assert_boolean,ERRATA_A17_852423))
336$(eval $(call add_define,ERRATA_A17_852423))
337
Louis Mayencourt8a061272019-04-05 16:25:25 +0100338# Process ERRATA_A35_855472 flag
339$(eval $(call assert_boolean,ERRATA_A35_855472))
340$(eval $(call add_define,ERRATA_A35_855472))
341
Ambroise Vincentf5fdfbc2019-02-21 14:16:24 +0000342# Process ERRATA_A53_819472 flag
343$(eval $(call assert_boolean,ERRATA_A53_819472))
344$(eval $(call add_define,ERRATA_A53_819472))
345
346# Process ERRATA_A53_824069 flag
347$(eval $(call assert_boolean,ERRATA_A53_824069))
348$(eval $(call add_define,ERRATA_A53_824069))
349
developer4fceaca2015-07-29 20:55:31 +0800350# Process ERRATA_A53_826319 flag
351$(eval $(call assert_boolean,ERRATA_A53_826319))
352$(eval $(call add_define,ERRATA_A53_826319))
353
Ambroise Vincentf5fdfbc2019-02-21 14:16:24 +0000354# Process ERRATA_A53_827319 flag
355$(eval $(call assert_boolean,ERRATA_A53_827319))
356$(eval $(call add_define,ERRATA_A53_827319))
357
Douglas Raillardd56fb042017-06-19 15:38:02 +0100358# Process ERRATA_A53_835769 flag
359$(eval $(call assert_boolean,ERRATA_A53_835769))
360$(eval $(call add_define,ERRATA_A53_835769))
361
developer4fceaca2015-07-29 20:55:31 +0800362# Process ERRATA_A53_836870 flag
363$(eval $(call assert_boolean,ERRATA_A53_836870))
364$(eval $(call add_define,ERRATA_A53_836870))
365
Douglas Raillardd56fb042017-06-19 15:38:02 +0100366# Process ERRATA_A53_843419 flag
367$(eval $(call assert_boolean,ERRATA_A53_843419))
368$(eval $(call add_define,ERRATA_A53_843419))
369
Andre Przywara00eefd92016-10-06 16:54:53 +0100370# Process ERRATA_A53_855873 flag
371$(eval $(call assert_boolean,ERRATA_A53_855873))
372$(eval $(call add_define,ERRATA_A53_855873))
373
Ambroise Vincent7927fa02019-02-21 16:20:43 +0000374# Process ERRATA_A55_768277 flag
375$(eval $(call assert_boolean,ERRATA_A55_768277))
376$(eval $(call add_define,ERRATA_A55_768277))
377
Ambroise Vincent6f319602019-02-21 16:25:37 +0000378# Process ERRATA_A55_778703 flag
379$(eval $(call assert_boolean,ERRATA_A55_778703))
380$(eval $(call add_define,ERRATA_A55_778703))
381
Ambroise Vincent6a77f052019-02-21 16:27:34 +0000382# Process ERRATA_A55_798797 flag
383$(eval $(call assert_boolean,ERRATA_A55_798797))
384$(eval $(call add_define,ERRATA_A55_798797))
385
Ambroise Vincentdd961f72019-02-21 16:29:16 +0000386# Process ERRATA_A55_846532 flag
387$(eval $(call assert_boolean,ERRATA_A55_846532))
388$(eval $(call add_define,ERRATA_A55_846532))
389
Ambroise Vincenta1d64462019-02-21 16:29:50 +0000390# Process ERRATA_A55_903758 flag
391$(eval $(call assert_boolean,ERRATA_A55_903758))
392$(eval $(call add_define,ERRATA_A55_903758))
393
Ambroise Vincentb72fe7a2019-05-28 09:52:48 +0100394# Process ERRATA_A55_1221012 flag
395$(eval $(call assert_boolean,ERRATA_A55_1221012))
396$(eval $(call add_define,ERRATA_A55_1221012))
397
Soby Mathew802f8652014-08-14 16:19:29 +0100398# Process ERRATA_A57_806969 flag
399$(eval $(call assert_boolean,ERRATA_A57_806969))
400$(eval $(call add_define,ERRATA_A57_806969))
401
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000402# Process ERRATA_A57_813419 flag
403$(eval $(call assert_boolean,ERRATA_A57_813419))
404$(eval $(call add_define,ERRATA_A57_813419))
405
Soby Mathew802f8652014-08-14 16:19:29 +0100406# Process ERRATA_A57_813420 flag
407$(eval $(call assert_boolean,ERRATA_A57_813420))
408$(eval $(call add_define,ERRATA_A57_813420))
Sandrine Bailleuxa7e0c532016-04-14 13:32:31 +0100409
Ambroise Vincent1b0db762019-02-21 16:35:07 +0000410# Process ERRATA_A57_814670 flag
411$(eval $(call assert_boolean,ERRATA_A57_814670))
412$(eval $(call add_define,ERRATA_A57_814670))
413
Ambroise Vincentaa2c0292019-02-21 16:35:49 +0000414# Process ERRATA_A57_817169 flag
415$(eval $(call assert_boolean,ERRATA_A57_817169))
416$(eval $(call add_define,ERRATA_A57_817169))
417
Sandrine Bailleuxa7e0c532016-04-14 13:32:31 +0100418# Process ERRATA_A57_826974 flag
419$(eval $(call assert_boolean,ERRATA_A57_826974))
420$(eval $(call add_define,ERRATA_A57_826974))
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +0100421
Sandrine Bailleuxadcbd552016-04-14 14:24:13 +0100422# Process ERRATA_A57_826977 flag
423$(eval $(call assert_boolean,ERRATA_A57_826977))
424$(eval $(call add_define,ERRATA_A57_826977))
425
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +0100426# Process ERRATA_A57_828024 flag
427$(eval $(call assert_boolean,ERRATA_A57_828024))
428$(eval $(call add_define,ERRATA_A57_828024))
Sandrine Bailleux48cbe852016-04-14 14:18:07 +0100429
430# Process ERRATA_A57_829520 flag
431$(eval $(call assert_boolean,ERRATA_A57_829520))
432$(eval $(call add_define,ERRATA_A57_829520))
Sandrine Bailleux143ef1a2016-04-21 11:10:52 +0100433
434# Process ERRATA_A57_833471 flag
435$(eval $(call assert_boolean,ERRATA_A57_833471))
436$(eval $(call add_define,ERRATA_A57_833471))
Douglas Raillardd56fb042017-06-19 15:38:02 +0100437
Eleanor Bonnici0c9bd272017-08-02 16:35:04 +0100438# Process ERRATA_A57_859972 flag
439$(eval $(call assert_boolean,ERRATA_A57_859972))
440$(eval $(call add_define,ERRATA_A57_859972))
441
Eleanor Bonnicic3b4ca12017-08-02 18:33:41 +0100442# Process ERRATA_A72_859971 flag
443$(eval $(call assert_boolean,ERRATA_A72_859971))
444$(eval $(call add_define,ERRATA_A72_859971))
445
Louis Mayencourtd69722c2019-02-27 14:24:16 +0000446# Process ERRATA_A73_852427 flag
447$(eval $(call assert_boolean,ERRATA_A73_852427))
448$(eval $(call add_define,ERRATA_A73_852427))
449
Louis Mayencourt4405de62019-02-21 16:38:16 +0000450# Process ERRATA_A73_855423 flag
451$(eval $(call assert_boolean,ERRATA_A73_855423))
452$(eval $(call add_define,ERRATA_A73_855423))
453
Louis Mayencourt78a0aed2019-02-20 12:11:41 +0000454# Process ERRATA_A75_764081 flag
455$(eval $(call assert_boolean,ERRATA_A75_764081))
456$(eval $(call add_define,ERRATA_A75_764081))
457
Louis Mayencourt8d868702019-02-25 14:57:57 +0000458# Process ERRATA_A75_790748 flag
459$(eval $(call assert_boolean,ERRATA_A75_790748))
460$(eval $(call add_define,ERRATA_A75_790748))
461
Louis Mayencourt59fa2182019-02-25 15:17:44 +0000462# Process ERRATA_A76_1073348 flag
463$(eval $(call assert_boolean,ERRATA_A76_1073348))
464$(eval $(call add_define,ERRATA_A76_1073348))
465
Louis Mayencourt09924472019-02-21 17:35:07 +0000466# Process ERRATA_A76_1130799 flag
467$(eval $(call assert_boolean,ERRATA_A76_1130799))
468$(eval $(call add_define,ERRATA_A76_1130799))
469
Louis Mayencourtadda9d42019-02-25 11:37:38 +0000470# Process ERRATA_A76_1220197 flag
471$(eval $(call assert_boolean,ERRATA_A76_1220197))
472$(eval $(call add_define,ERRATA_A76_1220197))
473
Soby Mathew1d3ba1c2019-05-01 09:43:18 +0100474# Process ERRATA_A76_1257314 flag
475$(eval $(call assert_boolean,ERRATA_A76_1257314))
476$(eval $(call add_define,ERRATA_A76_1257314))
477
478# Process ERRATA_A76_1262606 flag
479$(eval $(call assert_boolean,ERRATA_A76_1262606))
480$(eval $(call add_define,ERRATA_A76_1262606))
481
482# Process ERRATA_A76_1262888 flag
483$(eval $(call assert_boolean,ERRATA_A76_1262888))
484$(eval $(call add_define,ERRATA_A76_1262888))
485
486# Process ERRATA_A76_1275112 flag
487$(eval $(call assert_boolean,ERRATA_A76_1275112))
488$(eval $(call add_define,ERRATA_A76_1275112))
489
Soby Mathew16d006b2019-05-03 13:17:56 +0100490# Process ERRATA_A76_1286807 flag
491$(eval $(call assert_boolean,ERRATA_A76_1286807))
492$(eval $(call add_define,ERRATA_A76_1286807))
493
johpow019603f982020-05-29 14:17:38 -0500494# Process ERRATA_A76_1791580 flag
495$(eval $(call assert_boolean,ERRATA_A76_1791580))
496$(eval $(call add_define,ERRATA_A76_1791580))
497
Jimmy Brisson3571fb92020-06-01 10:18:22 -0500498# Process ERRATA_A78_1688305 flag
499$(eval $(call assert_boolean,ERRATA_A78_1688305))
500$(eval $(call add_define,ERRATA_A78_1688305))
Madhukar Pappireddy4efede72019-12-18 15:56:27 -0600501
John Tsichritzis56369c12019-02-19 13:49:06 +0000502# Process ERRATA_N1_1043202 flag
503$(eval $(call assert_boolean,ERRATA_N1_1043202))
504$(eval $(call add_define,ERRATA_N1_1043202))
Dimitris Papastamos7ca21db2018-03-26 16:46:01 +0100505
lauwal01bd555f42019-06-24 11:23:50 -0500506# Process ERRATA_N1_1073348 flag
507$(eval $(call assert_boolean,ERRATA_N1_1073348))
508$(eval $(call add_define,ERRATA_N1_1073348))
509
lauwal01363ee3c2019-06-24 11:28:34 -0500510# Process ERRATA_N1_1130799 flag
511$(eval $(call assert_boolean,ERRATA_N1_1130799))
512$(eval $(call add_define,ERRATA_N1_1130799))
513
lauwal01f2adb132019-06-24 11:32:40 -0500514# Process ERRATA_N1_1165347 flag
515$(eval $(call assert_boolean,ERRATA_N1_1165347))
516$(eval $(call add_define,ERRATA_N1_1165347))
517
lauwal01e1590442019-06-24 11:35:37 -0500518# Process ERRATA_N1_1207823 flag
519$(eval $(call assert_boolean,ERRATA_N1_1207823))
520$(eval $(call add_define,ERRATA_N1_1207823))
521
lauwal01197f14c2019-06-24 11:38:53 -0500522# Process ERRATA_N1_1220197 flag
523$(eval $(call assert_boolean,ERRATA_N1_1220197))
524$(eval $(call add_define,ERRATA_N1_1220197))
525
lauwal0107c2a232019-06-24 11:42:02 -0500526# Process ERRATA_N1_1257314 flag
527$(eval $(call assert_boolean,ERRATA_N1_1257314))
528$(eval $(call add_define,ERRATA_N1_1257314))
529
lauwal0142771af2019-06-24 11:44:58 -0500530# Process ERRATA_N1_1262606 flag
531$(eval $(call assert_boolean,ERRATA_N1_1262606))
532$(eval $(call add_define,ERRATA_N1_1262606))
533
lauwal0100396bf2019-06-24 11:47:30 -0500534# Process ERRATA_N1_1262888 flag
535$(eval $(call assert_boolean,ERRATA_N1_1262888))
536$(eval $(call add_define,ERRATA_N1_1262888))
537
lauwal01644b6ed2019-06-24 11:49:01 -0500538# Process ERRATA_N1_1275112 flag
539$(eval $(call assert_boolean,ERRATA_N1_1275112))
540$(eval $(call add_define,ERRATA_N1_1275112))
541
Andre Przywarab9347402019-05-20 14:57:06 +0100542# Process ERRATA_N1_1315703 flag
543$(eval $(call assert_boolean,ERRATA_N1_1315703))
544$(eval $(call add_define,ERRATA_N1_1315703))
545
laurenw-arm94accd32019-08-20 15:51:24 -0500546# Process ERRATA_N1_1542419 flag
547$(eval $(call assert_boolean,ERRATA_N1_1542419))
548$(eval $(call add_define,ERRATA_N1_1542419))
549
Louis Mayencourt4498b152019-04-09 16:29:01 +0100550# Process ERRATA_DSU_798953 flag
551$(eval $(call assert_boolean,ERRATA_DSU_798953))
552$(eval $(call add_define,ERRATA_DSU_798953))
553
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100554# Process ERRATA_DSU_936184 flag
555$(eval $(call assert_boolean,ERRATA_DSU_936184))
556$(eval $(call add_define,ERRATA_DSU_936184))
557
Douglas Raillardd56fb042017-06-19 15:38:02 +0100558# Errata build flags
559ifneq (${ERRATA_A53_843419},0)
Douglas Raillardd0c82732017-06-22 14:44:48 +0100560TF_LDFLAGS_aarch64 += --fix-cortex-a53-843419
Douglas Raillardd56fb042017-06-19 15:38:02 +0100561endif
562
563ifneq (${ERRATA_A53_835769},0)
564TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769
Douglas Raillardd0c82732017-06-22 14:44:48 +0100565TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769
Douglas Raillardd56fb042017-06-19 15:38:02 +0100566endif