| commit | b934740093efe5dfc789d048f4b12e1f7a9e4c9f | [log] [tgz] |
|---|---|---|
| author | Andre Przywara <andre.przywara@arm.com> | Mon May 20 14:57:06 2019 +0100 |
| committer | Andre Przywara <andre.przywara@arm.com> | Thu Jun 06 14:27:37 2019 +0100 |
| tree | 777151cf55daa16119f9035dd5b6d9fa1d7730b8 | |
| parent | 062369ed36836fd958d05f941a9e6c8a18fbe8d9 [diff] |
Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 Neoverse N1 erratum 1315703 is a Cat A (rare) erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUACTLR2_EL1 system register, which will disable the load-bypass-store feature. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdocpjdoc-466751330-1032/index.html Change-Id: I5c708dbe0efa4daa0bcb6bd9622c5efe19c03af9 Signed-off-by: Andre Przywara <andre.przywara@arm.com>