blob: db9198348d3f22eb5c365ca64171c080d159204e [file] [log] [blame]
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +09001if TEGRA
2
Simon Glass0bdfc3e2016-09-12 23:18:39 -06003config SPL_GPIO_SUPPORT
4 default y
5
Simon Glassf2a89462016-09-12 23:18:41 -06006config SPL_LIBCOMMON_SUPPORT
7 default y
8
Simon Glassb16c92c2016-09-12 23:18:43 -06009config SPL_LIBGENERIC_SUPPORT
10 default y
11
Simon Glasse076d6f2016-09-12 23:18:56 -060012config SPL_SERIAL_SUPPORT
13 default y
14
Thierry Reding45ad0b02019-04-15 11:32:18 +020015config TEGRA_CLKRST
16 bool
17
Thierry Redingc3598a42019-04-15 11:32:19 +020018config TEGRA_GP_PADCTRL
19 bool
20
Stephen Warrenadf3abd2016-07-18 12:17:11 -060021config TEGRA_IVC
22 bool "Tegra IVC protocol"
23 help
24 IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
25 (Inter Processor Communication) framework. Within the context of
26 U-Boot, it is typically used for communication between the main CPU
27 and various auxiliary processors.
28
Thierry Reding17987bb2019-04-15 11:32:20 +020029config TEGRA_MC
30 bool
31
Thierry Reding7c0b1502019-04-15 11:32:21 +020032config TEGRA_PINCTRL
33 bool
34
Thierry Reding8ffbcfc2019-04-15 11:32:22 +020035config TEGRA_PMC
36 bool
37
Stephen Warren8c29e652015-11-23 10:32:01 -070038config TEGRA_COMMON
39 bool "Tegra common options"
Michal Simek84f3dec2018-07-23 15:55:13 +020040 select BINMAN
41 select BOARD_EARLY_INIT_F
Stephen Warren905752c2016-09-13 10:46:00 -060042 select CLK
Tom Warren7b5002e2015-07-17 08:12:51 -070043 select DM
Simon Glassa403c9f2015-11-29 13:18:01 -070044 select DM_ETH
Tom Warren7b5002e2015-07-17 08:12:51 -070045 select DM_GPIO
Stephen Warren8c29e652015-11-23 10:32:01 -070046 select DM_I2C
Simon Glass01e99402015-10-18 21:17:16 -060047 select DM_KEYBOARD
Tom Warrena66f7722016-09-13 10:45:48 -060048 select DM_MMC
Simon Glassd8af3c92016-01-30 16:38:01 -070049 select DM_PWM
Stephen Warren905752c2016-09-13 10:46:00 -060050 select DM_RESET
Stephen Warren8c29e652015-11-23 10:32:01 -070051 select DM_SERIAL
52 select DM_SPI
53 select DM_SPI_FLASH
Stephen Warren905752c2016-09-13 10:46:00 -060054 select MISC
Stephen Warren8c29e652015-11-23 10:32:01 -070055 select OF_CONTROL
Michal Simek84f3dec2018-07-23 15:55:13 +020056 select SPI
Simon Glassfe4ee972016-02-16 18:09:19 -070057 select VIDCONSOLE_AS_LCD if DM_VIDEO
Michal Simek2e7c8192018-07-23 15:55:14 +020058 imply CMD_DM
Daniel Thompsona9e2c672017-05-19 17:26:58 +010059 imply CRC32_VERIFY
Stephen Warren8c29e652015-11-23 10:32:01 -070060
Stephen Warren905752c2016-09-13 10:46:00 -060061config TEGRA_NO_BPMP
62 bool "Tegra common options for SoCs without BPMP"
63 select TEGRA_CAR
64 select TEGRA_CAR_CLOCK
65 select TEGRA_CAR_RESET
66
Stephen Warren8c29e652015-11-23 10:32:01 -070067config TEGRA_ARMV7_COMMON
68 bool "Tegra 32-bit common options"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053069 select CPU_V7A
Stephen Warren8c29e652015-11-23 10:32:01 -070070 select SPL
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080071 select SPL_BOARD_INIT if SPL
Stephen Warren8c29e652015-11-23 10:32:01 -070072 select SUPPORT_SPL
Thierry Reding45ad0b02019-04-15 11:32:18 +020073 select TEGRA_CLKRST
Stephen Warren8c29e652015-11-23 10:32:01 -070074 select TEGRA_COMMON
Stephen Warrenaf974be2016-05-12 12:07:41 -060075 select TEGRA_GPIO
Thierry Redingc3598a42019-04-15 11:32:19 +020076 select TEGRA_GP_PADCTRL
Thierry Reding17987bb2019-04-15 11:32:20 +020077 select TEGRA_MC
Stephen Warren905752c2016-09-13 10:46:00 -060078 select TEGRA_NO_BPMP
Thierry Reding7c0b1502019-04-15 11:32:21 +020079 select TEGRA_PINCTRL
Thierry Reding8ffbcfc2019-04-15 11:32:22 +020080 select TEGRA_PMC
Stephen Warren8c29e652015-11-23 10:32:01 -070081
82config TEGRA_ARMV8_COMMON
83 bool "Tegra 64-bit common options"
84 select ARM64
Stephen Warreneab36052018-01-03 14:31:52 -070085 select LINUX_KERNEL_IMAGE_HEADER
Stephen Warren8c29e652015-11-23 10:32:01 -070086 select TEGRA_COMMON
Tom Warren7b5002e2015-07-17 08:12:51 -070087
Stephen Warreneab36052018-01-03 14:31:52 -070088if TEGRA_ARMV8_COMMON
89config LNX_KRNL_IMG_TEXT_OFFSET_BASE
90 default 0x80000000
91endif
92
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090093choice
94 prompt "Tegra SoC select"
Joe Hershbergerf0699602015-05-12 14:46:23 -050095 optional
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +090096
97config TEGRA20
98 bool "Tegra20 family"
Tom Rinibacb52c2017-03-07 07:13:42 -050099 select ARM_ERRATA_716044
100 select ARM_ERRATA_742230
101 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -0700102 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900103
104config TEGRA30
105 bool "Tegra30 family"
Tom Rinibacb52c2017-03-07 07:13:42 -0500106 select ARM_ERRATA_743622
107 select ARM_ERRATA_751472
Tom Warren7b5002e2015-07-17 08:12:51 -0700108 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900109
110config TEGRA114
111 bool "Tegra114 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700112 select TEGRA_ARMV7_COMMON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900113
114config TEGRA124
115 bool "Tegra124 family"
Tom Warren7b5002e2015-07-17 08:12:51 -0700116 select TEGRA_ARMV7_COMMON
Simon Glass0662cf22017-07-25 08:29:58 -0600117 imply REGMAP
118 imply SYSCON
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900119
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700120config TEGRA210
121 bool "Tegra210 family"
Stephen Warren8c29e652015-11-23 10:32:01 -0700122 select TEGRA_ARMV8_COMMON
Thierry Reding45ad0b02019-04-15 11:32:18 +0200123 select TEGRA_CLKRST
Michal Simek84f3dec2018-07-23 15:55:13 +0200124 select TEGRA_GPIO
Thierry Redingc3598a42019-04-15 11:32:19 +0200125 select TEGRA_GP_PADCTRL
Thierry Reding17987bb2019-04-15 11:32:20 +0200126 select TEGRA_MC
Stephen Warren905752c2016-09-13 10:46:00 -0600127 select TEGRA_NO_BPMP
Thierry Reding7c0b1502019-04-15 11:32:21 +0200128 select TEGRA_PINCTRL
Thierry Reding8ffbcfc2019-04-15 11:32:22 +0200129 select TEGRA_PMC
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700130
Stephen Warren03667eb2016-05-12 13:32:55 -0600131config TEGRA186
132 bool "Tegra186 family"
Stephen Warrene0e2b262016-06-17 09:43:57 -0600133 select DM_MAILBOX
Stephen Warrena2148922016-08-08 09:41:34 -0600134 select TEGRA186_BPMP
Stephen Warrene8e3f202016-08-08 11:28:24 -0600135 select TEGRA186_CLOCK
Stephen Warren03667eb2016-05-12 13:32:55 -0600136 select TEGRA186_GPIO
Stephen Warrenfccc9c52016-08-08 11:28:25 -0600137 select TEGRA186_RESET
Stephen Warren03667eb2016-05-12 13:32:55 -0600138 select TEGRA_ARMV8_COMMON
Stephen Warrene0e2b262016-06-17 09:43:57 -0600139 select TEGRA_HSP
Stephen Warrenadf3abd2016-07-18 12:17:11 -0600140 select TEGRA_IVC
Stephen Warren03667eb2016-05-12 13:32:55 -0600141
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900142endchoice
143
Stephen Warren5a44ab42016-01-26 10:59:42 -0700144config TEGRA_DISCONNECT_UDC_ON_BOOT
145 bool "Disconnect USB device mode controller on boot"
146 default y
147 help
148 When loading U-Boot into RAM over USB protocols using tools such as
149 tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
150 mode controller is initialized and enumerated by the host PC running
151 the tool. Unfortunately, these tools do not shut down the USB
152 controller before executing the downloaded code, and so the host PC
153 does not "de-enumerate" the USB device. This option shuts down the
154 USB controller when U-Boot boots to avoid leaving a stale USB device
155 present.
156
Simon Glass838723b2015-02-11 16:32:59 -0700157config SYS_MALLOC_F_LEN
158 default 0x1800
159
Masahiro Yamadaed1632a2015-02-20 17:04:04 +0900160source "arch/arm/mach-tegra/tegra20/Kconfig"
161source "arch/arm/mach-tegra/tegra30/Kconfig"
162source "arch/arm/mach-tegra/tegra114/Kconfig"
163source "arch/arm/mach-tegra/tegra124/Kconfig"
Tom Warrenab0cc6b2015-03-04 16:36:00 -0700164source "arch/arm/mach-tegra/tegra210/Kconfig"
Stephen Warren03667eb2016-05-12 13:32:55 -0600165source "arch/arm/mach-tegra/tegra186/Kconfig"
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900166
Simon Glassbd74b032017-05-17 03:25:11 -0600167config CMD_ENTERRCM
168 bool "Enable 'enterrcm' command"
169 default y
170 help
171 Tegra's boot ROM supports a mode whereby code may be downloaded and
172 flash-programmed over a USB connection. On dev boards, this is
173 typically entered by holding down a "force recovery" button and
174 resetting the CPU. However, not all boards have such a button (one
175 example is the Compulab Trimslice), so a method to enter RCM from
176 software is useful.
177
178 Even on boards other than Trimslice, controlling this over a UART
179 may be useful, e.g. to allow simple remote control without the need
180 for mechanical button actuators, or hooking up relays/... to the
181 button.
182
Masahiro Yamada73a5b1a2014-08-31 07:10:56 +0900183endif