blob: ef9d6e1facd9b6eafd9533844359036e50ee7270 [file] [log] [blame]
Simon Glass2cffe662015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner5c91e2b2016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutla81b1a672018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Caia79b78f2018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner5c91e2b2016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangaa827752017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangaa827752017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübneref6db5e2017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübneref6db5e2017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich5aa3f9d2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich16c689c2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Kever Yangbd8532e2019-07-22 19:59:15 +080037 select SPL_ROCKCHIP_BACK_TO_BROM
Heiko Stübner015f69a2017-04-06 00:19:36 +020038 select BOARD_LATE_INIT
Kever Yang3bd90402019-07-22 19:59:18 +080039 imply SPL_ROCKCHIP_COMMON_BOARD
Heiko Stübneref6db5e2017-02-18 19:46:36 +010040 help
41 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
42 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
43 video interfaces, several memory options and video codec support.
44 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
45 UART, SPI, I2C and PWMs.
46
Kever Yang57d4dbf2017-06-23 17:17:52 +080047config ROCKCHIP_RK322X
48 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053049 select CPU_V7A
Kever Yang57d4dbf2017-06-23 17:17:52 +080050 select SUPPORT_SPL
Kever Yangaff40c62019-04-02 20:41:24 +080051 select SUPPORT_TPL
Kever Yang57d4dbf2017-06-23 17:17:52 +080052 select SPL
Kever Yangaff40c62019-04-02 20:41:24 +080053 select SPL_DM
54 select SPL_OF_LIBFDT
55 select TPL
56 select TPL_DM
57 select TPL_OF_LIBFDT
58 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
59 select TPL_NEEDS_SEPARATE_STACK if TPL
60 select SPL_DRIVERS_MISC_SUPPORT
61 imply SPL_SERIAL_SUPPORT
Kever Yangd877fd22019-07-22 19:59:20 +080062 imply SPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080063 imply TPL_SERIAL_SUPPORT
Kever Yang466f3fd2019-07-09 22:05:56 +080064 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangaff40c62019-04-02 20:41:24 +080065 select TPL_LIBCOMMON_SUPPORT
66 select TPL_LIBGENERIC_SUPPORT
Kever Yang57d4dbf2017-06-23 17:17:52 +080067 help
68 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
69 including NEON and GPU, Mali-400 graphics, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
71 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
72
Simon Glass2cffe662015-08-30 16:55:38 -060073config ROCKCHIP_RK3288
74 bool "Support Rockchip RK3288"
Lokesh Vutla81b1a672018-04-26 18:21:26 +053075 select CPU_V7A
Kever Yang0d3d7832016-07-19 21:16:59 +080076 select SUPPORT_SPL
77 select SPL
Kever Yangf7c0a332019-07-02 11:43:05 +080078 select SUPPORT_TPL
Kever Yangf7c0a332019-07-02 11:43:05 +080079 imply TPL_CLK
80 imply TPL_DM
81 imply TPL_DRIVERS_MISC_SUPPORT
82 imply TPL_LIBCOMMON_SUPPORT
83 imply TPL_LIBGENERIC_SUPPORT
84 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yangb36e7092019-07-02 11:43:06 +080085 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangf7c0a332019-07-02 11:43:05 +080086 imply TPL_OF_CONTROL
87 imply TPL_OF_PLATDATA
88 imply TPL_RAM
89 imply TPL_REGMAP
Kever Yange32f38e2019-07-09 22:05:57 +080090 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangf7c0a332019-07-02 11:43:05 +080091 imply TPL_SERIAL_SUPPORT
92 imply TPL_SYSCON
Eddie Caib3501fe2017-12-15 08:17:13 +080093 imply USB_FUNCTION_ROCKUSB
94 imply CMD_ROCKUSB
Simon Glass2cffe662015-08-30 16:55:38 -060095 help
96 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
97 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
98 video interfaces supporting HDMI and eDP, several DDR3 options
99 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färber531e8e02016-11-02 18:03:01 +0100100 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2cffe662015-08-30 16:55:38 -0600101
Kever Yangec02b3c2017-02-23 15:37:51 +0800102config ROCKCHIP_RK3328
103 bool "Support Rockchip RK3328"
104 select ARM64
Kever Yang07be6692019-06-09 00:27:15 +0300105 select SUPPORT_SPL
106 select SPL
107 imply SPL_SERIAL_SUPPORT
108 imply SPL_SEPARATE_BSS
109 select ENABLE_ARM_SOC_BOOT0_HOOK
110 select DEBUG_UART_BOARD_INIT
111 select SYS_NS16550
Kever Yangec02b3c2017-02-23 15:37:51 +0800112 help
113 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
114 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
115 video interfaces supporting HDMI and eDP, several DDR3 options
116 and video codec support. Peripherals include Gigabit Ethernet,
117 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
118
Andreas Färber9e3ad682017-05-15 17:51:18 +0800119config ROCKCHIP_RK3368
120 bool "Support Rockchip RK3368"
121 select ARM64
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200122 select SUPPORT_SPL
123 select SUPPORT_TPL
Philipp Tomsich01b219e2017-07-28 20:03:07 +0200124 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
125 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich84af43e2017-06-11 23:46:25 +0200126 imply SPL_SEPARATE_BSS
127 imply SPL_SERIAL_SUPPORT
128 imply TPL_SERIAL_SUPPORT
Kever Yang48831b22019-07-09 22:05:58 +0800129 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber9e3ad682017-05-15 17:51:18 +0800130 help
Philipp Tomsich9f3deaf2017-06-10 00:47:53 +0200131 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
132 into a big and little cluster with 4 cores each) Cortex-A53 including
133 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
134 (for the little cluster), PowerVR G6110 based graphics, one video
135 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
136 video codec support.
137
138 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
139 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber9e3ad682017-05-15 17:51:18 +0800140
Kever Yang0d3d7832016-07-19 21:16:59 +0800141config ROCKCHIP_RK3399
142 bool "Support Rockchip RK3399"
143 select ARM64
Kever Yang16efdfd2017-02-22 16:56:38 +0800144 select SUPPORT_SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800145 select SUPPORT_TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800146 select SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530147 select SPL_ATF
148 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekice063b92019-06-21 00:25:03 +0530149 select SPL_BOARD_INIT if SPL
Jagan Tekicd433892019-05-08 11:11:43 +0530150 select SPL_LOAD_FIT
151 select SPL_CLK if SPL
152 select SPL_PINCTRL if SPL
153 select SPL_RAM if SPL
154 select SPL_REGMAP if SPL
155 select SPL_SYSCON if SPL
Kever Yangfca798d2018-11-09 11:18:15 +0800156 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
157 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang16efdfd2017-02-22 16:56:38 +0800158 select SPL_SEPARATE_BSS
Philipp Tomsichd17d8cf2017-07-26 12:29:01 +0200159 select SPL_SERIAL_SUPPORT
160 select SPL_DRIVERS_MISC_SUPPORT
Jagan Tekicd433892019-05-08 11:11:43 +0530161 select CLK
162 select FIT
163 select PINCTRL
164 select RAM
165 select REGMAP
166 select SYSCON
167 select DM_PMIC
168 select DM_REGULATOR_FIXED
Andy Yan70378cb2017-10-11 15:00:16 +0800169 select BOARD_LATE_INIT
Kever Yangfca798d2018-11-09 11:18:15 +0800170 imply TPL_SERIAL_SUPPORT
171 imply TPL_LIBCOMMON_SUPPORT
172 imply TPL_LIBGENERIC_SUPPORT
173 imply TPL_SYS_MALLOC_SIMPLE
Kever Yangfca798d2018-11-09 11:18:15 +0800174 imply TPL_DRIVERS_MISC_SUPPORT
175 imply TPL_OF_CONTROL
176 imply TPL_DM
177 imply TPL_REGMAP
178 imply TPL_SYSCON
179 imply TPL_RAM
180 imply TPL_CLK
181 imply TPL_TINY_MEMSET
Kever Yang3cfbb942019-07-09 22:06:01 +0800182 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang0d3d7832016-07-19 21:16:59 +0800183 help
184 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
185 and quad-core Cortex-A53.
186 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
187 video interfaces supporting HDMI and eDP, several DDR3 options
188 and video codec support. Peripherals include Gigabit Ethernet,
189 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
190
Andy Yan2d982da2017-06-01 18:00:55 +0800191config ROCKCHIP_RV1108
192 bool "Support Rockchip RV1108"
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530193 select CPU_V7A
Andy Yan2d982da2017-06-01 18:00:55 +0800194 help
195 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
196 and a DSP.
197
Heiko Stuebner9cc8feb2018-10-08 13:01:56 +0200198config ROCKCHIP_USB_UART
199 bool "Route uart output to usb pins"
200 help
201 Rockchip SoCs have the ability to route the signals of the debug
202 uart through the d+ and d- pins of a specific usb phy to enable
203 some form of closed-case debugging. With this option supported
204 SoCs will enable this routing as a debug measure.
205
Philipp Tomsich798370f2017-06-29 11:21:15 +0200206config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800207 bool "SPL returns to bootrom"
208 default y if ROCKCHIP_RK3036
Heiko Stübner355a8802017-02-18 19:46:25 +0100209 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800210 select SPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200211 depends on SPL
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800212 help
213 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
214 SPL will return to the boot rom, which will then load the U-Boot
215 binary to keep going on.
216
Philipp Tomsich798370f2017-06-29 11:21:15 +0200217config TPL_ROCKCHIP_BACK_TO_BROM
218 bool "TPL returns to bootrom"
Kever Yangfca798d2018-11-09 11:18:15 +0800219 default y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200220 select ROCKCHIP_BROM_HELPER
Kever Yangbd8532e2019-07-22 19:59:15 +0800221 select TPL_BOOTROM_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200222 depends on TPL
223 help
224 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
225 SPL will return to the boot rom, which will then load the U-Boot
226 binary to keep going on.
227
Kever Yang1d7cc72a2019-07-22 19:59:12 +0800228config SPL_ROCKCHIP_COMMON_BOARD
229 bool "Rockchip SPL common board file"
230 depends on SPL
231 help
232 Rockchip SoCs have similar boot process, SPL is mainly in charge of
233 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
234 no TPL for the board.
235
Kever Yang34ead0f2019-07-09 22:05:55 +0800236config TPL_ROCKCHIP_COMMON_BOARD
237 bool ""
238 depends on TPL
239 help
240 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
241 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
242 common board is a basic TPL board init which can be shared for most
243 of SoCs to avoid copy-pase for different SoCs.
244
Andy Yan70378cb2017-10-11 15:00:16 +0800245config ROCKCHIP_BOOT_MODE_REG
246 hex "Rockchip boot mode flag register address"
Andy Yan70378cb2017-10-11 15:00:16 +0800247 help
Kever Yang9fbe17c2019-03-28 11:01:23 +0800248 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yan70378cb2017-10-11 15:00:16 +0800249 according to the value from this register.
250
Kever Yange484f772017-04-20 17:03:46 +0800251config ROCKCHIP_SPL_RESERVE_IRAM
252 hex "Size of IRAM reserved in SPL"
Kever Yang60a50072017-12-18 15:13:19 +0800253 default 0
Kever Yange484f772017-04-20 17:03:46 +0800254 help
255 SPL may need reserve memory for firmware loaded by SPL, whose load
256 address is in IRAM and may overlay with SPL text area if not
257 reserved.
258
Heiko Stübner355a8802017-02-18 19:46:25 +0100259config ROCKCHIP_BROM_HELPER
260 bool
261
Philipp Tomsich9f1a4472017-10-10 16:21:10 +0200262config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
263 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
264 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
265 help
266 Some Rockchip BROM variants (e.g. on the RK3188) load the
267 first stage in segments and enter multiple times. E.g. on
268 the RK3188, the first 1KB of the first stage are loaded
269 first and entered; after returning to the BROM, the
270 remainder of the first stage is loaded, but the BROM
271 re-enters at the same address/to the same code as previously.
272
273 This enables support code in the BOOT0 hook for the SPL stage
274 to allow multiple entries.
275
276config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
277 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
278 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
279 help
280 Some Rockchip BROM variants (e.g. on the RK3188) load the
281 first stage in segments and enter multiple times. E.g. on
282 the RK3188, the first 1KB of the first stage are loaded
283 first and entered; after returning to the BROM, the
284 remainder of the first stage is loaded, but the BROM
285 re-enters at the same address/to the same code as previously.
286
287 This enables support code in the BOOT0 hook for the TPL stage
288 to allow multiple entries.
289
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400290config SPL_MMC_SUPPORT
Philipp Tomsich798370f2017-06-29 11:21:15 +0200291 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Pattersond70f0f32016-08-29 07:31:16 -0400292
huang lin1115b642015-11-17 14:20:27 +0800293source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangaa827752017-11-28 16:04:16 +0800294source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübneref6db5e2017-02-18 19:46:36 +0100295source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yanga4f460d2017-06-23 17:17:54 +0800296source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner5c91e2b2016-07-16 00:17:15 +0200297source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yangec02b3c2017-02-23 15:37:51 +0800298source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber9e3ad682017-05-15 17:51:18 +0800299source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yang0d3d7832016-07-19 21:16:59 +0800300source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2d982da2017-06-01 18:00:55 +0800301source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2cffe662015-08-30 16:55:38 -0600302endif