Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 1 | /* |
Yann Gautier | b76c61a | 2020-12-16 10:17:35 +0100 | [diff] [blame] | 2 | * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 7 | #include <assert.h> |
Yann Gautier | 658775c | 2021-07-06 10:00:44 +0200 | [diff] [blame] | 8 | #include <errno.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 9 | #include <string.h> |
| 10 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 11 | #include <arch_helpers.h> |
| 12 | #include <common/bl_common.h> |
| 13 | #include <common/debug.h> |
| 14 | #include <common/desc_image_load.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 15 | #include <drivers/generic_delay_timer.h> |
Yann Gautier | a3bd8d1 | 2021-06-18 11:33:26 +0200 | [diff] [blame] | 16 | #include <drivers/mmc.h> |
Yann Gautier | 3edc7c3 | 2019-05-20 19:17:08 +0200 | [diff] [blame] | 17 | #include <drivers/st/bsec.h> |
Pascal Paillet | fc7b805 | 2021-01-29 14:48:49 +0100 | [diff] [blame] | 18 | #include <drivers/st/regulator_fixed.h> |
Yann Gautier | 091eab5 | 2019-06-04 18:06:34 +0200 | [diff] [blame] | 19 | #include <drivers/st/stm32_iwdg.h> |
Yann Gautier | 3d8497c | 2021-10-18 16:06:22 +0200 | [diff] [blame] | 20 | #include <drivers/st/stm32_uart.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 21 | #include <drivers/st/stm32mp1_clk.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 22 | #include <drivers/st/stm32mp1_pwr.h> |
| 23 | #include <drivers/st/stm32mp1_ram.h> |
Yann Gautier | 0c81088 | 2021-12-17 09:53:04 +0100 | [diff] [blame] | 24 | #include <drivers/st/stm32mp_pmic.h> |
Yann Gautier | 658775c | 2021-07-06 10:00:44 +0200 | [diff] [blame] | 25 | #include <lib/fconf/fconf.h> |
| 26 | #include <lib/fconf/fconf_dyn_cfg_getter.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 27 | #include <lib/mmio.h> |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 28 | #include <lib/optee_utils.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 29 | #include <lib/xlat_tables/xlat_tables_v2.h> |
| 30 | #include <plat/common/platform.h> |
| 31 | |
Yann Gautier | 0c81088 | 2021-12-17 09:53:04 +0100 | [diff] [blame] | 32 | #include <platform_def.h> |
Sughosh Ganu | 03e2f80 | 2021-12-01 15:56:27 +0530 | [diff] [blame] | 33 | #include <stm32mp_common.h> |
Yann Gautier | 091eab5 | 2019-06-04 18:06:34 +0200 | [diff] [blame] | 34 | #include <stm32mp1_dbgmcu.h> |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 35 | |
Lionel Debieve | 7bd96f4 | 2019-09-03 12:22:23 +0200 | [diff] [blame] | 36 | static struct stm32mp_auth_ops stm32mp1_auth_ops; |
Yann Gautier | 8593e44 | 2018-11-14 18:46:15 +0100 | [diff] [blame] | 37 | |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 38 | static void print_reset_reason(void) |
| 39 | { |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 40 | uint32_t rstsr = mmio_read_32(stm32mp_rcc_base() + RCC_MP_RSTSCLRR); |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 41 | |
| 42 | if (rstsr == 0U) { |
| 43 | WARN("Reset reason unknown\n"); |
| 44 | return; |
| 45 | } |
| 46 | |
| 47 | INFO("Reset reason (0x%x):\n", rstsr); |
| 48 | |
| 49 | if ((rstsr & RCC_MP_RSTSCLRR_PADRSTF) == 0U) { |
| 50 | if ((rstsr & RCC_MP_RSTSCLRR_STDBYRSTF) != 0U) { |
| 51 | INFO("System exits from STANDBY\n"); |
| 52 | return; |
| 53 | } |
| 54 | |
| 55 | if ((rstsr & RCC_MP_RSTSCLRR_CSTDBYRSTF) != 0U) { |
| 56 | INFO("MPU exits from CSTANDBY\n"); |
| 57 | return; |
| 58 | } |
| 59 | } |
| 60 | |
| 61 | if ((rstsr & RCC_MP_RSTSCLRR_PORRSTF) != 0U) { |
| 62 | INFO(" Power-on Reset (rst_por)\n"); |
| 63 | return; |
| 64 | } |
| 65 | |
| 66 | if ((rstsr & RCC_MP_RSTSCLRR_BORRSTF) != 0U) { |
| 67 | INFO(" Brownout Reset (rst_bor)\n"); |
| 68 | return; |
| 69 | } |
| 70 | |
| 71 | if ((rstsr & RCC_MP_RSTSCLRR_MCSYSRSTF) != 0U) { |
| 72 | if ((rstsr & RCC_MP_RSTSCLRR_PADRSTF) != 0U) { |
| 73 | INFO(" System reset generated by MCU (MCSYSRST)\n"); |
| 74 | } else { |
| 75 | INFO(" Local reset generated by MCU (MCSYSRST)\n"); |
| 76 | } |
| 77 | return; |
| 78 | } |
| 79 | |
| 80 | if ((rstsr & RCC_MP_RSTSCLRR_MPSYSRSTF) != 0U) { |
| 81 | INFO(" System reset generated by MPU (MPSYSRST)\n"); |
| 82 | return; |
| 83 | } |
| 84 | |
| 85 | if ((rstsr & RCC_MP_RSTSCLRR_HCSSRSTF) != 0U) { |
| 86 | INFO(" Reset due to a clock failure on HSE\n"); |
| 87 | return; |
| 88 | } |
| 89 | |
| 90 | if ((rstsr & RCC_MP_RSTSCLRR_IWDG1RSTF) != 0U) { |
| 91 | INFO(" IWDG1 Reset (rst_iwdg1)\n"); |
| 92 | return; |
| 93 | } |
| 94 | |
| 95 | if ((rstsr & RCC_MP_RSTSCLRR_IWDG2RSTF) != 0U) { |
| 96 | INFO(" IWDG2 Reset (rst_iwdg2)\n"); |
| 97 | return; |
| 98 | } |
| 99 | |
| 100 | if ((rstsr & RCC_MP_RSTSCLRR_MPUP0RSTF) != 0U) { |
| 101 | INFO(" MPU Processor 0 Reset\n"); |
| 102 | return; |
| 103 | } |
| 104 | |
| 105 | if ((rstsr & RCC_MP_RSTSCLRR_MPUP1RSTF) != 0U) { |
| 106 | INFO(" MPU Processor 1 Reset\n"); |
| 107 | return; |
| 108 | } |
| 109 | |
| 110 | if ((rstsr & RCC_MP_RSTSCLRR_PADRSTF) != 0U) { |
| 111 | INFO(" Pad Reset from NRST\n"); |
| 112 | return; |
| 113 | } |
| 114 | |
| 115 | if ((rstsr & RCC_MP_RSTSCLRR_VCORERSTF) != 0U) { |
| 116 | INFO(" Reset due to a failure of VDD_CORE\n"); |
| 117 | return; |
| 118 | } |
| 119 | |
| 120 | ERROR(" Unidentified reset reason\n"); |
| 121 | } |
| 122 | |
| 123 | void bl2_el3_early_platform_setup(u_register_t arg0, |
| 124 | u_register_t arg1 __unused, |
| 125 | u_register_t arg2 __unused, |
| 126 | u_register_t arg3 __unused) |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 127 | { |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 128 | stm32mp_save_boot_ctx_address(arg0); |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | void bl2_platform_setup(void) |
| 132 | { |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 133 | int ret; |
| 134 | |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 135 | ret = stm32mp1_ddr_probe(); |
| 136 | if (ret < 0) { |
| 137 | ERROR("Invalid DDR init: error %d\n", ret); |
| 138 | panic(); |
| 139 | } |
| 140 | |
Yann Gautier | f3bd87e | 2020-09-04 15:55:53 +0200 | [diff] [blame] | 141 | /* Map DDR for binary load, now with cacheable attribute */ |
Yann Gautier | a55169b | 2020-01-10 18:18:59 +0100 | [diff] [blame] | 142 | ret = mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE, |
Yann Gautier | f3bd87e | 2020-09-04 15:55:53 +0200 | [diff] [blame] | 143 | STM32MP_DDR_MAX_SIZE, MT_MEMORY | MT_RW | MT_SECURE); |
| 144 | if (ret < 0) { |
| 145 | ERROR("DDR mapping: error %d\n", ret); |
| 146 | panic(); |
| 147 | } |
Yann Gautier | a55169b | 2020-01-10 18:18:59 +0100 | [diff] [blame] | 148 | |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 149 | #if STM32MP_USE_STM32IMAGE |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 150 | #ifdef AARCH32_SP_OPTEE |
| 151 | INFO("BL2 runs OP-TEE setup\n"); |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 152 | #else |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 153 | INFO("BL2 runs SP_MIN setup\n"); |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 154 | #endif |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 155 | #endif /* STM32MP_USE_STM32IMAGE */ |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 156 | } |
| 157 | |
Yann Gautier | 5c1dab3 | 2019-04-17 15:12:58 +0200 | [diff] [blame^] | 158 | static void update_monotonic_counter(void) |
| 159 | { |
| 160 | uint32_t version; |
| 161 | uint32_t otp; |
| 162 | |
| 163 | CASSERT(STM32_TF_VERSION <= MAX_MONOTONIC_VALUE, |
| 164 | assert_stm32mp1_monotonic_counter_reach_max); |
| 165 | |
| 166 | /* Check if monotonic counter needs to be incremented */ |
| 167 | if (stm32_get_otp_index(MONOTONIC_OTP, &otp, NULL) != 0) { |
| 168 | panic(); |
| 169 | } |
| 170 | |
| 171 | if (stm32_get_otp_value_from_idx(otp, &version) != 0) { |
| 172 | panic(); |
| 173 | } |
| 174 | |
| 175 | if ((version + 1U) < BIT(STM32_TF_VERSION)) { |
| 176 | uint32_t result; |
| 177 | |
| 178 | /* Need to increment the monotonic counter. */ |
| 179 | version = BIT(STM32_TF_VERSION) - 1U; |
| 180 | |
| 181 | result = bsec_program_otp(version, otp); |
| 182 | if (result != BSEC_OK) { |
| 183 | ERROR("BSEC: MONOTONIC_OTP program Error %u\n", |
| 184 | result); |
| 185 | panic(); |
| 186 | } |
| 187 | INFO("Monotonic counter has been incremented (value 0x%x)\n", |
| 188 | version); |
| 189 | } |
| 190 | } |
| 191 | |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 192 | void bl2_el3_plat_arch_setup(void) |
| 193 | { |
Yann Gautier | 69035a8 | 2018-07-05 16:48:16 +0200 | [diff] [blame] | 194 | const char *board_model; |
Yann Gautier | 4193466 | 2018-07-20 11:36:05 +0200 | [diff] [blame] | 195 | boot_api_context_t *boot_context = |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 196 | (boot_api_context_t *)stm32mp_get_boot_ctx_address(); |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 197 | uintptr_t pwr_base; |
| 198 | uintptr_t rcc_base; |
Yann Gautier | 4193466 | 2018-07-20 11:36:05 +0200 | [diff] [blame] | 199 | |
Nicolas Le Bayon | 97287cd | 2019-05-20 18:35:02 +0200 | [diff] [blame] | 200 | if (bsec_probe() != 0U) { |
| 201 | panic(); |
| 202 | } |
| 203 | |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 204 | mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, |
| 205 | BL_CODE_END - BL_CODE_BASE, |
| 206 | MT_CODE | MT_SECURE); |
| 207 | |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 208 | #if STM32MP_USE_STM32IMAGE |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 209 | #ifdef AARCH32_SP_OPTEE |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 210 | mmap_add_region(STM32MP_OPTEE_BASE, STM32MP_OPTEE_BASE, |
| 211 | STM32MP_OPTEE_SIZE, |
| 212 | MT_MEMORY | MT_RW | MT_SECURE); |
Yann Gautier | 90f84d7 | 2021-07-13 14:44:09 +0200 | [diff] [blame] | 213 | #else |
| 214 | /* Prevent corruption of preloaded BL32 */ |
| 215 | mmap_add_region(BL32_BASE, BL32_BASE, |
| 216 | BL32_LIMIT - BL32_BASE, |
| 217 | MT_RO_DATA | MT_SECURE); |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 218 | #endif |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 219 | #endif /* STM32MP_USE_STM32IMAGE */ |
| 220 | |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 221 | /* Prevent corruption of preloaded Device Tree */ |
| 222 | mmap_add_region(DTB_BASE, DTB_BASE, |
| 223 | DTB_LIMIT - DTB_BASE, |
Yann Gautier | 3d33df6 | 2019-12-17 17:11:10 +0100 | [diff] [blame] | 224 | MT_RO_DATA | MT_SECURE); |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 225 | |
| 226 | configure_mmu(); |
| 227 | |
Yann Gautier | 05773eb | 2020-08-24 11:51:50 +0200 | [diff] [blame] | 228 | if (dt_open_and_check(STM32MP_DTB_BASE) < 0) { |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 229 | panic(); |
| 230 | } |
| 231 | |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 232 | pwr_base = stm32mp_pwr_base(); |
| 233 | rcc_base = stm32mp_rcc_base(); |
| 234 | |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 235 | /* |
| 236 | * Disable the backup domain write protection. |
| 237 | * The protection is enable at each reset by hardware |
| 238 | * and must be disabled by software. |
| 239 | */ |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 240 | mmio_setbits_32(pwr_base + PWR_CR1, PWR_CR1_DBP); |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 241 | |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 242 | while ((mmio_read_32(pwr_base + PWR_CR1) & PWR_CR1_DBP) == 0U) { |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 243 | ; |
| 244 | } |
| 245 | |
| 246 | /* Reset backup domain on cold boot cases */ |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 247 | if ((mmio_read_32(rcc_base + RCC_BDCR) & RCC_BDCR_RTCSRC_MASK) == 0U) { |
| 248 | mmio_setbits_32(rcc_base + RCC_BDCR, RCC_BDCR_VSWRST); |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 249 | |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 250 | while ((mmio_read_32(rcc_base + RCC_BDCR) & RCC_BDCR_VSWRST) == |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 251 | 0U) { |
| 252 | ; |
| 253 | } |
| 254 | |
Yann Gautier | 3d78a2e | 2019-02-14 11:01:20 +0100 | [diff] [blame] | 255 | mmio_clrbits_32(rcc_base + RCC_BDCR, RCC_BDCR_VSWRST); |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 256 | } |
| 257 | |
Yann Gautier | ed34232 | 2019-02-15 17:33:27 +0100 | [diff] [blame] | 258 | /* Disable MCKPROT */ |
| 259 | mmio_clrbits_32(rcc_base + RCC_TZCR, RCC_TZCR_MCKPROT); |
| 260 | |
Yann Gautier | c0882f4 | 2021-04-27 18:19:13 +0200 | [diff] [blame] | 261 | /* |
| 262 | * Set minimum reset pulse duration to 31ms for discrete power |
| 263 | * supplied boards. |
| 264 | */ |
| 265 | if (dt_pmic_status() <= 0) { |
| 266 | mmio_clrsetbits_32(rcc_base + RCC_RDLSICR, |
| 267 | RCC_RDLSICR_MRD_MASK, |
| 268 | 31U << RCC_RDLSICR_MRD_SHIFT); |
| 269 | } |
| 270 | |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 271 | generic_delay_timer_init(); |
| 272 | |
Yann Gautier | 3d8497c | 2021-10-18 16:06:22 +0200 | [diff] [blame] | 273 | #if STM32MP_UART_PROGRAMMER |
| 274 | /* Disable programmer UART before changing clock tree */ |
| 275 | if (boot_context->boot_interface_selected == |
| 276 | BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART) { |
| 277 | uintptr_t uart_prog_addr = |
| 278 | get_uart_address(boot_context->boot_interface_instance); |
| 279 | |
| 280 | stm32_uart_stop(uart_prog_addr); |
| 281 | } |
| 282 | #endif |
Yann Gautier | 9aea69e | 2018-07-24 17:13:36 +0200 | [diff] [blame] | 283 | if (stm32mp1_clk_probe() < 0) { |
| 284 | panic(); |
| 285 | } |
| 286 | |
| 287 | if (stm32mp1_clk_init() < 0) { |
| 288 | panic(); |
| 289 | } |
| 290 | |
Yann Gautier | 6eef525 | 2021-12-10 17:04:40 +0100 | [diff] [blame] | 291 | stm32_save_boot_interface(boot_context->boot_interface_selected, |
| 292 | boot_context->boot_interface_instance); |
| 293 | |
Yann Gautier | cd16df3 | 2021-06-04 14:04:05 +0200 | [diff] [blame] | 294 | #if STM32MP_USB_PROGRAMMER |
| 295 | /* Deconfigure all UART RX pins configured by ROM code */ |
| 296 | stm32mp1_deconfigure_uart_pins(); |
| 297 | #endif |
| 298 | |
Yann Gautier | 66baa96 | 2021-10-18 14:01:00 +0200 | [diff] [blame] | 299 | if (stm32mp_uart_console_setup() != 0) { |
Yann Gautier | 69035a8 | 2018-07-05 16:48:16 +0200 | [diff] [blame] | 300 | goto skip_console_init; |
| 301 | } |
| 302 | |
Yann Gautier | c737405 | 2019-06-04 18:02:37 +0200 | [diff] [blame] | 303 | stm32mp_print_cpuinfo(); |
| 304 | |
Yann Gautier | 69035a8 | 2018-07-05 16:48:16 +0200 | [diff] [blame] | 305 | board_model = dt_get_board_model(); |
| 306 | if (board_model != NULL) { |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 307 | NOTICE("Model: %s\n", board_model); |
Yann Gautier | 69035a8 | 2018-07-05 16:48:16 +0200 | [diff] [blame] | 308 | } |
| 309 | |
Yann Gautier | 35dc077 | 2019-05-13 18:34:48 +0200 | [diff] [blame] | 310 | stm32mp_print_boardinfo(); |
| 311 | |
Lionel Debieve | 7bd96f4 | 2019-09-03 12:22:23 +0200 | [diff] [blame] | 312 | if (boot_context->auth_status != BOOT_API_CTX_AUTH_NO) { |
| 313 | NOTICE("Bootrom authentication %s\n", |
| 314 | (boot_context->auth_status == BOOT_API_CTX_AUTH_FAILED) ? |
| 315 | "failed" : "succeeded"); |
| 316 | } |
| 317 | |
Yann Gautier | 69035a8 | 2018-07-05 16:48:16 +0200 | [diff] [blame] | 318 | skip_console_init: |
Pascal Paillet | fc7b805 | 2021-01-29 14:48:49 +0100 | [diff] [blame] | 319 | if (fixed_regulator_register() != 0) { |
| 320 | panic(); |
| 321 | } |
| 322 | |
Yann Gautier | 45c1e58 | 2020-09-17 11:54:52 +0200 | [diff] [blame] | 323 | if (dt_pmic_status() > 0) { |
| 324 | initialize_pmic(); |
Nicolas Le Bayon | 0b10b65 | 2019-11-18 13:13:36 +0100 | [diff] [blame] | 325 | print_pmic_info_and_debug(); |
Yann Gautier | 45c1e58 | 2020-09-17 11:54:52 +0200 | [diff] [blame] | 326 | } |
| 327 | |
| 328 | stm32mp1_syscfg_init(); |
| 329 | |
Yann Gautier | 091eab5 | 2019-06-04 18:06:34 +0200 | [diff] [blame] | 330 | if (stm32_iwdg_init() < 0) { |
| 331 | panic(); |
| 332 | } |
| 333 | |
| 334 | stm32_iwdg_refresh(); |
| 335 | |
Lionel Debieve | 7bd96f4 | 2019-09-03 12:22:23 +0200 | [diff] [blame] | 336 | stm32mp1_auth_ops.check_key = boot_context->bootrom_ecdsa_check_key; |
| 337 | stm32mp1_auth_ops.verify_signature = |
| 338 | boot_context->bootrom_ecdsa_verify_signature; |
| 339 | |
| 340 | stm32mp_init_auth(&stm32mp1_auth_ops); |
| 341 | |
Yann Gautier | caf575b | 2018-07-24 17:18:19 +0200 | [diff] [blame] | 342 | stm32mp1_arch_security_setup(); |
| 343 | |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 344 | print_reset_reason(); |
| 345 | |
Yann Gautier | 5c1dab3 | 2019-04-17 15:12:58 +0200 | [diff] [blame^] | 346 | update_monotonic_counter(); |
| 347 | |
Yann Gautier | b76c61a | 2020-12-16 10:17:35 +0100 | [diff] [blame] | 348 | stm32mp1_syscfg_enable_io_compensation_finish(); |
| 349 | |
Yann Gautier | 29f1f94 | 2021-07-13 18:07:41 +0200 | [diff] [blame] | 350 | #if !STM32MP_USE_STM32IMAGE |
| 351 | fconf_populate("TB_FW", STM32MP_DTB_BASE); |
| 352 | #endif /* !STM32MP_USE_STM32IMAGE */ |
| 353 | |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 354 | stm32mp_io_setup(); |
Yann Gautier | 4b0c72a | 2018-07-16 10:54:09 +0200 | [diff] [blame] | 355 | } |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 356 | |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 357 | /******************************************************************************* |
| 358 | * This function can be used by the platforms to update/use image |
| 359 | * information for given `image_id`. |
| 360 | ******************************************************************************/ |
| 361 | int bl2_plat_handle_post_image_load(unsigned int image_id) |
| 362 | { |
| 363 | int err = 0; |
| 364 | bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); |
| 365 | bl_mem_params_node_t *bl32_mem_params; |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 366 | bl_mem_params_node_t *pager_mem_params __unused; |
| 367 | bl_mem_params_node_t *paged_mem_params __unused; |
Yann Gautier | 658775c | 2021-07-06 10:00:44 +0200 | [diff] [blame] | 368 | #if !STM32MP_USE_STM32IMAGE |
| 369 | const struct dyn_cfg_dtb_info_t *config_info; |
| 370 | bl_mem_params_node_t *tos_fw_mem_params; |
| 371 | unsigned int i; |
Yann Gautier | fd64835 | 2021-12-13 15:24:41 +0100 | [diff] [blame] | 372 | unsigned int idx; |
Yann Gautier | 658775c | 2021-07-06 10:00:44 +0200 | [diff] [blame] | 373 | unsigned long long ddr_top __unused; |
| 374 | const unsigned int image_ids[] = { |
| 375 | BL32_IMAGE_ID, |
| 376 | BL33_IMAGE_ID, |
| 377 | HW_CONFIG_ID, |
| 378 | TOS_FW_CONFIG_ID, |
| 379 | }; |
| 380 | #endif /* !STM32MP_USE_STM32IMAGE */ |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 381 | |
| 382 | assert(bl_mem_params != NULL); |
| 383 | |
| 384 | switch (image_id) { |
Yann Gautier | 658775c | 2021-07-06 10:00:44 +0200 | [diff] [blame] | 385 | #if !STM32MP_USE_STM32IMAGE |
| 386 | case FW_CONFIG_ID: |
| 387 | /* Set global DTB info for fixed fw_config information */ |
| 388 | set_config_info(STM32MP_FW_CONFIG_BASE, STM32MP_FW_CONFIG_MAX_SIZE, FW_CONFIG_ID); |
| 389 | fconf_populate("FW_CONFIG", STM32MP_FW_CONFIG_BASE); |
| 390 | |
Yann Gautier | fd64835 | 2021-12-13 15:24:41 +0100 | [diff] [blame] | 391 | idx = dyn_cfg_dtb_info_get_index(TOS_FW_CONFIG_ID); |
| 392 | |
Yann Gautier | 658775c | 2021-07-06 10:00:44 +0200 | [diff] [blame] | 393 | /* Iterate through all the fw config IDs */ |
| 394 | for (i = 0U; i < ARRAY_SIZE(image_ids); i++) { |
Yann Gautier | fd64835 | 2021-12-13 15:24:41 +0100 | [diff] [blame] | 395 | if ((image_ids[i] == TOS_FW_CONFIG_ID) && (idx == FCONF_INVALID_IDX)) { |
| 396 | continue; |
| 397 | } |
| 398 | |
Yann Gautier | 658775c | 2021-07-06 10:00:44 +0200 | [diff] [blame] | 399 | bl_mem_params = get_bl_mem_params_node(image_ids[i]); |
| 400 | assert(bl_mem_params != NULL); |
| 401 | |
| 402 | config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, image_ids[i]); |
| 403 | if (config_info == NULL) { |
| 404 | continue; |
| 405 | } |
| 406 | |
| 407 | bl_mem_params->image_info.image_base = config_info->config_addr; |
| 408 | bl_mem_params->image_info.image_max_size = config_info->config_max_size; |
| 409 | |
| 410 | bl_mem_params->image_info.h.attr &= ~IMAGE_ATTRIB_SKIP_LOADING; |
| 411 | |
| 412 | switch (image_ids[i]) { |
| 413 | case BL32_IMAGE_ID: |
| 414 | bl_mem_params->ep_info.pc = config_info->config_addr; |
| 415 | |
| 416 | /* In case of OPTEE, initialize address space with tos_fw addr */ |
| 417 | pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID); |
| 418 | pager_mem_params->image_info.image_base = config_info->config_addr; |
| 419 | pager_mem_params->image_info.image_max_size = |
| 420 | config_info->config_max_size; |
| 421 | |
| 422 | /* Init base and size for pager if exist */ |
| 423 | paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID); |
| 424 | paged_mem_params->image_info.image_base = STM32MP_DDR_BASE + |
| 425 | (dt_get_ddr_size() - STM32MP_DDR_S_SIZE - |
| 426 | STM32MP_DDR_SHMEM_SIZE); |
| 427 | paged_mem_params->image_info.image_max_size = STM32MP_DDR_S_SIZE; |
| 428 | break; |
| 429 | |
| 430 | case BL33_IMAGE_ID: |
| 431 | bl_mem_params->ep_info.pc = config_info->config_addr; |
| 432 | break; |
| 433 | |
| 434 | case HW_CONFIG_ID: |
| 435 | case TOS_FW_CONFIG_ID: |
| 436 | break; |
| 437 | |
| 438 | default: |
| 439 | return -EINVAL; |
| 440 | } |
| 441 | } |
| 442 | break; |
| 443 | #endif /* !STM32MP_USE_STM32IMAGE */ |
| 444 | |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 445 | case BL32_IMAGE_ID: |
Yann Gautier | 90f84d7 | 2021-07-13 14:44:09 +0200 | [diff] [blame] | 446 | if (optee_header_is_valid(bl_mem_params->image_info.image_base)) { |
| 447 | /* BL32 is OP-TEE header */ |
| 448 | bl_mem_params->ep_info.pc = bl_mem_params->image_info.image_base; |
| 449 | pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID); |
| 450 | paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID); |
| 451 | assert((pager_mem_params != NULL) && (paged_mem_params != NULL)); |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 452 | |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 453 | #if STM32MP_USE_STM32IMAGE && defined(AARCH32_SP_OPTEE) |
Yann Gautier | 90f84d7 | 2021-07-13 14:44:09 +0200 | [diff] [blame] | 454 | /* Set OP-TEE extra image load areas at run-time */ |
| 455 | pager_mem_params->image_info.image_base = STM32MP_OPTEE_BASE; |
| 456 | pager_mem_params->image_info.image_max_size = STM32MP_OPTEE_SIZE; |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 457 | |
Yann Gautier | 90f84d7 | 2021-07-13 14:44:09 +0200 | [diff] [blame] | 458 | paged_mem_params->image_info.image_base = STM32MP_DDR_BASE + |
| 459 | dt_get_ddr_size() - |
| 460 | STM32MP_DDR_S_SIZE - |
| 461 | STM32MP_DDR_SHMEM_SIZE; |
| 462 | paged_mem_params->image_info.image_max_size = STM32MP_DDR_S_SIZE; |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 463 | #endif /* STM32MP_USE_STM32IMAGE && defined(AARCH32_SP_OPTEE) */ |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 464 | |
Yann Gautier | 90f84d7 | 2021-07-13 14:44:09 +0200 | [diff] [blame] | 465 | err = parse_optee_header(&bl_mem_params->ep_info, |
| 466 | &pager_mem_params->image_info, |
| 467 | &paged_mem_params->image_info); |
| 468 | if (err) { |
| 469 | ERROR("OPTEE header parse error.\n"); |
| 470 | panic(); |
| 471 | } |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 472 | |
Yann Gautier | 90f84d7 | 2021-07-13 14:44:09 +0200 | [diff] [blame] | 473 | /* Set optee boot info from parsed header data */ |
| 474 | bl_mem_params->ep_info.args.arg0 = paged_mem_params->image_info.image_base; |
| 475 | bl_mem_params->ep_info.args.arg1 = 0; /* Unused */ |
| 476 | bl_mem_params->ep_info.args.arg2 = 0; /* No DT supported */ |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 477 | } else { |
| 478 | #if !STM32MP_USE_STM32IMAGE |
| 479 | bl_mem_params->ep_info.pc = bl_mem_params->image_info.image_base; |
Yann Gautier | 658775c | 2021-07-06 10:00:44 +0200 | [diff] [blame] | 480 | tos_fw_mem_params = get_bl_mem_params_node(TOS_FW_CONFIG_ID); |
| 481 | bl_mem_params->image_info.image_max_size += |
| 482 | tos_fw_mem_params->image_info.image_max_size; |
Yann Gautier | 0ed7b2a | 2021-05-19 18:48:16 +0200 | [diff] [blame] | 483 | #endif /* !STM32MP_USE_STM32IMAGE */ |
| 484 | bl_mem_params->ep_info.args.arg0 = 0; |
Yann Gautier | 90f84d7 | 2021-07-13 14:44:09 +0200 | [diff] [blame] | 485 | } |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 486 | break; |
| 487 | |
| 488 | case BL33_IMAGE_ID: |
| 489 | bl32_mem_params = get_bl_mem_params_node(BL32_IMAGE_ID); |
| 490 | assert(bl32_mem_params != NULL); |
| 491 | bl32_mem_params->ep_info.lr_svc = bl_mem_params->ep_info.pc; |
Sughosh Ganu | 03e2f80 | 2021-12-01 15:56:27 +0530 | [diff] [blame] | 492 | #if !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT |
| 493 | stm32mp1_fwu_set_boot_idx(); |
| 494 | #endif /* !STM32MP_USE_STM32IMAGE && PSA_FWU_SUPPORT */ |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 495 | break; |
| 496 | |
| 497 | default: |
| 498 | /* Do nothing in default case */ |
| 499 | break; |
| 500 | } |
| 501 | |
Yann Gautier | a3bd8d1 | 2021-06-18 11:33:26 +0200 | [diff] [blame] | 502 | #if STM32MP_SDMMC || STM32MP_EMMC |
| 503 | /* |
| 504 | * Invalidate remaining data read from MMC but not flushed by load_image_flush(). |
| 505 | * We take the worst case which is 2 MMC blocks. |
| 506 | */ |
| 507 | if ((image_id != FW_CONFIG_ID) && |
| 508 | ((bl_mem_params->image_info.h.attr & IMAGE_ATTRIB_SKIP_LOADING) == 0U)) { |
| 509 | inv_dcache_range(bl_mem_params->image_info.image_base + |
| 510 | bl_mem_params->image_info.image_size, |
| 511 | 2U * MMC_BLOCK_SIZE); |
| 512 | } |
| 513 | #endif /* STM32MP_SDMMC || STM32MP_EMMC */ |
| 514 | |
Yann Gautier | b3386f7 | 2019-04-19 09:41:01 +0200 | [diff] [blame] | 515 | return err; |
| 516 | } |
Yann Gautier | d2d9b96 | 2021-08-16 11:58:01 +0200 | [diff] [blame] | 517 | |
| 518 | void bl2_el3_plat_prepare_exit(void) |
| 519 | { |
Patrick Delaunay | 9c5ee78 | 2021-07-06 14:07:56 +0200 | [diff] [blame] | 520 | uint16_t boot_itf = stm32mp_get_boot_itf_selected(); |
| 521 | |
| 522 | switch (boot_itf) { |
Patrick Delaunay | e50571b | 2021-10-28 13:48:52 +0200 | [diff] [blame] | 523 | #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER |
| 524 | case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: |
Patrick Delaunay | 9c5ee78 | 2021-07-06 14:07:56 +0200 | [diff] [blame] | 525 | case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: |
| 526 | /* Invalidate the downloaded buffer used with io_memmap */ |
| 527 | inv_dcache_range(DWL_BUFFER_BASE, DWL_BUFFER_SIZE); |
| 528 | break; |
Patrick Delaunay | e50571b | 2021-10-28 13:48:52 +0200 | [diff] [blame] | 529 | #endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */ |
Patrick Delaunay | 9c5ee78 | 2021-07-06 14:07:56 +0200 | [diff] [blame] | 530 | default: |
| 531 | /* Do nothing in default case */ |
| 532 | break; |
| 533 | } |
| 534 | |
Yann Gautier | d2d9b96 | 2021-08-16 11:58:01 +0200 | [diff] [blame] | 535 | stm32mp1_security_setup(); |
| 536 | } |