feat(plat/st): use FIP to load images
BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP file.
One DTB is created for each BL. To reduce their sizes, 2 new dtsi file are
in charge of removing useless nodes for a given BL. This is done because
BL2 and BL32 share the same device tree files base.
The previous way of booting is still available, the compilation flag
STM32MP_USE_STM32IMAGE has to be set to 1 in the make command. Some files
are duplicated and their names modified with _stm32_ to avoid too much
switches in the code.
Change-Id: I1ffada0af58486d4cf6044511b51e56b52269817
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c
index ac2a1e2..83e5cd1 100644
--- a/plat/st/stm32mp1/bl2_plat_setup.c
+++ b/plat/st/stm32mp1/bl2_plat_setup.c
@@ -151,11 +151,13 @@
panic();
}
+#if STM32MP_USE_STM32IMAGE
#ifdef AARCH32_SP_OPTEE
INFO("BL2 runs OP-TEE setup\n");
#else
INFO("BL2 runs SP_MIN setup\n");
#endif
+#endif /* STM32MP_USE_STM32IMAGE */
}
void bl2_el3_plat_arch_setup(void)
@@ -173,6 +175,7 @@
BL_CODE_END - BL_CODE_BASE,
MT_CODE | MT_SECURE);
+#if STM32MP_USE_STM32IMAGE
#ifdef AARCH32_SP_OPTEE
mmap_add_region(STM32MP_OPTEE_BASE, STM32MP_OPTEE_BASE,
STM32MP_OPTEE_SIZE,
@@ -183,6 +186,8 @@
BL32_LIMIT - BL32_BASE,
MT_RO_DATA | MT_SECURE);
#endif
+#endif /* STM32MP_USE_STM32IMAGE */
+
/* Prevent corruption of preloaded Device Tree */
mmap_add_region(DTB_BASE, DTB_BASE,
DTB_LIMIT - DTB_BASE,
@@ -324,7 +329,6 @@
stm32mp_io_setup();
}
-#if defined(AARCH32_SP_OPTEE)
/*******************************************************************************
* This function can be used by the platforms to update/use image
* information for given `image_id`.
@@ -334,8 +338,8 @@
int err = 0;
bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
bl_mem_params_node_t *bl32_mem_params;
- bl_mem_params_node_t *pager_mem_params;
- bl_mem_params_node_t *paged_mem_params;
+ bl_mem_params_node_t *pager_mem_params __unused;
+ bl_mem_params_node_t *paged_mem_params __unused;
assert(bl_mem_params != NULL);
@@ -348,6 +352,7 @@
paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
assert((pager_mem_params != NULL) && (paged_mem_params != NULL));
+#if STM32MP_USE_STM32IMAGE && defined(AARCH32_SP_OPTEE)
/* Set OP-TEE extra image load areas at run-time */
pager_mem_params->image_info.image_base = STM32MP_OPTEE_BASE;
pager_mem_params->image_info.image_max_size = STM32MP_OPTEE_SIZE;
@@ -357,6 +362,7 @@
STM32MP_DDR_S_SIZE -
STM32MP_DDR_SHMEM_SIZE;
paged_mem_params->image_info.image_max_size = STM32MP_DDR_S_SIZE;
+#endif /* STM32MP_USE_STM32IMAGE && defined(AARCH32_SP_OPTEE) */
err = parse_optee_header(&bl_mem_params->ep_info,
&pager_mem_params->image_info,
@@ -370,6 +376,11 @@
bl_mem_params->ep_info.args.arg0 = paged_mem_params->image_info.image_base;
bl_mem_params->ep_info.args.arg1 = 0; /* Unused */
bl_mem_params->ep_info.args.arg2 = 0; /* No DT supported */
+ } else {
+#if !STM32MP_USE_STM32IMAGE
+ bl_mem_params->ep_info.pc = bl_mem_params->image_info.image_base;
+#endif /* !STM32MP_USE_STM32IMAGE */
+ bl_mem_params->ep_info.args.arg0 = 0;
}
break;
@@ -391,4 +402,3 @@
{
stm32mp1_security_setup();
}
-#endif