blob: 260402351a72c2b2d95cacf3a4290833a78bc250 [file] [log] [blame]
Soby Mathew802f8652014-08-14 16:19:29 +01001#
John Tsichritzis56369c12019-02-19 13:49:06 +00002# Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved.
Soby Mathew802f8652014-08-14 16:19:29 +01003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Soby Mathew802f8652014-08-14 16:19:29 +01005#
6
Soby Mathew937488b2014-09-22 14:13:34 +01007# Cortex A57 specific optimisation to skip L1 cache flush when
8# cluster is powered down.
9SKIP_A57_L1_FLUSH_PWR_DWN ?=0
10
Sandrine Bailleuxd4817592016-01-13 14:57:38 +000011# Flag to disable the cache non-temporal hint.
12# It is enabled by default.
13A53_DISABLE_NON_TEMPORAL_HINT ?=1
14
15# Flag to disable the cache non-temporal hint.
16# It is enabled by default.
17A57_DISABLE_NON_TEMPORAL_HINT ?=1
18
Dimitris Papastamos446f7f12017-11-30 14:53:53 +000019WORKAROUND_CVE_2017_5715 ?=1
Dimitris Papastamose6625ec2018-04-05 14:38:26 +010020WORKAROUND_CVE_2018_3639 ?=1
Dimitris Papastamosba51d9e2018-05-16 11:36:14 +010021DYNAMIC_WORKAROUND_CVE_2018_3639 ?=0
Dimitris Papastamos446f7f12017-11-30 14:53:53 +000022
Soby Mathew937488b2014-09-22 14:13:34 +010023# Process SKIP_A57_L1_FLUSH_PWR_DWN flag
24$(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN))
25$(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN))
26
Sandrine Bailleuxd4817592016-01-13 14:57:38 +000027# Process A53_DISABLE_NON_TEMPORAL_HINT flag
28$(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT))
29$(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT))
30
31# Process A57_DISABLE_NON_TEMPORAL_HINT flag
32$(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT))
33$(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT))
34
Dimitris Papastamos446f7f12017-11-30 14:53:53 +000035# Process WORKAROUND_CVE_2017_5715 flag
36$(eval $(call assert_boolean,WORKAROUND_CVE_2017_5715))
37$(eval $(call add_define,WORKAROUND_CVE_2017_5715))
Soby Mathew937488b2014-09-22 14:13:34 +010038
Dimitris Papastamose6625ec2018-04-05 14:38:26 +010039# Process WORKAROUND_CVE_2018_3639 flag
40$(eval $(call assert_boolean,WORKAROUND_CVE_2018_3639))
41$(eval $(call add_define,WORKAROUND_CVE_2018_3639))
42
Dimitris Papastamosba51d9e2018-05-16 11:36:14 +010043$(eval $(call assert_boolean,DYNAMIC_WORKAROUND_CVE_2018_3639))
44$(eval $(call add_define,DYNAMIC_WORKAROUND_CVE_2018_3639))
45
46ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0)
47 ifeq (${WORKAROUND_CVE_2018_3639},0)
48 $(error "Error: WORKAROUND_CVE_2018_3639 must be 1 if DYNAMIC_WORKAROUND_CVE_2018_3639 is 1")
49 endif
50endif
51
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +010052# CPU Errata Build flags.
53# These should be enabled by the platform if the erratum workaround needs to be
54# applied.
Soby Mathew802f8652014-08-14 16:19:29 +010055
Joel Hutton26d16762019-04-10 12:52:52 +010056# Flag to apply erratum 794073 workaround when disabling mmu.
57ERRATA_A9_794073 ?=0
58
Ambroise Vincentd4a51eb2019-03-04 16:56:26 +000059# Flag to apply erratum 816470 workaround during power down. This erratum
60# applies only to revision >= r3p0 of the Cortex A15 cpu.
61ERRATA_A15_816470 ?=0
62
Ambroise Vincent68b38122019-03-05 09:54:21 +000063# Flag to apply erratum 827671 workaround during reset. This erratum applies
64# only to revision >= r3p0 of the Cortex A15 cpu.
65ERRATA_A15_827671 ?=0
66
Ambroise Vincent8cf9eef2019-02-28 16:23:53 +000067# Flag to apply erratum 852421 workaround during reset. This erratum applies
68# only to revision <= r1p2 of the Cortex A17 cpu.
69ERRATA_A17_852421 ?=0
70
Ambroise Vincentfa5c9512019-03-04 13:20:56 +000071# Flag to apply erratum 852423 workaround during reset. This erratum applies
72# only to revision <= r1p2 of the Cortex A17 cpu.
73ERRATA_A17_852423 ?=0
74
Louis Mayencourt8a061272019-04-05 16:25:25 +010075# Flag to apply erratum 855472 workaround during reset. This erratum applies
76# only to revision r0p0 of the Cortex A35 cpu.
77ERRATA_A35_855472 ?=0
78
Ambroise Vincentf5fdfbc2019-02-21 14:16:24 +000079# Flag to apply erratum 819472 workaround during reset. This erratum applies
80# only to revision <= r0p1 of the Cortex A53 cpu.
81ERRATA_A53_819472 ?=0
82
83# Flag to apply erratum 824069 workaround during reset. This erratum applies
84# only to revision <= r0p2 of the Cortex A53 cpu.
85ERRATA_A53_824069 ?=0
86
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +010087# Flag to apply erratum 826319 workaround during reset. This erratum applies
88# only to revision <= r0p2 of the Cortex A53 cpu.
developer4fceaca2015-07-29 20:55:31 +080089ERRATA_A53_826319 ?=0
90
Ambroise Vincentf5fdfbc2019-02-21 14:16:24 +000091# Flag to apply erratum 827319 workaround during reset. This erratum applies
92# only to revision <= r0p2 of the Cortex A53 cpu.
93ERRATA_A53_827319 ?=0
94
Douglas Raillardd56fb042017-06-19 15:38:02 +010095# Flag to apply erratum 835769 workaround at compile and link time. This
96# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
97# workaround can lead the linker to create "*.stub" sections.
98ERRATA_A53_835769 ?=0
99
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +0100100# Flag to apply erratum 836870 workaround during reset. This erratum applies
101# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this
Douglas Raillardc847f662017-02-15 17:38:43 +0000102# erratum workaround is enabled by default in hardware.
developer4fceaca2015-07-29 20:55:31 +0800103ERRATA_A53_836870 ?=0
104
Douglas Raillardd56fb042017-06-19 15:38:02 +0100105# Flag to apply erratum 843419 workaround at link time.
106# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
107# workaround could lead the linker to emit "*.stub" sections which are 4kB
108# aligned.
109ERRATA_A53_843419 ?=0
110
Andre Przywara00eefd92016-10-06 16:54:53 +0100111# Flag to apply errata 855873 during reset. This errata applies to all
112# revisions of the Cortex A53 CPU, but this firmware workaround only works
113# for revisions r0p3 and higher. Earlier revisions are taken care
114# of by the rich OS.
115ERRATA_A53_855873 ?=0
116
Ambroise Vincent7927fa02019-02-21 16:20:43 +0000117# Flag to apply erratum 768277 workaround during reset. This erratum applies
118# only to revision r0p0 of the Cortex A55 cpu.
119ERRATA_A55_768277 ?=0
120
Ambroise Vincent6f319602019-02-21 16:25:37 +0000121# Flag to apply erratum 778703 workaround during reset. This erratum applies
122# only to revision r0p0 of the Cortex A55 cpu.
123ERRATA_A55_778703 ?=0
124
Ambroise Vincent6a77f052019-02-21 16:27:34 +0000125# Flag to apply erratum 798797 workaround during reset. This erratum applies
126# only to revision r0p0 of the Cortex A55 cpu.
127ERRATA_A55_798797 ?=0
128
Ambroise Vincentdd961f72019-02-21 16:29:16 +0000129# Flag to apply erratum 846532 workaround during reset. This erratum applies
130# only to revision <= r0p1 of the Cortex A55 cpu.
131ERRATA_A55_846532 ?=0
132
Ambroise Vincenta1d64462019-02-21 16:29:50 +0000133# Flag to apply erratum 903758 workaround during reset. This erratum applies
134# only to revision <= r0p1 of the Cortex A55 cpu.
135ERRATA_A55_903758 ?=0
136
Ambroise Vincentb72fe7a2019-05-28 09:52:48 +0100137# Flag to apply erratum 1221012 workaround during reset. This erratum applies
138# only to revision <= r1p0 of the Cortex A55 cpu.
139ERRATA_A55_1221012 ?=0
140
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +0100141# Flag to apply erratum 806969 workaround during reset. This erratum applies
142# only to revision r0p0 of the Cortex A57 cpu.
Soby Mathew802f8652014-08-14 16:19:29 +0100143ERRATA_A57_806969 ?=0
144
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000145# Flag to apply erratum 813419 workaround during reset. This erratum applies
146# only to revision r0p0 of the Cortex A57 cpu.
147ERRATA_A57_813419 ?=0
148
Sandrine Bailleuxafa8a782016-04-14 12:59:42 +0100149# Flag to apply erratum 813420 workaround during reset. This erratum applies
150# only to revision r0p0 of the Cortex A57 cpu.
Soby Mathew802f8652014-08-14 16:19:29 +0100151ERRATA_A57_813420 ?=0
152
Ambroise Vincent1b0db762019-02-21 16:35:07 +0000153# Flag to apply erratum 814670 workaround during reset. This erratum applies
154# only to revision r0p0 of the Cortex A57 cpu.
155ERRATA_A57_814670 ?=0
156
Ambroise Vincentaa2c0292019-02-21 16:35:49 +0000157# Flag to apply erratum 817169 workaround during power down. This erratum
158# applies only to revision <= r0p1 of the Cortex A57 cpu.
159ERRATA_A57_817169 ?=0
160
Sandrine Bailleuxa7e0c532016-04-14 13:32:31 +0100161# Flag to apply erratum 826974 workaround during reset. This erratum applies
162# only to revision <= r1p1 of the Cortex A57 cpu.
163ERRATA_A57_826974 ?=0
164
Sandrine Bailleuxadcbd552016-04-14 14:24:13 +0100165# Flag to apply erratum 826977 workaround during reset. This erratum applies
166# only to revision <= r1p1 of the Cortex A57 cpu.
167ERRATA_A57_826977 ?=0
168
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +0100169# Flag to apply erratum 828024 workaround during reset. This erratum applies
170# only to revision <= r1p1 of the Cortex A57 cpu.
171ERRATA_A57_828024 ?=0
172
Sandrine Bailleux48cbe852016-04-14 14:18:07 +0100173# Flag to apply erratum 829520 workaround during reset. This erratum applies
174# only to revision <= r1p2 of the Cortex A57 cpu.
175ERRATA_A57_829520 ?=0
176
Sandrine Bailleux143ef1a2016-04-21 11:10:52 +0100177# Flag to apply erratum 833471 workaround during reset. This erratum applies
178# only to revision <= r1p2 of the Cortex A57 cpu.
179ERRATA_A57_833471 ?=0
180
Eleanor Bonnici0c9bd272017-08-02 16:35:04 +0100181# Flag to apply erratum 855972 workaround during reset. This erratum applies
182# only to revision <= r1p3 of the Cortex A57 cpu.
183ERRATA_A57_859972 ?=0
184
Eleanor Bonnicic3b4ca12017-08-02 18:33:41 +0100185# Flag to apply erratum 855971 workaround during reset. This erratum applies
186# only to revision <= r0p3 of the Cortex A72 cpu.
187ERRATA_A72_859971 ?=0
188
Louis Mayencourtd69722c2019-02-27 14:24:16 +0000189# Flag to apply erratum 852427 workaround during reset. This erratum applies
190# only to revision r0p0 of the Cortex A73 cpu.
191ERRATA_A73_852427 ?=0
192
Louis Mayencourt4405de62019-02-21 16:38:16 +0000193# Flag to apply erratum 855423 workaround during reset. This erratum applies
194# only to revision <= r0p1 of the Cortex A73 cpu.
195ERRATA_A73_855423 ?=0
196
Louis Mayencourt78a0aed2019-02-20 12:11:41 +0000197# Flag to apply erratum 764081 workaround during reset. This erratum applies
198# only to revision <= r0p0 of the Cortex A75 cpu.
199ERRATA_A75_764081 ?=0
200
Louis Mayencourt8d868702019-02-25 14:57:57 +0000201# Flag to apply erratum 790748 workaround during reset. This erratum applies
202# only to revision <= r0p0 of the Cortex A75 cpu.
203ERRATA_A75_790748 ?=0
204
Louis Mayencourt59fa2182019-02-25 15:17:44 +0000205# Flag to apply erratum 1073348 workaround during reset. This erratum applies
206# only to revision <= r1p0 of the Cortex A76 cpu.
207ERRATA_A76_1073348 ?=0
208
Louis Mayencourt09924472019-02-21 17:35:07 +0000209# Flag to apply erratum 1130799 workaround during reset. This erratum applies
210# only to revision <= r2p0 of the Cortex A76 cpu.
211ERRATA_A76_1130799 ?=0
212
Louis Mayencourtadda9d42019-02-25 11:37:38 +0000213# Flag to apply erratum 1220197 workaround during reset. This erratum applies
214# only to revision <= r2p0 of the Cortex A76 cpu.
215ERRATA_A76_1220197 ?=0
216
Soby Mathew1d3ba1c2019-05-01 09:43:18 +0100217# Flag to apply erratum 1257314 workaround during reset. This erratum applies
218# only to revision <= r3p0 of the Cortex A76 cpu.
219ERRATA_A76_1257314 ?=0
220
221# Flag to apply erratum 1262606 workaround during reset. This erratum applies
222# only to revision <= r3p0 of the Cortex A76 cpu.
223ERRATA_A76_1262606 ?=0
224
225# Flag to apply erratum 1262888 workaround during reset. This erratum applies
226# only to revision <= r3p0 of the Cortex A76 cpu.
227ERRATA_A76_1262888 ?=0
228
229# Flag to apply erratum 1275112 workaround during reset. This erratum applies
230# only to revision <= r3p0 of the Cortex A76 cpu.
231ERRATA_A76_1275112 ?=0
232
Soby Mathew16d006b2019-05-03 13:17:56 +0100233# Flag to apply erratum 1286807 workaround during reset. This erratum applies
234# only to revision <= r3p0 of the Cortex A76 cpu.
235ERRATA_A76_1286807 ?=0
236
Dimitris Papastamos7ca21db2018-03-26 16:46:01 +0100237# Flag to apply T32 CLREX workaround during reset. This erratum applies
John Tsichritzis56369c12019-02-19 13:49:06 +0000238# only to r0p0 and r1p0 of the Neoverse N1 cpu.
239ERRATA_N1_1043202 ?=1
Dimitris Papastamos7ca21db2018-03-26 16:46:01 +0100240
lauwal01bd555f42019-06-24 11:23:50 -0500241# Flag to apply erratum 1073348 workaround during reset. This erratum applies
242# only to revision r0p0 and r1p0 of the Neoverse N1 cpu.
243ERRATA_N1_1073348 ?=0
244
lauwal01363ee3c2019-06-24 11:28:34 -0500245# Flag to apply erratum 1130799 workaround during reset. This erratum applies
246# only to revision <= r2p0 of the Neoverse N1 cpu.
247ERRATA_N1_1130799 ?=0
248
lauwal01f2adb132019-06-24 11:32:40 -0500249# Flag to apply erratum 1165347 workaround during reset. This erratum applies
250# only to revision <= r2p0 of the Neoverse N1 cpu.
251ERRATA_N1_1165347 ?=0
252
lauwal01e1590442019-06-24 11:35:37 -0500253# Flag to apply erratum 1207823 workaround during reset. This erratum applies
254# only to revision <= r2p0 of the Neoverse N1 cpu.
255ERRATA_N1_1207823 ?=0
256
lauwal01197f14c2019-06-24 11:38:53 -0500257# Flag to apply erratum 1220197 workaround during reset. This erratum applies
258# only to revision <= r2p0 of the Neoverse N1 cpu.
259ERRATA_N1_1220197 ?=0
260
lauwal0107c2a232019-06-24 11:42:02 -0500261# Flag to apply erratum 1257314 workaround during reset. This erratum applies
262# only to revision <= r3p0 of the Neoverse N1 cpu.
263ERRATA_N1_1257314 ?=0
264
lauwal0142771af2019-06-24 11:44:58 -0500265# Flag to apply erratum 1262606 workaround during reset. This erratum applies
266# only to revision <= r3p0 of the Neoverse N1 cpu.
267ERRATA_N1_1262606 ?=0
268
lauwal0100396bf2019-06-24 11:47:30 -0500269# Flag to apply erratum 1262888 workaround during reset. This erratum applies
270# only to revision <= r3p0 of the Neoverse N1 cpu.
271ERRATA_N1_1262888 ?=0
272
lauwal01644b6ed2019-06-24 11:49:01 -0500273# Flag to apply erratum 1275112 workaround during reset. This erratum applies
274# only to revision <= r3p0 of the Neoverse N1 cpu.
275ERRATA_N1_1275112 ?=0
276
Andre Przywarab9347402019-05-20 14:57:06 +0100277# Flag to apply erratum 1315703 workaround during reset. This erratum applies
278# to revisions before r3p1 of the Neoverse N1 cpu.
279ERRATA_N1_1315703 ?=1
280
Louis Mayencourt4498b152019-04-09 16:29:01 +0100281# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
282# Applying the workaround results in higher DSU power consumption on idle.
283ERRATA_DSU_798953 ?=0
284
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100285# Flag to apply DSU erratum 936184. This erratum applies to DSUs containing
286# the ACP interface and revision < r2p0. Applying the workaround results in
287# higher DSU power consumption on idle.
288ERRATA_DSU_936184 ?=0
289
Joel Hutton26d16762019-04-10 12:52:52 +0100290# Process ERRATA_A9_794073 flag
291$(eval $(call assert_boolean,ERRATA_A9_794073))
292$(eval $(call add_define,ERRATA_A9_794073))
293
Ambroise Vincentd4a51eb2019-03-04 16:56:26 +0000294# Process ERRATA_A15_816470 flag
295$(eval $(call assert_boolean,ERRATA_A15_816470))
296$(eval $(call add_define,ERRATA_A15_816470))
297
Ambroise Vincent68b38122019-03-05 09:54:21 +0000298# Process ERRATA_A15_827671 flag
299$(eval $(call assert_boolean,ERRATA_A15_827671))
300$(eval $(call add_define,ERRATA_A15_827671))
301
Ambroise Vincent8cf9eef2019-02-28 16:23:53 +0000302# Process ERRATA_A17_852421 flag
303$(eval $(call assert_boolean,ERRATA_A17_852421))
304$(eval $(call add_define,ERRATA_A17_852421))
305
Ambroise Vincentfa5c9512019-03-04 13:20:56 +0000306# Process ERRATA_A17_852423 flag
307$(eval $(call assert_boolean,ERRATA_A17_852423))
308$(eval $(call add_define,ERRATA_A17_852423))
309
Louis Mayencourt8a061272019-04-05 16:25:25 +0100310# Process ERRATA_A35_855472 flag
311$(eval $(call assert_boolean,ERRATA_A35_855472))
312$(eval $(call add_define,ERRATA_A35_855472))
313
Ambroise Vincentf5fdfbc2019-02-21 14:16:24 +0000314# Process ERRATA_A53_819472 flag
315$(eval $(call assert_boolean,ERRATA_A53_819472))
316$(eval $(call add_define,ERRATA_A53_819472))
317
318# Process ERRATA_A53_824069 flag
319$(eval $(call assert_boolean,ERRATA_A53_824069))
320$(eval $(call add_define,ERRATA_A53_824069))
321
developer4fceaca2015-07-29 20:55:31 +0800322# Process ERRATA_A53_826319 flag
323$(eval $(call assert_boolean,ERRATA_A53_826319))
324$(eval $(call add_define,ERRATA_A53_826319))
325
Ambroise Vincentf5fdfbc2019-02-21 14:16:24 +0000326# Process ERRATA_A53_827319 flag
327$(eval $(call assert_boolean,ERRATA_A53_827319))
328$(eval $(call add_define,ERRATA_A53_827319))
329
Douglas Raillardd56fb042017-06-19 15:38:02 +0100330# Process ERRATA_A53_835769 flag
331$(eval $(call assert_boolean,ERRATA_A53_835769))
332$(eval $(call add_define,ERRATA_A53_835769))
333
developer4fceaca2015-07-29 20:55:31 +0800334# Process ERRATA_A53_836870 flag
335$(eval $(call assert_boolean,ERRATA_A53_836870))
336$(eval $(call add_define,ERRATA_A53_836870))
337
Douglas Raillardd56fb042017-06-19 15:38:02 +0100338# Process ERRATA_A53_843419 flag
339$(eval $(call assert_boolean,ERRATA_A53_843419))
340$(eval $(call add_define,ERRATA_A53_843419))
341
Andre Przywara00eefd92016-10-06 16:54:53 +0100342# Process ERRATA_A53_855873 flag
343$(eval $(call assert_boolean,ERRATA_A53_855873))
344$(eval $(call add_define,ERRATA_A53_855873))
345
Ambroise Vincent7927fa02019-02-21 16:20:43 +0000346# Process ERRATA_A55_768277 flag
347$(eval $(call assert_boolean,ERRATA_A55_768277))
348$(eval $(call add_define,ERRATA_A55_768277))
349
Ambroise Vincent6f319602019-02-21 16:25:37 +0000350# Process ERRATA_A55_778703 flag
351$(eval $(call assert_boolean,ERRATA_A55_778703))
352$(eval $(call add_define,ERRATA_A55_778703))
353
Ambroise Vincent6a77f052019-02-21 16:27:34 +0000354# Process ERRATA_A55_798797 flag
355$(eval $(call assert_boolean,ERRATA_A55_798797))
356$(eval $(call add_define,ERRATA_A55_798797))
357
Ambroise Vincentdd961f72019-02-21 16:29:16 +0000358# Process ERRATA_A55_846532 flag
359$(eval $(call assert_boolean,ERRATA_A55_846532))
360$(eval $(call add_define,ERRATA_A55_846532))
361
Ambroise Vincenta1d64462019-02-21 16:29:50 +0000362# Process ERRATA_A55_903758 flag
363$(eval $(call assert_boolean,ERRATA_A55_903758))
364$(eval $(call add_define,ERRATA_A55_903758))
365
Ambroise Vincentb72fe7a2019-05-28 09:52:48 +0100366# Process ERRATA_A55_1221012 flag
367$(eval $(call assert_boolean,ERRATA_A55_1221012))
368$(eval $(call add_define,ERRATA_A55_1221012))
369
Soby Mathew802f8652014-08-14 16:19:29 +0100370# Process ERRATA_A57_806969 flag
371$(eval $(call assert_boolean,ERRATA_A57_806969))
372$(eval $(call add_define,ERRATA_A57_806969))
373
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000374# Process ERRATA_A57_813419 flag
375$(eval $(call assert_boolean,ERRATA_A57_813419))
376$(eval $(call add_define,ERRATA_A57_813419))
377
Soby Mathew802f8652014-08-14 16:19:29 +0100378# Process ERRATA_A57_813420 flag
379$(eval $(call assert_boolean,ERRATA_A57_813420))
380$(eval $(call add_define,ERRATA_A57_813420))
Sandrine Bailleuxa7e0c532016-04-14 13:32:31 +0100381
Ambroise Vincent1b0db762019-02-21 16:35:07 +0000382# Process ERRATA_A57_814670 flag
383$(eval $(call assert_boolean,ERRATA_A57_814670))
384$(eval $(call add_define,ERRATA_A57_814670))
385
Ambroise Vincentaa2c0292019-02-21 16:35:49 +0000386# Process ERRATA_A57_817169 flag
387$(eval $(call assert_boolean,ERRATA_A57_817169))
388$(eval $(call add_define,ERRATA_A57_817169))
389
Sandrine Bailleuxa7e0c532016-04-14 13:32:31 +0100390# Process ERRATA_A57_826974 flag
391$(eval $(call assert_boolean,ERRATA_A57_826974))
392$(eval $(call add_define,ERRATA_A57_826974))
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +0100393
Sandrine Bailleuxadcbd552016-04-14 14:24:13 +0100394# Process ERRATA_A57_826977 flag
395$(eval $(call assert_boolean,ERRATA_A57_826977))
396$(eval $(call add_define,ERRATA_A57_826977))
397
Sandrine Bailleuxc11116f2016-04-14 14:04:48 +0100398# Process ERRATA_A57_828024 flag
399$(eval $(call assert_boolean,ERRATA_A57_828024))
400$(eval $(call add_define,ERRATA_A57_828024))
Sandrine Bailleux48cbe852016-04-14 14:18:07 +0100401
402# Process ERRATA_A57_829520 flag
403$(eval $(call assert_boolean,ERRATA_A57_829520))
404$(eval $(call add_define,ERRATA_A57_829520))
Sandrine Bailleux143ef1a2016-04-21 11:10:52 +0100405
406# Process ERRATA_A57_833471 flag
407$(eval $(call assert_boolean,ERRATA_A57_833471))
408$(eval $(call add_define,ERRATA_A57_833471))
Douglas Raillardd56fb042017-06-19 15:38:02 +0100409
Eleanor Bonnici0c9bd272017-08-02 16:35:04 +0100410# Process ERRATA_A57_859972 flag
411$(eval $(call assert_boolean,ERRATA_A57_859972))
412$(eval $(call add_define,ERRATA_A57_859972))
413
Eleanor Bonnicic3b4ca12017-08-02 18:33:41 +0100414# Process ERRATA_A72_859971 flag
415$(eval $(call assert_boolean,ERRATA_A72_859971))
416$(eval $(call add_define,ERRATA_A72_859971))
417
Louis Mayencourtd69722c2019-02-27 14:24:16 +0000418# Process ERRATA_A73_852427 flag
419$(eval $(call assert_boolean,ERRATA_A73_852427))
420$(eval $(call add_define,ERRATA_A73_852427))
421
Louis Mayencourt4405de62019-02-21 16:38:16 +0000422# Process ERRATA_A73_855423 flag
423$(eval $(call assert_boolean,ERRATA_A73_855423))
424$(eval $(call add_define,ERRATA_A73_855423))
425
Louis Mayencourt78a0aed2019-02-20 12:11:41 +0000426# Process ERRATA_A75_764081 flag
427$(eval $(call assert_boolean,ERRATA_A75_764081))
428$(eval $(call add_define,ERRATA_A75_764081))
429
Louis Mayencourt8d868702019-02-25 14:57:57 +0000430# Process ERRATA_A75_790748 flag
431$(eval $(call assert_boolean,ERRATA_A75_790748))
432$(eval $(call add_define,ERRATA_A75_790748))
433
Louis Mayencourt59fa2182019-02-25 15:17:44 +0000434# Process ERRATA_A76_1073348 flag
435$(eval $(call assert_boolean,ERRATA_A76_1073348))
436$(eval $(call add_define,ERRATA_A76_1073348))
437
Louis Mayencourt09924472019-02-21 17:35:07 +0000438# Process ERRATA_A76_1130799 flag
439$(eval $(call assert_boolean,ERRATA_A76_1130799))
440$(eval $(call add_define,ERRATA_A76_1130799))
441
Louis Mayencourtadda9d42019-02-25 11:37:38 +0000442# Process ERRATA_A76_1220197 flag
443$(eval $(call assert_boolean,ERRATA_A76_1220197))
444$(eval $(call add_define,ERRATA_A76_1220197))
445
Soby Mathew1d3ba1c2019-05-01 09:43:18 +0100446# Process ERRATA_A76_1257314 flag
447$(eval $(call assert_boolean,ERRATA_A76_1257314))
448$(eval $(call add_define,ERRATA_A76_1257314))
449
450# Process ERRATA_A76_1262606 flag
451$(eval $(call assert_boolean,ERRATA_A76_1262606))
452$(eval $(call add_define,ERRATA_A76_1262606))
453
454# Process ERRATA_A76_1262888 flag
455$(eval $(call assert_boolean,ERRATA_A76_1262888))
456$(eval $(call add_define,ERRATA_A76_1262888))
457
458# Process ERRATA_A76_1275112 flag
459$(eval $(call assert_boolean,ERRATA_A76_1275112))
460$(eval $(call add_define,ERRATA_A76_1275112))
461
Soby Mathew16d006b2019-05-03 13:17:56 +0100462# Process ERRATA_A76_1286807 flag
463$(eval $(call assert_boolean,ERRATA_A76_1286807))
464$(eval $(call add_define,ERRATA_A76_1286807))
465
John Tsichritzis56369c12019-02-19 13:49:06 +0000466# Process ERRATA_N1_1043202 flag
467$(eval $(call assert_boolean,ERRATA_N1_1043202))
468$(eval $(call add_define,ERRATA_N1_1043202))
Dimitris Papastamos7ca21db2018-03-26 16:46:01 +0100469
lauwal01bd555f42019-06-24 11:23:50 -0500470# Process ERRATA_N1_1073348 flag
471$(eval $(call assert_boolean,ERRATA_N1_1073348))
472$(eval $(call add_define,ERRATA_N1_1073348))
473
lauwal01363ee3c2019-06-24 11:28:34 -0500474# Process ERRATA_N1_1130799 flag
475$(eval $(call assert_boolean,ERRATA_N1_1130799))
476$(eval $(call add_define,ERRATA_N1_1130799))
477
lauwal01f2adb132019-06-24 11:32:40 -0500478# Process ERRATA_N1_1165347 flag
479$(eval $(call assert_boolean,ERRATA_N1_1165347))
480$(eval $(call add_define,ERRATA_N1_1165347))
481
lauwal01e1590442019-06-24 11:35:37 -0500482# Process ERRATA_N1_1207823 flag
483$(eval $(call assert_boolean,ERRATA_N1_1207823))
484$(eval $(call add_define,ERRATA_N1_1207823))
485
lauwal01197f14c2019-06-24 11:38:53 -0500486# Process ERRATA_N1_1220197 flag
487$(eval $(call assert_boolean,ERRATA_N1_1220197))
488$(eval $(call add_define,ERRATA_N1_1220197))
489
lauwal0107c2a232019-06-24 11:42:02 -0500490# Process ERRATA_N1_1257314 flag
491$(eval $(call assert_boolean,ERRATA_N1_1257314))
492$(eval $(call add_define,ERRATA_N1_1257314))
493
lauwal0142771af2019-06-24 11:44:58 -0500494# Process ERRATA_N1_1262606 flag
495$(eval $(call assert_boolean,ERRATA_N1_1262606))
496$(eval $(call add_define,ERRATA_N1_1262606))
497
lauwal0100396bf2019-06-24 11:47:30 -0500498# Process ERRATA_N1_1262888 flag
499$(eval $(call assert_boolean,ERRATA_N1_1262888))
500$(eval $(call add_define,ERRATA_N1_1262888))
501
lauwal01644b6ed2019-06-24 11:49:01 -0500502# Process ERRATA_N1_1275112 flag
503$(eval $(call assert_boolean,ERRATA_N1_1275112))
504$(eval $(call add_define,ERRATA_N1_1275112))
505
Andre Przywarab9347402019-05-20 14:57:06 +0100506# Process ERRATA_N1_1315703 flag
507$(eval $(call assert_boolean,ERRATA_N1_1315703))
508$(eval $(call add_define,ERRATA_N1_1315703))
509
Louis Mayencourt4498b152019-04-09 16:29:01 +0100510# Process ERRATA_DSU_798953 flag
511$(eval $(call assert_boolean,ERRATA_DSU_798953))
512$(eval $(call add_define,ERRATA_DSU_798953))
513
John Tsichritzis4daa1de2018-07-23 09:11:59 +0100514# Process ERRATA_DSU_936184 flag
515$(eval $(call assert_boolean,ERRATA_DSU_936184))
516$(eval $(call add_define,ERRATA_DSU_936184))
517
Douglas Raillardd56fb042017-06-19 15:38:02 +0100518# Errata build flags
519ifneq (${ERRATA_A53_843419},0)
Douglas Raillardd0c82732017-06-22 14:44:48 +0100520TF_LDFLAGS_aarch64 += --fix-cortex-a53-843419
Douglas Raillardd56fb042017-06-19 15:38:02 +0100521endif
522
523ifneq (${ERRATA_A53_835769},0)
524TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769
Douglas Raillardd0c82732017-06-22 14:44:48 +0100525TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769
Douglas Raillardd56fb042017-06-19 15:38:02 +0100526endif