Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 1 | # |
John Tsichritzis | 56369c1 | 2019-02-19 13:49:06 +0000 | [diff] [blame] | 2 | # Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 3 | # |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | # SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 5 | # |
| 6 | |
Soby Mathew | 937488b | 2014-09-22 14:13:34 +0100 | [diff] [blame] | 7 | # Cortex A57 specific optimisation to skip L1 cache flush when |
| 8 | # cluster is powered down. |
| 9 | SKIP_A57_L1_FLUSH_PWR_DWN ?=0 |
| 10 | |
Sandrine Bailleux | d481759 | 2016-01-13 14:57:38 +0000 | [diff] [blame] | 11 | # Flag to disable the cache non-temporal hint. |
| 12 | # It is enabled by default. |
| 13 | A53_DISABLE_NON_TEMPORAL_HINT ?=1 |
| 14 | |
| 15 | # Flag to disable the cache non-temporal hint. |
| 16 | # It is enabled by default. |
| 17 | A57_DISABLE_NON_TEMPORAL_HINT ?=1 |
| 18 | |
Dimitris Papastamos | 446f7f1 | 2017-11-30 14:53:53 +0000 | [diff] [blame] | 19 | WORKAROUND_CVE_2017_5715 ?=1 |
Dimitris Papastamos | e6625ec | 2018-04-05 14:38:26 +0100 | [diff] [blame] | 20 | WORKAROUND_CVE_2018_3639 ?=1 |
Dimitris Papastamos | ba51d9e | 2018-05-16 11:36:14 +0100 | [diff] [blame] | 21 | DYNAMIC_WORKAROUND_CVE_2018_3639 ?=0 |
Dimitris Papastamos | 446f7f1 | 2017-11-30 14:53:53 +0000 | [diff] [blame] | 22 | |
Soby Mathew | 937488b | 2014-09-22 14:13:34 +0100 | [diff] [blame] | 23 | # Process SKIP_A57_L1_FLUSH_PWR_DWN flag |
| 24 | $(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN)) |
| 25 | $(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN)) |
| 26 | |
Sandrine Bailleux | d481759 | 2016-01-13 14:57:38 +0000 | [diff] [blame] | 27 | # Process A53_DISABLE_NON_TEMPORAL_HINT flag |
| 28 | $(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT)) |
| 29 | $(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT)) |
| 30 | |
| 31 | # Process A57_DISABLE_NON_TEMPORAL_HINT flag |
| 32 | $(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT)) |
| 33 | $(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT)) |
| 34 | |
Dimitris Papastamos | 446f7f1 | 2017-11-30 14:53:53 +0000 | [diff] [blame] | 35 | # Process WORKAROUND_CVE_2017_5715 flag |
| 36 | $(eval $(call assert_boolean,WORKAROUND_CVE_2017_5715)) |
| 37 | $(eval $(call add_define,WORKAROUND_CVE_2017_5715)) |
Soby Mathew | 937488b | 2014-09-22 14:13:34 +0100 | [diff] [blame] | 38 | |
Dimitris Papastamos | e6625ec | 2018-04-05 14:38:26 +0100 | [diff] [blame] | 39 | # Process WORKAROUND_CVE_2018_3639 flag |
| 40 | $(eval $(call assert_boolean,WORKAROUND_CVE_2018_3639)) |
| 41 | $(eval $(call add_define,WORKAROUND_CVE_2018_3639)) |
| 42 | |
Dimitris Papastamos | ba51d9e | 2018-05-16 11:36:14 +0100 | [diff] [blame] | 43 | $(eval $(call assert_boolean,DYNAMIC_WORKAROUND_CVE_2018_3639)) |
| 44 | $(eval $(call add_define,DYNAMIC_WORKAROUND_CVE_2018_3639)) |
| 45 | |
| 46 | ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0) |
| 47 | ifeq (${WORKAROUND_CVE_2018_3639},0) |
| 48 | $(error "Error: WORKAROUND_CVE_2018_3639 must be 1 if DYNAMIC_WORKAROUND_CVE_2018_3639 is 1") |
| 49 | endif |
| 50 | endif |
| 51 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 52 | # CPU Errata Build flags. |
| 53 | # These should be enabled by the platform if the erratum workaround needs to be |
| 54 | # applied. |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 55 | |
Joel Hutton | 26d1676 | 2019-04-10 12:52:52 +0100 | [diff] [blame] | 56 | # Flag to apply erratum 794073 workaround when disabling mmu. |
| 57 | ERRATA_A9_794073 ?=0 |
| 58 | |
Ambroise Vincent | d4a51eb | 2019-03-04 16:56:26 +0000 | [diff] [blame] | 59 | # Flag to apply erratum 816470 workaround during power down. This erratum |
| 60 | # applies only to revision >= r3p0 of the Cortex A15 cpu. |
| 61 | ERRATA_A15_816470 ?=0 |
| 62 | |
Ambroise Vincent | 68b3812 | 2019-03-05 09:54:21 +0000 | [diff] [blame] | 63 | # Flag to apply erratum 827671 workaround during reset. This erratum applies |
| 64 | # only to revision >= r3p0 of the Cortex A15 cpu. |
| 65 | ERRATA_A15_827671 ?=0 |
| 66 | |
Ambroise Vincent | 8cf9eef | 2019-02-28 16:23:53 +0000 | [diff] [blame] | 67 | # Flag to apply erratum 852421 workaround during reset. This erratum applies |
| 68 | # only to revision <= r1p2 of the Cortex A17 cpu. |
| 69 | ERRATA_A17_852421 ?=0 |
| 70 | |
Ambroise Vincent | fa5c951 | 2019-03-04 13:20:56 +0000 | [diff] [blame] | 71 | # Flag to apply erratum 852423 workaround during reset. This erratum applies |
| 72 | # only to revision <= r1p2 of the Cortex A17 cpu. |
| 73 | ERRATA_A17_852423 ?=0 |
| 74 | |
Louis Mayencourt | 8a06127 | 2019-04-05 16:25:25 +0100 | [diff] [blame] | 75 | # Flag to apply erratum 855472 workaround during reset. This erratum applies |
| 76 | # only to revision r0p0 of the Cortex A35 cpu. |
| 77 | ERRATA_A35_855472 ?=0 |
| 78 | |
Ambroise Vincent | f5fdfbc | 2019-02-21 14:16:24 +0000 | [diff] [blame] | 79 | # Flag to apply erratum 819472 workaround during reset. This erratum applies |
| 80 | # only to revision <= r0p1 of the Cortex A53 cpu. |
| 81 | ERRATA_A53_819472 ?=0 |
| 82 | |
| 83 | # Flag to apply erratum 824069 workaround during reset. This erratum applies |
| 84 | # only to revision <= r0p2 of the Cortex A53 cpu. |
| 85 | ERRATA_A53_824069 ?=0 |
| 86 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 87 | # Flag to apply erratum 826319 workaround during reset. This erratum applies |
| 88 | # only to revision <= r0p2 of the Cortex A53 cpu. |
developer | 4fceaca | 2015-07-29 20:55:31 +0800 | [diff] [blame] | 89 | ERRATA_A53_826319 ?=0 |
| 90 | |
Ambroise Vincent | f5fdfbc | 2019-02-21 14:16:24 +0000 | [diff] [blame] | 91 | # Flag to apply erratum 827319 workaround during reset. This erratum applies |
| 92 | # only to revision <= r0p2 of the Cortex A53 cpu. |
| 93 | ERRATA_A53_827319 ?=0 |
| 94 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 95 | # Flag to apply erratum 835769 workaround at compile and link time. This |
| 96 | # erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this |
| 97 | # workaround can lead the linker to create "*.stub" sections. |
| 98 | ERRATA_A53_835769 ?=0 |
| 99 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 100 | # Flag to apply erratum 836870 workaround during reset. This erratum applies |
| 101 | # only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this |
Douglas Raillard | c847f66 | 2017-02-15 17:38:43 +0000 | [diff] [blame] | 102 | # erratum workaround is enabled by default in hardware. |
developer | 4fceaca | 2015-07-29 20:55:31 +0800 | [diff] [blame] | 103 | ERRATA_A53_836870 ?=0 |
| 104 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 105 | # Flag to apply erratum 843419 workaround at link time. |
| 106 | # This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this |
| 107 | # workaround could lead the linker to emit "*.stub" sections which are 4kB |
| 108 | # aligned. |
| 109 | ERRATA_A53_843419 ?=0 |
| 110 | |
Andre Przywara | 00eefd9 | 2016-10-06 16:54:53 +0100 | [diff] [blame] | 111 | # Flag to apply errata 855873 during reset. This errata applies to all |
| 112 | # revisions of the Cortex A53 CPU, but this firmware workaround only works |
| 113 | # for revisions r0p3 and higher. Earlier revisions are taken care |
| 114 | # of by the rich OS. |
| 115 | ERRATA_A53_855873 ?=0 |
| 116 | |
Ambroise Vincent | 7927fa0 | 2019-02-21 16:20:43 +0000 | [diff] [blame] | 117 | # Flag to apply erratum 768277 workaround during reset. This erratum applies |
| 118 | # only to revision r0p0 of the Cortex A55 cpu. |
| 119 | ERRATA_A55_768277 ?=0 |
| 120 | |
Ambroise Vincent | 6f31960 | 2019-02-21 16:25:37 +0000 | [diff] [blame] | 121 | # Flag to apply erratum 778703 workaround during reset. This erratum applies |
| 122 | # only to revision r0p0 of the Cortex A55 cpu. |
| 123 | ERRATA_A55_778703 ?=0 |
| 124 | |
Ambroise Vincent | 6a77f05 | 2019-02-21 16:27:34 +0000 | [diff] [blame] | 125 | # Flag to apply erratum 798797 workaround during reset. This erratum applies |
| 126 | # only to revision r0p0 of the Cortex A55 cpu. |
| 127 | ERRATA_A55_798797 ?=0 |
| 128 | |
Ambroise Vincent | dd961f7 | 2019-02-21 16:29:16 +0000 | [diff] [blame] | 129 | # Flag to apply erratum 846532 workaround during reset. This erratum applies |
| 130 | # only to revision <= r0p1 of the Cortex A55 cpu. |
| 131 | ERRATA_A55_846532 ?=0 |
| 132 | |
Ambroise Vincent | a1d6446 | 2019-02-21 16:29:50 +0000 | [diff] [blame] | 133 | # Flag to apply erratum 903758 workaround during reset. This erratum applies |
| 134 | # only to revision <= r0p1 of the Cortex A55 cpu. |
| 135 | ERRATA_A55_903758 ?=0 |
| 136 | |
Ambroise Vincent | b72fe7a | 2019-05-28 09:52:48 +0100 | [diff] [blame] | 137 | # Flag to apply erratum 1221012 workaround during reset. This erratum applies |
| 138 | # only to revision <= r1p0 of the Cortex A55 cpu. |
| 139 | ERRATA_A55_1221012 ?=0 |
| 140 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 141 | # Flag to apply erratum 806969 workaround during reset. This erratum applies |
| 142 | # only to revision r0p0 of the Cortex A57 cpu. |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 143 | ERRATA_A57_806969 ?=0 |
| 144 | |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 145 | # Flag to apply erratum 813419 workaround during reset. This erratum applies |
| 146 | # only to revision r0p0 of the Cortex A57 cpu. |
| 147 | ERRATA_A57_813419 ?=0 |
| 148 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 149 | # Flag to apply erratum 813420 workaround during reset. This erratum applies |
| 150 | # only to revision r0p0 of the Cortex A57 cpu. |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 151 | ERRATA_A57_813420 ?=0 |
| 152 | |
Ambroise Vincent | 1b0db76 | 2019-02-21 16:35:07 +0000 | [diff] [blame] | 153 | # Flag to apply erratum 814670 workaround during reset. This erratum applies |
| 154 | # only to revision r0p0 of the Cortex A57 cpu. |
| 155 | ERRATA_A57_814670 ?=0 |
| 156 | |
Ambroise Vincent | aa2c029 | 2019-02-21 16:35:49 +0000 | [diff] [blame] | 157 | # Flag to apply erratum 817169 workaround during power down. This erratum |
| 158 | # applies only to revision <= r0p1 of the Cortex A57 cpu. |
| 159 | ERRATA_A57_817169 ?=0 |
| 160 | |
Sandrine Bailleux | a7e0c53 | 2016-04-14 13:32:31 +0100 | [diff] [blame] | 161 | # Flag to apply erratum 826974 workaround during reset. This erratum applies |
| 162 | # only to revision <= r1p1 of the Cortex A57 cpu. |
| 163 | ERRATA_A57_826974 ?=0 |
| 164 | |
Sandrine Bailleux | adcbd55 | 2016-04-14 14:24:13 +0100 | [diff] [blame] | 165 | # Flag to apply erratum 826977 workaround during reset. This erratum applies |
| 166 | # only to revision <= r1p1 of the Cortex A57 cpu. |
| 167 | ERRATA_A57_826977 ?=0 |
| 168 | |
Sandrine Bailleux | c11116f | 2016-04-14 14:04:48 +0100 | [diff] [blame] | 169 | # Flag to apply erratum 828024 workaround during reset. This erratum applies |
| 170 | # only to revision <= r1p1 of the Cortex A57 cpu. |
| 171 | ERRATA_A57_828024 ?=0 |
| 172 | |
Sandrine Bailleux | 48cbe85 | 2016-04-14 14:18:07 +0100 | [diff] [blame] | 173 | # Flag to apply erratum 829520 workaround during reset. This erratum applies |
| 174 | # only to revision <= r1p2 of the Cortex A57 cpu. |
| 175 | ERRATA_A57_829520 ?=0 |
| 176 | |
Sandrine Bailleux | 143ef1a | 2016-04-21 11:10:52 +0100 | [diff] [blame] | 177 | # Flag to apply erratum 833471 workaround during reset. This erratum applies |
| 178 | # only to revision <= r1p2 of the Cortex A57 cpu. |
| 179 | ERRATA_A57_833471 ?=0 |
| 180 | |
Eleanor Bonnici | 0c9bd27 | 2017-08-02 16:35:04 +0100 | [diff] [blame] | 181 | # Flag to apply erratum 855972 workaround during reset. This erratum applies |
| 182 | # only to revision <= r1p3 of the Cortex A57 cpu. |
| 183 | ERRATA_A57_859972 ?=0 |
| 184 | |
Eleanor Bonnici | c3b4ca1 | 2017-08-02 18:33:41 +0100 | [diff] [blame] | 185 | # Flag to apply erratum 855971 workaround during reset. This erratum applies |
| 186 | # only to revision <= r0p3 of the Cortex A72 cpu. |
| 187 | ERRATA_A72_859971 ?=0 |
| 188 | |
Louis Mayencourt | d69722c | 2019-02-27 14:24:16 +0000 | [diff] [blame] | 189 | # Flag to apply erratum 852427 workaround during reset. This erratum applies |
| 190 | # only to revision r0p0 of the Cortex A73 cpu. |
| 191 | ERRATA_A73_852427 ?=0 |
| 192 | |
Louis Mayencourt | 4405de6 | 2019-02-21 16:38:16 +0000 | [diff] [blame] | 193 | # Flag to apply erratum 855423 workaround during reset. This erratum applies |
| 194 | # only to revision <= r0p1 of the Cortex A73 cpu. |
| 195 | ERRATA_A73_855423 ?=0 |
| 196 | |
Louis Mayencourt | 78a0aed | 2019-02-20 12:11:41 +0000 | [diff] [blame] | 197 | # Flag to apply erratum 764081 workaround during reset. This erratum applies |
| 198 | # only to revision <= r0p0 of the Cortex A75 cpu. |
| 199 | ERRATA_A75_764081 ?=0 |
| 200 | |
Louis Mayencourt | 8d86870 | 2019-02-25 14:57:57 +0000 | [diff] [blame] | 201 | # Flag to apply erratum 790748 workaround during reset. This erratum applies |
| 202 | # only to revision <= r0p0 of the Cortex A75 cpu. |
| 203 | ERRATA_A75_790748 ?=0 |
| 204 | |
Louis Mayencourt | 59fa218 | 2019-02-25 15:17:44 +0000 | [diff] [blame] | 205 | # Flag to apply erratum 1073348 workaround during reset. This erratum applies |
| 206 | # only to revision <= r1p0 of the Cortex A76 cpu. |
| 207 | ERRATA_A76_1073348 ?=0 |
| 208 | |
Louis Mayencourt | 0992447 | 2019-02-21 17:35:07 +0000 | [diff] [blame] | 209 | # Flag to apply erratum 1130799 workaround during reset. This erratum applies |
| 210 | # only to revision <= r2p0 of the Cortex A76 cpu. |
| 211 | ERRATA_A76_1130799 ?=0 |
| 212 | |
Louis Mayencourt | adda9d4 | 2019-02-25 11:37:38 +0000 | [diff] [blame] | 213 | # Flag to apply erratum 1220197 workaround during reset. This erratum applies |
| 214 | # only to revision <= r2p0 of the Cortex A76 cpu. |
| 215 | ERRATA_A76_1220197 ?=0 |
| 216 | |
Soby Mathew | 1d3ba1c | 2019-05-01 09:43:18 +0100 | [diff] [blame] | 217 | # Flag to apply erratum 1257314 workaround during reset. This erratum applies |
| 218 | # only to revision <= r3p0 of the Cortex A76 cpu. |
| 219 | ERRATA_A76_1257314 ?=0 |
| 220 | |
| 221 | # Flag to apply erratum 1262606 workaround during reset. This erratum applies |
| 222 | # only to revision <= r3p0 of the Cortex A76 cpu. |
| 223 | ERRATA_A76_1262606 ?=0 |
| 224 | |
| 225 | # Flag to apply erratum 1262888 workaround during reset. This erratum applies |
| 226 | # only to revision <= r3p0 of the Cortex A76 cpu. |
| 227 | ERRATA_A76_1262888 ?=0 |
| 228 | |
| 229 | # Flag to apply erratum 1275112 workaround during reset. This erratum applies |
| 230 | # only to revision <= r3p0 of the Cortex A76 cpu. |
| 231 | ERRATA_A76_1275112 ?=0 |
| 232 | |
Soby Mathew | 16d006b | 2019-05-03 13:17:56 +0100 | [diff] [blame] | 233 | # Flag to apply erratum 1286807 workaround during reset. This erratum applies |
| 234 | # only to revision <= r3p0 of the Cortex A76 cpu. |
| 235 | ERRATA_A76_1286807 ?=0 |
| 236 | |
Dimitris Papastamos | 7ca21db | 2018-03-26 16:46:01 +0100 | [diff] [blame] | 237 | # Flag to apply T32 CLREX workaround during reset. This erratum applies |
John Tsichritzis | 56369c1 | 2019-02-19 13:49:06 +0000 | [diff] [blame] | 238 | # only to r0p0 and r1p0 of the Neoverse N1 cpu. |
| 239 | ERRATA_N1_1043202 ?=1 |
Dimitris Papastamos | 7ca21db | 2018-03-26 16:46:01 +0100 | [diff] [blame] | 240 | |
Andre Przywara | b934740 | 2019-05-20 14:57:06 +0100 | [diff] [blame] | 241 | # Flag to apply erratum 1315703 workaround during reset. This erratum applies |
| 242 | # to revisions before r3p1 of the Neoverse N1 cpu. |
| 243 | ERRATA_N1_1315703 ?=1 |
| 244 | |
Louis Mayencourt | 4498b15 | 2019-04-09 16:29:01 +0100 | [diff] [blame] | 245 | # Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0. |
| 246 | # Applying the workaround results in higher DSU power consumption on idle. |
| 247 | ERRATA_DSU_798953 ?=0 |
| 248 | |
John Tsichritzis | 4daa1de | 2018-07-23 09:11:59 +0100 | [diff] [blame] | 249 | # Flag to apply DSU erratum 936184. This erratum applies to DSUs containing |
| 250 | # the ACP interface and revision < r2p0. Applying the workaround results in |
| 251 | # higher DSU power consumption on idle. |
| 252 | ERRATA_DSU_936184 ?=0 |
| 253 | |
Joel Hutton | 26d1676 | 2019-04-10 12:52:52 +0100 | [diff] [blame] | 254 | # Process ERRATA_A9_794073 flag |
| 255 | $(eval $(call assert_boolean,ERRATA_A9_794073)) |
| 256 | $(eval $(call add_define,ERRATA_A9_794073)) |
| 257 | |
Ambroise Vincent | d4a51eb | 2019-03-04 16:56:26 +0000 | [diff] [blame] | 258 | # Process ERRATA_A15_816470 flag |
| 259 | $(eval $(call assert_boolean,ERRATA_A15_816470)) |
| 260 | $(eval $(call add_define,ERRATA_A15_816470)) |
| 261 | |
Ambroise Vincent | 68b3812 | 2019-03-05 09:54:21 +0000 | [diff] [blame] | 262 | # Process ERRATA_A15_827671 flag |
| 263 | $(eval $(call assert_boolean,ERRATA_A15_827671)) |
| 264 | $(eval $(call add_define,ERRATA_A15_827671)) |
| 265 | |
Ambroise Vincent | 8cf9eef | 2019-02-28 16:23:53 +0000 | [diff] [blame] | 266 | # Process ERRATA_A17_852421 flag |
| 267 | $(eval $(call assert_boolean,ERRATA_A17_852421)) |
| 268 | $(eval $(call add_define,ERRATA_A17_852421)) |
| 269 | |
Ambroise Vincent | fa5c951 | 2019-03-04 13:20:56 +0000 | [diff] [blame] | 270 | # Process ERRATA_A17_852423 flag |
| 271 | $(eval $(call assert_boolean,ERRATA_A17_852423)) |
| 272 | $(eval $(call add_define,ERRATA_A17_852423)) |
| 273 | |
Louis Mayencourt | 8a06127 | 2019-04-05 16:25:25 +0100 | [diff] [blame] | 274 | # Process ERRATA_A35_855472 flag |
| 275 | $(eval $(call assert_boolean,ERRATA_A35_855472)) |
| 276 | $(eval $(call add_define,ERRATA_A35_855472)) |
| 277 | |
Ambroise Vincent | f5fdfbc | 2019-02-21 14:16:24 +0000 | [diff] [blame] | 278 | # Process ERRATA_A53_819472 flag |
| 279 | $(eval $(call assert_boolean,ERRATA_A53_819472)) |
| 280 | $(eval $(call add_define,ERRATA_A53_819472)) |
| 281 | |
| 282 | # Process ERRATA_A53_824069 flag |
| 283 | $(eval $(call assert_boolean,ERRATA_A53_824069)) |
| 284 | $(eval $(call add_define,ERRATA_A53_824069)) |
| 285 | |
developer | 4fceaca | 2015-07-29 20:55:31 +0800 | [diff] [blame] | 286 | # Process ERRATA_A53_826319 flag |
| 287 | $(eval $(call assert_boolean,ERRATA_A53_826319)) |
| 288 | $(eval $(call add_define,ERRATA_A53_826319)) |
| 289 | |
Ambroise Vincent | f5fdfbc | 2019-02-21 14:16:24 +0000 | [diff] [blame] | 290 | # Process ERRATA_A53_827319 flag |
| 291 | $(eval $(call assert_boolean,ERRATA_A53_827319)) |
| 292 | $(eval $(call add_define,ERRATA_A53_827319)) |
| 293 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 294 | # Process ERRATA_A53_835769 flag |
| 295 | $(eval $(call assert_boolean,ERRATA_A53_835769)) |
| 296 | $(eval $(call add_define,ERRATA_A53_835769)) |
| 297 | |
developer | 4fceaca | 2015-07-29 20:55:31 +0800 | [diff] [blame] | 298 | # Process ERRATA_A53_836870 flag |
| 299 | $(eval $(call assert_boolean,ERRATA_A53_836870)) |
| 300 | $(eval $(call add_define,ERRATA_A53_836870)) |
| 301 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 302 | # Process ERRATA_A53_843419 flag |
| 303 | $(eval $(call assert_boolean,ERRATA_A53_843419)) |
| 304 | $(eval $(call add_define,ERRATA_A53_843419)) |
| 305 | |
Andre Przywara | 00eefd9 | 2016-10-06 16:54:53 +0100 | [diff] [blame] | 306 | # Process ERRATA_A53_855873 flag |
| 307 | $(eval $(call assert_boolean,ERRATA_A53_855873)) |
| 308 | $(eval $(call add_define,ERRATA_A53_855873)) |
| 309 | |
Ambroise Vincent | 7927fa0 | 2019-02-21 16:20:43 +0000 | [diff] [blame] | 310 | # Process ERRATA_A55_768277 flag |
| 311 | $(eval $(call assert_boolean,ERRATA_A55_768277)) |
| 312 | $(eval $(call add_define,ERRATA_A55_768277)) |
| 313 | |
Ambroise Vincent | 6f31960 | 2019-02-21 16:25:37 +0000 | [diff] [blame] | 314 | # Process ERRATA_A55_778703 flag |
| 315 | $(eval $(call assert_boolean,ERRATA_A55_778703)) |
| 316 | $(eval $(call add_define,ERRATA_A55_778703)) |
| 317 | |
Ambroise Vincent | 6a77f05 | 2019-02-21 16:27:34 +0000 | [diff] [blame] | 318 | # Process ERRATA_A55_798797 flag |
| 319 | $(eval $(call assert_boolean,ERRATA_A55_798797)) |
| 320 | $(eval $(call add_define,ERRATA_A55_798797)) |
| 321 | |
Ambroise Vincent | dd961f7 | 2019-02-21 16:29:16 +0000 | [diff] [blame] | 322 | # Process ERRATA_A55_846532 flag |
| 323 | $(eval $(call assert_boolean,ERRATA_A55_846532)) |
| 324 | $(eval $(call add_define,ERRATA_A55_846532)) |
| 325 | |
Ambroise Vincent | a1d6446 | 2019-02-21 16:29:50 +0000 | [diff] [blame] | 326 | # Process ERRATA_A55_903758 flag |
| 327 | $(eval $(call assert_boolean,ERRATA_A55_903758)) |
| 328 | $(eval $(call add_define,ERRATA_A55_903758)) |
| 329 | |
Ambroise Vincent | b72fe7a | 2019-05-28 09:52:48 +0100 | [diff] [blame] | 330 | # Process ERRATA_A55_1221012 flag |
| 331 | $(eval $(call assert_boolean,ERRATA_A55_1221012)) |
| 332 | $(eval $(call add_define,ERRATA_A55_1221012)) |
| 333 | |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 334 | # Process ERRATA_A57_806969 flag |
| 335 | $(eval $(call assert_boolean,ERRATA_A57_806969)) |
| 336 | $(eval $(call add_define,ERRATA_A57_806969)) |
| 337 | |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 338 | # Process ERRATA_A57_813419 flag |
| 339 | $(eval $(call assert_boolean,ERRATA_A57_813419)) |
| 340 | $(eval $(call add_define,ERRATA_A57_813419)) |
| 341 | |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 342 | # Process ERRATA_A57_813420 flag |
| 343 | $(eval $(call assert_boolean,ERRATA_A57_813420)) |
| 344 | $(eval $(call add_define,ERRATA_A57_813420)) |
Sandrine Bailleux | a7e0c53 | 2016-04-14 13:32:31 +0100 | [diff] [blame] | 345 | |
Ambroise Vincent | 1b0db76 | 2019-02-21 16:35:07 +0000 | [diff] [blame] | 346 | # Process ERRATA_A57_814670 flag |
| 347 | $(eval $(call assert_boolean,ERRATA_A57_814670)) |
| 348 | $(eval $(call add_define,ERRATA_A57_814670)) |
| 349 | |
Ambroise Vincent | aa2c029 | 2019-02-21 16:35:49 +0000 | [diff] [blame] | 350 | # Process ERRATA_A57_817169 flag |
| 351 | $(eval $(call assert_boolean,ERRATA_A57_817169)) |
| 352 | $(eval $(call add_define,ERRATA_A57_817169)) |
| 353 | |
Sandrine Bailleux | a7e0c53 | 2016-04-14 13:32:31 +0100 | [diff] [blame] | 354 | # Process ERRATA_A57_826974 flag |
| 355 | $(eval $(call assert_boolean,ERRATA_A57_826974)) |
| 356 | $(eval $(call add_define,ERRATA_A57_826974)) |
Sandrine Bailleux | c11116f | 2016-04-14 14:04:48 +0100 | [diff] [blame] | 357 | |
Sandrine Bailleux | adcbd55 | 2016-04-14 14:24:13 +0100 | [diff] [blame] | 358 | # Process ERRATA_A57_826977 flag |
| 359 | $(eval $(call assert_boolean,ERRATA_A57_826977)) |
| 360 | $(eval $(call add_define,ERRATA_A57_826977)) |
| 361 | |
Sandrine Bailleux | c11116f | 2016-04-14 14:04:48 +0100 | [diff] [blame] | 362 | # Process ERRATA_A57_828024 flag |
| 363 | $(eval $(call assert_boolean,ERRATA_A57_828024)) |
| 364 | $(eval $(call add_define,ERRATA_A57_828024)) |
Sandrine Bailleux | 48cbe85 | 2016-04-14 14:18:07 +0100 | [diff] [blame] | 365 | |
| 366 | # Process ERRATA_A57_829520 flag |
| 367 | $(eval $(call assert_boolean,ERRATA_A57_829520)) |
| 368 | $(eval $(call add_define,ERRATA_A57_829520)) |
Sandrine Bailleux | 143ef1a | 2016-04-21 11:10:52 +0100 | [diff] [blame] | 369 | |
| 370 | # Process ERRATA_A57_833471 flag |
| 371 | $(eval $(call assert_boolean,ERRATA_A57_833471)) |
| 372 | $(eval $(call add_define,ERRATA_A57_833471)) |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 373 | |
Eleanor Bonnici | 0c9bd27 | 2017-08-02 16:35:04 +0100 | [diff] [blame] | 374 | # Process ERRATA_A57_859972 flag |
| 375 | $(eval $(call assert_boolean,ERRATA_A57_859972)) |
| 376 | $(eval $(call add_define,ERRATA_A57_859972)) |
| 377 | |
Eleanor Bonnici | c3b4ca1 | 2017-08-02 18:33:41 +0100 | [diff] [blame] | 378 | # Process ERRATA_A72_859971 flag |
| 379 | $(eval $(call assert_boolean,ERRATA_A72_859971)) |
| 380 | $(eval $(call add_define,ERRATA_A72_859971)) |
| 381 | |
Louis Mayencourt | d69722c | 2019-02-27 14:24:16 +0000 | [diff] [blame] | 382 | # Process ERRATA_A73_852427 flag |
| 383 | $(eval $(call assert_boolean,ERRATA_A73_852427)) |
| 384 | $(eval $(call add_define,ERRATA_A73_852427)) |
| 385 | |
Louis Mayencourt | 4405de6 | 2019-02-21 16:38:16 +0000 | [diff] [blame] | 386 | # Process ERRATA_A73_855423 flag |
| 387 | $(eval $(call assert_boolean,ERRATA_A73_855423)) |
| 388 | $(eval $(call add_define,ERRATA_A73_855423)) |
| 389 | |
Louis Mayencourt | 78a0aed | 2019-02-20 12:11:41 +0000 | [diff] [blame] | 390 | # Process ERRATA_A75_764081 flag |
| 391 | $(eval $(call assert_boolean,ERRATA_A75_764081)) |
| 392 | $(eval $(call add_define,ERRATA_A75_764081)) |
| 393 | |
Louis Mayencourt | 8d86870 | 2019-02-25 14:57:57 +0000 | [diff] [blame] | 394 | # Process ERRATA_A75_790748 flag |
| 395 | $(eval $(call assert_boolean,ERRATA_A75_790748)) |
| 396 | $(eval $(call add_define,ERRATA_A75_790748)) |
| 397 | |
Louis Mayencourt | 59fa218 | 2019-02-25 15:17:44 +0000 | [diff] [blame] | 398 | # Process ERRATA_A76_1073348 flag |
| 399 | $(eval $(call assert_boolean,ERRATA_A76_1073348)) |
| 400 | $(eval $(call add_define,ERRATA_A76_1073348)) |
| 401 | |
Louis Mayencourt | 0992447 | 2019-02-21 17:35:07 +0000 | [diff] [blame] | 402 | # Process ERRATA_A76_1130799 flag |
| 403 | $(eval $(call assert_boolean,ERRATA_A76_1130799)) |
| 404 | $(eval $(call add_define,ERRATA_A76_1130799)) |
| 405 | |
Louis Mayencourt | adda9d4 | 2019-02-25 11:37:38 +0000 | [diff] [blame] | 406 | # Process ERRATA_A76_1220197 flag |
| 407 | $(eval $(call assert_boolean,ERRATA_A76_1220197)) |
| 408 | $(eval $(call add_define,ERRATA_A76_1220197)) |
| 409 | |
Soby Mathew | 1d3ba1c | 2019-05-01 09:43:18 +0100 | [diff] [blame] | 410 | # Process ERRATA_A76_1257314 flag |
| 411 | $(eval $(call assert_boolean,ERRATA_A76_1257314)) |
| 412 | $(eval $(call add_define,ERRATA_A76_1257314)) |
| 413 | |
| 414 | # Process ERRATA_A76_1262606 flag |
| 415 | $(eval $(call assert_boolean,ERRATA_A76_1262606)) |
| 416 | $(eval $(call add_define,ERRATA_A76_1262606)) |
| 417 | |
| 418 | # Process ERRATA_A76_1262888 flag |
| 419 | $(eval $(call assert_boolean,ERRATA_A76_1262888)) |
| 420 | $(eval $(call add_define,ERRATA_A76_1262888)) |
| 421 | |
| 422 | # Process ERRATA_A76_1275112 flag |
| 423 | $(eval $(call assert_boolean,ERRATA_A76_1275112)) |
| 424 | $(eval $(call add_define,ERRATA_A76_1275112)) |
| 425 | |
Soby Mathew | 16d006b | 2019-05-03 13:17:56 +0100 | [diff] [blame] | 426 | # Process ERRATA_A76_1286807 flag |
| 427 | $(eval $(call assert_boolean,ERRATA_A76_1286807)) |
| 428 | $(eval $(call add_define,ERRATA_A76_1286807)) |
| 429 | |
John Tsichritzis | 56369c1 | 2019-02-19 13:49:06 +0000 | [diff] [blame] | 430 | # Process ERRATA_N1_1043202 flag |
| 431 | $(eval $(call assert_boolean,ERRATA_N1_1043202)) |
| 432 | $(eval $(call add_define,ERRATA_N1_1043202)) |
Dimitris Papastamos | 7ca21db | 2018-03-26 16:46:01 +0100 | [diff] [blame] | 433 | |
Andre Przywara | b934740 | 2019-05-20 14:57:06 +0100 | [diff] [blame] | 434 | # Process ERRATA_N1_1315703 flag |
| 435 | $(eval $(call assert_boolean,ERRATA_N1_1315703)) |
| 436 | $(eval $(call add_define,ERRATA_N1_1315703)) |
| 437 | |
Louis Mayencourt | 4498b15 | 2019-04-09 16:29:01 +0100 | [diff] [blame] | 438 | # Process ERRATA_DSU_798953 flag |
| 439 | $(eval $(call assert_boolean,ERRATA_DSU_798953)) |
| 440 | $(eval $(call add_define,ERRATA_DSU_798953)) |
| 441 | |
John Tsichritzis | 4daa1de | 2018-07-23 09:11:59 +0100 | [diff] [blame] | 442 | # Process ERRATA_DSU_936184 flag |
| 443 | $(eval $(call assert_boolean,ERRATA_DSU_936184)) |
| 444 | $(eval $(call add_define,ERRATA_DSU_936184)) |
| 445 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 446 | # Errata build flags |
| 447 | ifneq (${ERRATA_A53_843419},0) |
Douglas Raillard | d0c8273 | 2017-06-22 14:44:48 +0100 | [diff] [blame] | 448 | TF_LDFLAGS_aarch64 += --fix-cortex-a53-843419 |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 449 | endif |
| 450 | |
| 451 | ifneq (${ERRATA_A53_835769},0) |
| 452 | TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769 |
Douglas Raillard | d0c8273 | 2017-06-22 14:44:48 +0100 | [diff] [blame] | 453 | TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769 |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 454 | endif |