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git01.mediatek.com / filogic / uboot / 6d23294cf9e8a38d226af9759fc5951919594ced / drivers / clk / rockchip
  1. 1650a68 rockchip: rk3128: add clock driver by Kever Yang · Tue Nov 28 16:04:17 2017 +0800
  2. 8a4868f rockchip: clk: rk3399: change extract_bits to bitfield_extract by Philipp Tomsich · Wed Nov 22 19:45:04 2017 +0100
  3. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  4. 05a14b0 rockchip: rk3399: init CPU clock when rkclk_init() by Kever Yang · Thu Oct 12 15:27:29 2017 +0800
  5. 81e1042 treewide: replace with error() with pr_err() by Masahiro Yamada · Sat Sep 16 14:10:41 2017 +0900
  6. 180fded rockchip: rk322x: fix pd_bus hclk/pclk by Kever Yang · Thu Sep 28 18:24:03 2017 +0800
  7. b8e0545 rockchip: clk: fix typo in rk322x clock driver by Kever Yang · Wed Sep 27 16:59:56 2017 +0800
  8. f91b9b4 rockchip: clk: Add rk3399 SARADC clock support by David Wu · Wed Sep 20 14:38:58 2017 +0800
  9. 4771ba6 rockchip: clk: Add rk3368 SARADC clock support by David Wu · Wed Sep 20 14:37:50 2017 +0800
  10. a942223 rockchip: clk: Add rk3328 SARADC clock support by David Wu · Wed Sep 20 14:35:44 2017 +0800
  11. 3c248b2 rockchip: clk: Add SARADC clock support for rk3288 by David Wu · Wed Sep 20 14:28:19 2017 +0800
  12. 0f106cc rockchip: clk: Add rv1108 SARADC clock support by David Wu · Wed Sep 20 14:28:18 2017 +0800
  13. 44d7684 rockchip: clk: rk3399: Convert to livetree by Philipp Tomsich · Tue Sep 12 17:32:24 2017 +0200
  14. 62332c1 rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1 by Philipp Tomsich · Tue Sep 12 17:30:56 2017 +0200
  15. 5355999 rockchip: clk: rk3368: Convert to livetree by Philipp Tomsich · Mon Sep 11 22:04:18 2017 +0200
  16. 1b1fe41 dtoc: Add support for 32 or 64-bit addresses by Simon Glass · Tue Aug 29 14:15:50 2017 -0600
  17. f20995b rockchip: clk: remove RATE_TO_DIV by Kever Yang · Thu Jul 27 12:54:02 2017 +0800
  18. 99b546d rockchip: clk: update dwmmc clock div by Kever Yang · Thu Jul 27 12:54:01 2017 +0800
  19. b4fb55f rockchip: clk: rk3368: add support for configuring the SPI clocks by Philipp Tomsich · Tue Jul 25 16:48:16 2017 +0200
  20. 83a5d2c rockchip: clk: rk3368: mark 'priv' __maybe_unused in rk3368_clk_set_rate() by Philipp Tomsich · Wed Jul 05 12:11:58 2017 +0200
  21. a249f10 rockchip: clk: rk3368: add support for GMAC (SLCK_MAC) clock by Philipp Tomsich · Fri Jul 14 19:57:39 2017 +0200
  22. c23a993 rockchip: clk: rk3368: support configuring the DRAM PLL (from TPL) by Philipp Tomsich · Wed Jul 05 11:55:23 2017 +0200
  23. fbf07a5 rockchip: clk: rk3368: implement MMC/SD clock reparenting by Philipp Tomsich · Tue Jul 04 14:49:38 2017 +0200
  24. 313b2da rockchip: clk: rk3368: implement DPLL (DRAM PLL) support by Philipp Tomsich · Fri Jun 23 00:01:10 2017 +0200
  25. 415ff7e rockchip: clk: rk3368: do not change CPLL/GPLL before returning to BROM by Philipp Tomsich · Thu Jun 22 23:53:44 2017 +0200
  26. 79aa1ab rockchip: clk: rk3368: support OF_PLATDATA for the RK3368 clk driver by Philipp Tomsich · Thu Jun 22 23:51:37 2017 +0200
  27. 34b7613 rockchip: clk: rk3368: implement bandwidth adjust for PLLs by Philipp Tomsich · Thu Jun 22 23:47:11 2017 +0200
  28. ea825a3 rockchip: clk: rk3368: use correct (i.e. 'rk3368_clk_priv') structure for auto-alloc by Philipp Tomsich · Tue Jul 11 20:59:45 2017 +0200
  29. c5ccc32 rockchip: rk322x: add clock driver by Kever Yang · Fri Jun 23 17:17:49 2017 +0800
  30. 28bd0b9 Merge branch 'master' of git://git.denx.de/u-boot-rockchip by Tom Rini · Fri Jun 23 11:02:21 2017 -0400
  31. ef5eb17 rockchip: clk: rk3036: correct setting for pll integer mode by Kever Yang · Tue Jun 13 10:03:11 2017 +0800
  32. 20ef0fc clk_rv1108.c: Fix unused variable warning by Tom Rini · Fri Jun 16 13:06:28 2017 -0400
  33. 30ca6a4 rockchip: Init clocks again when chain-loading by Simon Glass · Wed May 31 17:57:32 2017 -0600
  34. 303384f rockchip: rk3288: Convert clock driver to use shifted masks by Simon Glass · Wed May 31 17:57:31 2017 -0600
  35. 6d95cd5 rockchip: clk: Add rv1108 clock driver by Andy Yan · Thu Jun 01 18:00:36 2017 +0800
  36. b45fc40 rockchip: clock: rk3036: some fix according TRM by Kever Yang · Mon May 15 20:52:16 2017 +0800
  37. cb04ad2 rockchip: rk3036: clean mask definition for cru reg by Kever Yang · Mon May 15 20:52:15 2017 +0800
  38. b9909aa rockchip: rk3368: Add clock driver by Andy Yan · Mon May 15 17:49:56 2017 +0800
  39. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  40. 10b594b rockchip: clk: rk3399: allow requests for HDMI clocks by Philipp Tomsich · Fri Apr 28 18:33:57 2017 +0200
  41. d10b45e rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS by Philipp Tomsich · Fri Apr 28 17:11:55 2017 +0200
  42. 78a7314 rockchip: clk: rk3399: adapt MMC clk configuration to the updated RK3399 DTS by Philipp Tomsich · Tue Apr 25 09:52:06 2017 +0200
  43. 30d7c15 rockchip: clk: rk3399: fix off-by one during rate calculation in i2c/spi_set_rate by Philipp Tomsich · Thu Apr 20 22:05:50 2017 +0200
  44. c31ee92 rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5 by Philipp Tomsich · Thu Apr 20 22:05:49 2017 +0200
  45. 5a02763 rockchip: clk: rk3328: add ciu_clk entry for eMMC/SDMMC by Xu Ziyuan · Sun Apr 16 17:44:46 2017 +0800
  46. 42118e4 rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIO by Xu Ziyuan · Sun Apr 16 17:44:45 2017 +0800
  47. c06ade2 rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIO by Xu Ziyuan · Sun Apr 16 17:44:44 2017 +0800
  48. 6682b9b rockchip: clk: rk3036: add ciu_clk entry for eMMC/SDIO by Xu Ziyuan · Sun Apr 16 17:44:43 2017 +0800
  49. 775bc39 rockchip: clk: rk3399: 24MHz is not a power of 2 by Philipp Tomsich · Fri Mar 24 19:35:37 2017 +0100
  50. bfa896c rockchip: clk: rk3399: add clocking support for Ethernet by Philipp Tomsich · Fri Mar 24 19:24:25 2017 +0100
  51. cf0a4ba rockchip: clk: rk3399: fix warnings for unused variables in SPL/non-SPL by Philipp Tomsich · Fri Mar 24 19:24:24 2017 +0100
  52. 4126265 rockchip: clk: rk3188: Allow configuration of the armclk by Heiko Stübner · Mon Mar 20 12:40:32 2017 +0100
  53. 1cfd550 rockchip: rk3328: add clock driver by Kever Yang · Thu Feb 23 15:37:52 2017 +0800
  54. 5616c63 rockchip: rk3188: Add clock driver by Heiko Stübner · Sat Feb 18 19:46:34 2017 +0100
  55. 643549b rockchip: clk: rk3288: limit gpll and cpll init to SPL build by Heiko Stübner · Sat Feb 18 19:46:22 2017 +0100
  56. e198053 rockchip: clk: rk3399: update driver for spl by Kever Yang · Mon Feb 13 17:38:56 2017 +0800
  57. cb1c7af rockchip: clk: Support setting ACLK by Simon Glass · Sun Nov 13 14:22:13 2016 -0700
  58. 901c2ce rockchip: rk3288: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:52 2016 -0600
  59. d1dfea7 rockchip: rk3399: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:51 2016 -0600
  60. 3814f0e rockchip: rk3036: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:50 2016 -0600
  61. 78b6c3f clk: rk3399: fix rockchip_get_cru by Jacob Chen · Tue Sep 27 15:48:45 2016 +0800
  62. 4051462 clk: rk3288: add PWM clock get rate by Kever Yang · Fri Aug 12 17:57:05 2016 +0800
  63. e54d26a clk: rk3399: add pmucru controller support by Kever Yang · Fri Aug 12 17:47:15 2016 +0800
  64. 1b7dcc3 rockchip: remove log2 reimplementation from clock drivers by Heiko Stübner · Fri Jul 22 23:51:06 2016 +0200
  65. dc850de clock: rk3399: add support for dwmmc 400K by Kever Yang · Thu Aug 04 11:44:58 2016 +0800
  66. 4776f0b move: rockchip: move clock drivers into a subdirectory by Heiko Stübner · Fri Jul 29 14:47:21 2016 +0200