commit | 42118e48a39902cdd13234b537f9a0e641ddba45 | [log] [tgz] |
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author | Xu Ziyuan <xzy.xu@rock-chips.com> | Sun Apr 16 17:44:45 2017 +0800 |
committer | Simon Glass <sjg@chromium.org> | Wed May 10 13:37:21 2017 -0600 |
tree | a15ed5eb95cc2d7b5eb64889e5432d0bd0e46743 | |
parent | c06ade251db791ce906eda42a827816812ba4c2a [diff] |
rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIO The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>