blob: 436cab3109bb3be56fbc91baccc4399ccc698e2a [file] [log] [blame]
Ryan Harkin25cff832014-01-13 12:37:03 +00001#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06002# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
Ryan Harkin25cff832014-01-13 12:37:03 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Ryan Harkin25cff832014-01-13 12:37:03 +00005#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Soby Mathewb6f3b1f2016-04-07 17:40:04 +01009# Use the GICv3 driver on the FVP by default
10FVP_USE_GIC_DRIVER := FVP_GICV3
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000011
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000012# Default cluster count for FVP
13FVP_CLUSTER_COUNT := 2
14
Jeenu Viswambharan75421132018-01-31 14:52:08 +000015# Default number of CPUs per cluster on FVP
16FVP_MAX_CPUS_PER_CLUSTER := 4
17
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000018# Default number of threads per CPU on FVP
19FVP_MAX_PE_PER_CPU := 1
20
Manish V Badarkheb24c6372021-01-24 03:26:50 +000021# Disable redistributor frame of inactive/fused CPU cores by marking it as read
22# only; enable redistributor frames of all CPU cores by default.
23FVP_GICR_REGION_PROTECTION := 0
24
Soby Mathew5f6412a2018-02-08 11:39:38 +000025FVP_DT_PREFIX := fvp-base-gicv3-psci
26
Chris Kay91dd2532023-06-05 17:22:54 +010027# Size (in kilobytes) of the Trusted SRAM region to utilize when building for
28# the FVP platform. This option defaults to 256.
29FVP_TRUSTED_SRAM_SIZE := 256
30
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010031# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
32# progbits limit. We need a way to build all useful configurations while waiting
33# on the fvp to increase its SRAM size. The problem is twofild:
34# 1. the cleanup that introduced these enables cleaned up tf-a a little too
35# well and things that previously (incorrectly) were enabled, no longer are.
36# A bunch of CI configs build subtly incorrectly and this combo makes it
37# necessary to forcefully and unconditionally enable them here.
38# 2. the progbits limit is exceeded only when the tsp is involved. However,
39# there are tsp CI configs that run on very high architecture revisions so
40# disabling everything isn't an option.
41# The fix is to enable everything, as before. When the tsp is included, though,
42# we need to slim the size down. In that case, disable all optional features,
43# that will not be present in CI when the tsp is.
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010044# Similarly, DRTM support is only tested on v8.0 models. Disable everything just
45# for it.
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010046# TODO: make all of this unconditional (or only base the condition on
47# ARM_ARCH_* when the makefile supports it).
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010048ifneq (${DRTM_SUPPORT}, 1)
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010049ifneq (${SPD}, tspd)
50 ENABLE_FEAT_AMU := 2
51 ENABLE_FEAT_AMUv1p1 := 2
52 ENABLE_FEAT_HCX := 2
53 ENABLE_MPAM_FOR_LOWER_ELS := 2
54 ENABLE_FEAT_RNG := 2
55 ENABLE_FEAT_TWED := 2
Mark Brown326f2952023-03-14 21:33:04 +000056 ENABLE_FEAT_GCS := 2
Andre Przywara870627e2023-01-27 12:25:49 +000057 ENABLE_FEAT_RAS := 2
Jayanth Dodderi Chidanandc8395cf2023-04-28 15:14:27 +010058ifeq (${ARCH}, aarch64)
59ifneq (${SPD}, spmd)
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010060ifeq (${SPM_MM}, 0)
61ifeq (${ENABLE_RME}, 0)
62ifeq (${CTX_INCLUDE_FPREGS}, 0)
63 ENABLE_SME_FOR_NS := 2
Jayanth Dodderi Chidanandcfe053a2022-11-08 10:31:07 +000064 ENABLE_SME2_FOR_NS := 2
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010065endif
66endif
67endif
68endif
69endif
Jayanth Dodderi Chidanandc8395cf2023-04-28 15:14:27 +010070endif
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010071
72# enable unconditionally for all builds
73ifeq (${ARCH}, aarch64)
74ifeq (${ENABLE_RME},0)
75 ENABLE_BRBE_FOR_NS := 2
76endif
77endif
78ENABLE_TRBE_FOR_NS := 2
79ENABLE_SYS_REG_TRACE_FOR_NS := 2
80ENABLE_FEAT_CSV2_2 := 2
Andre Przywara1f55c412023-01-26 16:47:52 +000081ENABLE_FEAT_DIT := 2
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010082ENABLE_FEAT_PAN := 2
83ENABLE_FEAT_VHE := 2
84CTX_INCLUDE_NEVE_REGS := 2
85ENABLE_FEAT_SEL2 := 2
86ENABLE_TRF_FOR_NS := 2
87ENABLE_FEAT_ECV := 2
88ENABLE_FEAT_FGT := 2
89ENABLE_FEAT_TCR2 := 2
Mark Brown293a6612023-03-14 20:48:43 +000090ENABLE_FEAT_S2PIE := 2
91ENABLE_FEAT_S1PIE := 2
92ENABLE_FEAT_S2POE := 2
93ENABLE_FEAT_S1POE := 2
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010094endif
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010095
Achin Gupta1fa7eb62015-11-03 14:18:34 +000096# The FVP platform depends on this macro to build with correct GIC driver.
97$(eval $(call add_define,FVP_USE_GIC_DRIVER))
98
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000099# Pass FVP_CLUSTER_COUNT to the build system.
Soby Mathew47e43f22016-02-01 14:04:34 +0000100$(eval $(call add_define,FVP_CLUSTER_COUNT))
Soby Mathew7356b1e2016-03-24 10:12:42 +0000101
Jeenu Viswambharan75421132018-01-31 14:52:08 +0000102# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
103$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
104
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +0000105# Pass FVP_MAX_PE_PER_CPU to the build system.
106$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
107
Manish V Badarkheb24c6372021-01-24 03:26:50 +0000108# Pass FVP_GICR_REGION_PROTECTION to the build system.
109$(eval $(call add_define,FVP_GICR_REGION_PROTECTION))
110
Chris Kay91dd2532023-06-05 17:22:54 +0100111# Pass FVP_TRUSTED_SRAM_SIZE to the build system.
112$(eval $(call add_define,FVP_TRUSTED_SRAM_SIZE))
113
Soby Mathew7356b1e2016-03-24 10:12:42 +0000114# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
115# choose the CCI driver , else the CCN driver
116ifeq ($(FVP_CLUSTER_COUNT), 0)
117$(error "Incorrect cluster count specified for FVP port")
118else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
119FVP_INTERCONNECT_DRIVER := FVP_CCI
120else
121FVP_INTERCONNECT_DRIVER := FVP_CCN
Soby Mathew47e43f22016-02-01 14:04:34 +0000122endif
123
Soby Mathew7356b1e2016-03-24 10:12:42 +0000124$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
125
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000126# Choose the GIC sources depending upon the how the FVP will be invoked
Andre Przywarae1cc1302020-03-25 15:50:38 +0000127ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000128
Andre Przywarae1cc1302020-03-25 15:50:38 +0000129# The GIC model (GIC-600 or GIC-500) will be detected at runtime
130GICV3_SUPPORT_GIC600 := 1
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000131GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
132
133# Include GICv3 driver files
134include drivers/arm/gic/v3/gicv3.mk
135
136FVP_GIC_SOURCES := ${GICV3_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000137 plat/common/plat_gicv3.c \
138 plat/arm/common/arm_gicv3.c
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000139
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600140 ifeq ($(filter 1,${RESET_TO_BL2} \
141 ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
laurenw-armdc5e9a22020-05-12 10:58:11 -0500142 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c
143 endif
144
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000145else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
Alexei Fedorovfc4f80e2020-04-07 11:48:00 +0100146
147# No GICv4 extension
148GIC_ENABLE_V4_EXTN := 0
149$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
150
Alexei Fedorovcaa18022020-07-14 10:47:25 +0100151# Include GICv2 driver files
152include drivers/arm/gic/v2/gicv2.mk
Alexei Fedorovfc4f80e2020-04-07 11:48:00 +0100153
Alexei Fedorovcaa18022020-07-14 10:47:25 +0100154FVP_GIC_SOURCES := ${GICV2_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000155 plat/common/plat_gicv2.c \
156 plat/arm/common/arm_gicv2.c
Soby Mathew5f6412a2018-02-08 11:39:38 +0000157
158FVP_DT_PREFIX := fvp-base-gicv2-psci
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000159else
160$(error "Incorrect GIC driver chosen on FVP port")
161endif
162
Soby Mathew7356b1e2016-03-24 10:12:42 +0000163ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100164FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
Soby Mathew7356b1e2016-03-24 10:12:42 +0000165else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
166FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
167 plat/arm/common/arm_ccn.c
168else
169$(error "Incorrect CCN driver chosen on FVP port")
170endif
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000171
Soby Mathew9c708b52016-02-26 14:23:19 +0000172FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000173 plat/arm/board/fvp/fvp_security.c \
174 plat/arm/common/arm_tzc400.c
175
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000176
Manish V Badarkhe7ac59582023-03-24 08:22:33 +0000177PLAT_INCLUDES := -Iplat/arm/board/fvp/include \
178 -Iinclude/lib/psa
Sandrine Bailleuxe701e302014-05-20 17:28:25 +0100179
Ryan Harkin25cff832014-01-13 12:37:03 +0000180
Soby Mathewcc037c12016-04-08 16:42:58 +0100181PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
Ryan Harkin25cff832014-01-13 12:37:03 +0000182
Soby Mathew0d268dc2016-07-11 14:13:56 +0100183FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
184
185ifeq (${ARCH}, aarch64)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000186
John Tsichritzis7557c662019-06-03 13:54:30 +0100187# select a different set of CPU files, depending on whether we compile for
188# hardware assisted coherency cores or not
John Tsichritzisfe6df392019-03-19 17:20:52 +0000189ifeq (${HW_ASSISTED_COHERENCY}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100190# Cores used without DSU
John Tsichritzisfe6df392019-03-19 17:20:52 +0000191 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
Soby Mathewc704cbc2014-08-14 11:33:56 +0100192 lib/cpus/aarch64/cortex_a53.S \
193 lib/cpus/aarch64/cortex_a57.S \
Yatharth Kochar63af6872016-02-09 12:00:03 +0000194 lib/cpus/aarch64/cortex_a72.S \
John Tsichritzisfe6df392019-03-19 17:20:52 +0000195 lib/cpus/aarch64/cortex_a73.S
196else
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100197# Cores used with DSU only
John Tsichritzis7557c662019-06-03 13:54:30 +0100198 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100199 # AArch64-only cores
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100200 # TODO: add all cores to the appropriate lists
201 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a65.S \
202 lib/cpus/aarch64/cortex_a65ae.S \
203 lib/cpus/aarch64/cortex_a76.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100204 lib/cpus/aarch64/cortex_a76ae.S \
Balint Dobszaycc942642019-07-03 13:02:56 +0200205 lib/cpus/aarch64/cortex_a77.S \
Jimmy Brisson7ec175e2020-06-01 16:49:34 -0500206 lib/cpus/aarch64/cortex_a78.S \
Juan Pablo Condef4a70f22023-05-24 22:08:28 -0500207 lib/cpus/aarch64/cortex_a78_ae.S \
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100208 lib/cpus/aarch64/cortex_a78c.S \
209 lib/cpus/aarch64/cortex_a710.S \
Javier Almansa Sobrino9faad3c2020-10-23 13:22:07 +0100210 lib/cpus/aarch64/neoverse_n_common.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100211 lib/cpus/aarch64/neoverse_n1.S \
Javier Almansa Sobrino9faad3c2020-10-23 13:22:07 +0100212 lib/cpus/aarch64/neoverse_n2.S \
Jimmy Brisson958a0b12020-09-30 15:28:03 -0500213 lib/cpus/aarch64/neoverse_v1.S \
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100214 lib/cpus/aarch64/neoverse_e1.S \
215 lib/cpus/aarch64/cortex_x2.S
John Tsichritzis7557c662019-06-03 13:54:30 +0100216 endif
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100217 # AArch64/AArch32 cores
218 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
219 lib/cpus/aarch64/cortex_a75.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000220endif
John Tsichritzis6deaf9c2018-10-08 17:09:43 +0100221
Yatharth Kochara4c219a2016-07-12 15:47:03 +0100222else
Boyan Karatotevf3581342023-01-27 10:58:42 +0000223FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S \
224 lib/cpus/aarch32/cortex_a57.S
Soby Mathew0d268dc2016-07-11 14:13:56 +0100225endif
Sandrine Bailleuxdd505792016-01-13 09:04:26 +0000226
Alexei Fedorov896799a2019-05-09 12:14:40 +0100227BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
228 drivers/arm/sp805/sp805.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100229 drivers/delay_timer/delay_timer.c \
Aditya Angadi20b48412019-04-16 11:29:14 +0530230 drivers/io/io_semihosting.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000231 lib/semihosting/semihosting.c \
Yatharth Kochar88ac53b2016-07-04 11:03:49 +0100232 lib/semihosting/${ARCH}/semihosting_call.S \
233 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100234 plat/arm/board/fvp/fvp_bl1_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100235 plat/arm/board/fvp/fvp_err.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000236 plat/arm/board/fvp/fvp_io_storage.c \
237 ${FVP_CPU_LIBS} \
238 ${FVP_INTERCONNECT_SOURCES}
239
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500240ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100241BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
242else
243BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
244endif
245
Ryan Harkin25cff832014-01-13 12:37:03 +0000246
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100247BL2_SOURCES += drivers/arm/sp805/sp805.c \
248 drivers/io/io_semihosting.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100249 lib/utils/mem_region.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000250 lib/semihosting/semihosting.c \
Yatharth Kochara5f77d32016-07-04 11:26:14 +0100251 lib/semihosting/${ARCH}/semihosting_call.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100252 plat/arm/board/fvp/fvp_bl2_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100253 plat/arm/board/fvp/fvp_err.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100254 plat/arm/board/fvp/fvp_io_storage.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100255 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000256 ${FVP_SECURITY_SOURCES}
Ryan Harkin25cff832014-01-13 12:37:03 +0000257
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100258
Manish V Badarkhe09a192c2020-08-23 09:58:44 +0100259ifeq (${COT_DESC_IN_DTB},1)
260BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c
261endif
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100262
Zelalem Aweke96c0bab2021-07-11 18:39:39 -0500263ifeq (${ENABLE_RME},1)
264BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000265
Soby Mathewf05d93a2022-03-22 16:21:19 +0000266BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \
267 plat/arm/board/fvp/fvp_realm_attest_key.c
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000268
269# FVP platform does not support RSS, but it can leverage RSS APIs to
270# provide hardcoded token/key on request.
271BL31_SOURCES += lib/psa/delegated_attestation.c
272
Zelalem Aweke96c0bab2021-07-11 18:39:39 -0500273endif
274
Andre Przywarabdc76f12022-11-21 17:07:25 +0000275ifeq (${ENABLE_FEAT_RNG_TRAP},1)
276BL31_SOURCES += plat/arm/board/fvp/fvp_sync_traps.c
277endif
278
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600279ifeq (${RESET_TO_BL2},1)
Roberto Vargas52207802017-11-17 13:22:18 +0000280BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
281 plat/arm/board/fvp/fvp_bl2_el3_setup.c \
282 ${FVP_CPU_LIBS} \
283 ${FVP_INTERCONNECT_SOURCES}
284endif
285
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500286ifeq (${USE_SP804_TIMER},1)
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100287BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100288endif
289
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100290BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000291 ${FVP_SECURITY_SOURCES}
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100292
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500293ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100294BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
295endif
296
Antonio Nino Diazf13d09a2019-01-23 21:50:09 +0000297BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
298 drivers/arm/smmu/smmu_v3.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100299 drivers/delay_timer/delay_timer.c \
Antonio Nino Diazd7da2f82018-10-10 11:14:44 +0100300 drivers/cfi/v2m/v2m_flash.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100301 lib/utils/mem_region.c \
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100302 plat/arm/board/fvp/fvp_bl31_setup.c \
Madhukar Pappireddyd0cf0a92020-04-16 17:54:25 -0500303 plat/arm/board/fvp/fvp_console.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100304 plat/arm/board/fvp/fvp_pm.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100305 plat/arm/board/fvp/fvp_topology.c \
306 plat/arm/board/fvp/aarch64/fvp_helpers.S \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100307 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000308 ${FVP_CPU_LIBS} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000309 ${FVP_GIC_SOURCES} \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000310 ${FVP_INTERCONNECT_SOURCES} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000311 ${FVP_SECURITY_SOURCES}
Juan Castillo5e29c752015-01-07 10:39:25 +0000312
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600313# Support for fconf in BL31
314# Added separately from the above list for better readability
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600315ifeq ($(filter 1,${RESET_TO_BL2} ${RESET_TO_BL31}),)
Chris Kaye9272152021-09-28 15:52:14 +0100316BL31_SOURCES += lib/fconf/fconf.c \
Manish V Badarkhe8717e032020-05-30 17:40:44 +0100317 lib/fconf/fconf_dyn_cfg_getter.c \
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600318 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500319
Chris Kaye9272152021-09-28 15:52:14 +0100320BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
321
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500322ifeq (${SEC_INT_DESC_IN_FCONF},1)
323BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c
324endif
325
Madhukar Pappireddyaa1121f2020-03-13 13:00:17 -0500326endif
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600327
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500328ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100329BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
330else
331BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
332endif
333
Soby Mathewa684e582018-02-27 11:17:14 +0000334# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
335ifdef UNIX_MK
Soby Mathew5f6412a2018-02-08 11:39:38 +0000336FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
Soby Mathewb6814842018-04-04 09:40:32 +0100337FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000338 ${PLAT}_fw_config.dts \
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100339 ${PLAT}_tb_fw_config.dts \
Soby Mathewb6814842018-04-04 09:40:32 +0100340 ${PLAT}_soc_fw_config.dts \
341 ${PLAT}_nt_fw_config.dts \
342 )
343
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100344FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
345FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Soby Mathewb6814842018-04-04 09:40:32 +0100346FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
347FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
348
349ifeq (${SPD},tspd)
350FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
351FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
352
353# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100354$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100355endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000356
Achin Guptada6ef0e2019-10-11 14:54:48 +0100357ifeq (${SPD},spmd)
Olivier Deprezbcaa0682020-04-01 21:28:26 +0200358
359ifeq ($(ARM_SPMC_MANIFEST_DTS),)
360ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
361endif
362
363FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
364FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
Achin Guptada6ef0e2019-10-11 14:54:48 +0100365
366# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100367$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
Achin Guptada6ef0e2019-10-11 14:54:48 +0100368endif
369
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100370# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100371$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG}))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000372# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100373$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100374# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100375$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100376# Add the NT_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100377$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000378
379FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
380$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
381
382# Add the HW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100383$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG}))
Soby Mathewa684e582018-02-27 11:17:14 +0000384endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000385
Dimitris Papastamos756b8dc2018-05-31 14:10:06 +0100386# Enable dynamic mitigation support by default
387DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
388
Andre Przywara0b7f1b02023-03-21 13:53:19 +0000389ifneq (${ENABLE_FEAT_AMU},0)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000390BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +0000391 lib/cpus/aarch64/cpuamu_helpers.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000392
393ifeq (${HW_ASSISTED_COHERENCY}, 1)
394BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
395 lib/cpus/aarch64/neoverse_n1_pubsub.c
396endif
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000397endif
398
Manish Pandeyd419e222023-02-13 12:39:17 +0000399ifeq (${RAS_FFH_SUPPORT},1)
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100400BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
401endif
402
Douglas Raillard306593d2017-02-24 18:14:15 +0000403ifneq (${ENABLE_STACK_PROTECTOR},0)
404PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
405endif
406
dp-armcdd03cb2017-02-15 11:07:55 +0000407ifeq (${ARCH},aarch32)
408 NEED_BL32 := yes
409endif
410
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000411# Enable the dynamic translation tables library.
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600412ifeq ($(filter 1,${RESET_TO_BL2} ${ARM_XLAT_TABLES_LIB_V1}),)
Manish V Badarkhe86854e72022-03-15 16:05:58 +0000413 ifeq (${ARCH},aarch32)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900414 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Manish V Badarkhe86854e72022-03-15 16:05:58 +0000415 else # AArch64
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900416 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz60ef6752019-02-12 13:32:03 +0000417 endif
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000418endif
419
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000420ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
421 ifeq (${ARCH},aarch32)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900422 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000423 else # AArch64
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900424 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000425 ifeq (${SPD},tspd)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900426 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000427 endif
428 endif
429endif
430
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100431ifeq (${USE_DEBUGFS},1)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900432 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100433endif
434
Soby Mathew3b5156e2017-10-05 12:27:33 +0100435# Add support for platform supplied linker script for BL31 build
436$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
437
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600438ifneq (${RESET_TO_BL2}, 0)
Roberto Vargas9f412482018-01-16 10:35:23 +0000439 override BL1_SOURCES =
440endif
441
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000442# RSS is not supported on FVP right now. Thus, we use the mocked version
443# of the provided PSA APIs. They return with success and hard-coded token/key.
444PLAT_RSS_NOT_SUPPORTED := 1
445
Tamas Banb0f83252022-02-11 09:49:36 +0100446# Include Measured Boot makefile before any Crypto library makefile.
447# Crypto library makefile may need default definitions of Measured Boot build
448# flags present in Measured Boot makefile.
449ifeq (${MEASURED_BOOT},1)
450 RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
451 $(info Including ${RSS_MEASURED_BOOT_MK})
452 include ${RSS_MEASURED_BOOT_MK}
453
laurenw-arm7834aa02022-05-31 16:39:09 -0500454 ifneq (${MBOOT_RSS_HASH_ALG}, sha256)
455 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
456 endif
457
Tamas Banb0f83252022-02-11 09:49:36 +0100458 BL1_SOURCES += ${MEASURED_BOOT_SOURCES}
459 BL2_SOURCES += ${MEASURED_BOOT_SOURCES}
460endif
461
Juan Castillo31a68f02015-04-14 12:49:03 +0100462include plat/arm/board/common/board_common.mk
Dan Handley2b6b5742015-03-19 19:17:53 +0000463include plat/arm/common/arm_common.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100464
Alexei Fedorov61369a22020-07-13 14:59:02 +0100465ifeq (${MEASURED_BOOT},1)
Manish V Badarkhea74d9632021-09-14 23:12:42 +0100466BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
Tamas Banb0f83252022-02-11 09:49:36 +0100467 plat/arm/board/fvp/fvp_bl1_measured_boot.c \
468 lib/psa/measured_boot.c
469
Manish V Badarkhea74d9632021-09-14 23:12:42 +0100470BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
Tamas Banb0f83252022-02-11 09:49:36 +0100471 plat/arm/board/fvp/fvp_bl2_measured_boot.c \
472 lib/psa/measured_boot.c
473
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200474# Even though RSS is not supported on FVP (see above), we support overriding
475# PLAT_RSS_NOT_SUPPORTED from the command line, just for the purpose of building
476# the code to detect any build regressions. The resulting firmware will not be
477# functional.
478ifneq (${PLAT_RSS_NOT_SUPPORTED},1)
479 $(warning "RSS is not supported on FVP. The firmware will not be functional.")
480 include drivers/arm/rss/rss_comms.mk
481 BL1_SOURCES += ${RSS_COMMS_SOURCES}
482 BL2_SOURCES += ${RSS_COMMS_SOURCES}
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000483 BL31_SOURCES += ${RSS_COMMS_SOURCES}
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200484
Tamas Ban9cc87142022-10-05 11:56:04 +0200485 BL1_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
486 BL2_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
Sandrine Bailleuxb204fe92022-10-12 14:46:56 +0200487 BL31_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200488endif
489
Alexei Fedorov61369a22020-07-13 14:59:02 +0100490endif
491
Lucian Paul-Trifu5ee4f4e2022-06-22 18:45:30 +0100492ifeq (${DRTM_SUPPORT}, 1)
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100493BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \
494 plat/arm/board/fvp/fvp_drtm_dma_prot.c \
495 plat/arm/board/fvp/fvp_drtm_err.c \
johpow01baa3e6c2022-03-11 17:50:58 -0600496 plat/arm/board/fvp/fvp_drtm_measurement.c \
497 plat/arm/board/fvp/fvp_drtm_stub.c \
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100498 plat/arm/common/arm_dyn_cfg.c \
499 plat/arm/board/fvp/fvp_err.c
Lucian Paul-Trifu5ee4f4e2022-06-22 18:45:30 +0100500endif
501
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000502ifeq (${TRUSTED_BOARD_BOOT}, 1)
503BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
504BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
505
Soby Mathew45e39e22018-03-26 15:16:46 +0100506# FVP being a development platform, enable capability to disable Authentication
Antonio Nino Diaz05f49572018-09-25 11:37:23 +0100507# dynamically if TRUSTED_BOARD_BOOT is set.
Max Shvetsov06dba292019-12-06 11:50:12 +0000508DYN_DISABLE_AUTH := 1
Soby Mathew45e39e22018-03-26 15:16:46 +0100509endif
Manish V Badarkhe2d49ef32021-08-24 14:42:35 +0100510
Marc Bonnicic66fc1b2021-12-16 18:31:02 +0000511ifeq (${SPMC_AT_EL3}, 1)
512PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c
513endif
Wing Li05364b92023-01-26 18:33:43 -0800514
515PSCI_OS_INIT_MODE := 1
Manish Pandey03d87492023-04-24 10:46:21 +0100516
Manish Pandeyc25ab022023-04-24 14:58:55 +0100517ifeq (${SPD},spmd)
518BL31_SOURCES += plat/arm/board/fvp/fvp_spmd.c
519endif
520
521# Test specific macros, keep them at bottom of this file
Manish Pandey03d87492023-04-24 10:46:21 +0100522$(eval $(call add_define,PLATFORM_TEST_EA_FFH))
523ifeq (${PLATFORM_TEST_EA_FFH}, 1)
524 ifeq (${HANDLE_EA_EL3_FIRST_NS}, 0)
525 $(error "PLATFORM_TEST_EA_FFH expects HANDLE_EA_EL3_FIRST_NS to be 1")
526 endif
527BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ea.c
528endif
Madhukar Pappireddy042043b2023-03-02 16:33:25 -0600529
Manish Pandeyc25ab022023-04-24 14:58:55 +0100530$(eval $(call add_define,PLATFORM_TEST_RAS_FFH))
531ifeq (${PLATFORM_TEST_RAS_FFH}, 1)
532 ifeq (${RAS_EXTENSION}, 0)
533 $(error "PLATFORM_TEST_RAS_FFH expects RAS_EXTENSION to be 1")
534 endif
Madhukar Pappireddy042043b2023-03-02 16:33:25 -0600535endif
Sona Mathewd28f8552023-03-14 17:58:13 -0500536
537ifeq (${ERRATA_ABI_SUPPORT}, 1)
538include plat/arm/board/fvp/fvp_cpu_errata.mk
539endif