blob: fc644302de5233bc38f4178e948e8bd1aabbfbf1 [file] [log] [blame]
Ryan Harkin25cff832014-01-13 12:37:03 +00001#
Ambroise Vincentb7a14972019-07-17 11:17:28 +01002# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
Ryan Harkin25cff832014-01-13 12:37:03 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Ryan Harkin25cff832014-01-13 12:37:03 +00005#
6
Soby Mathewb6f3b1f2016-04-07 17:40:04 +01007# Use the GICv3 driver on the FVP by default
8FVP_USE_GIC_DRIVER := FVP_GICV3
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +00009
Antonio Nino Diaz664adb62016-05-17 09:48:10 +010010# Use the SP804 timer instead of the generic one
11FVP_USE_SP804_TIMER := 0
12
Louis Mayencourtbadcac82019-10-24 15:18:46 +010013# Use fconf based io for FVP
14ifeq ($(BL2_AT_EL3), 0)
15USE_FCONF_BASED_IO := 1
16endif
17
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000018# Default cluster count for FVP
19FVP_CLUSTER_COUNT := 2
20
Jeenu Viswambharan75421132018-01-31 14:52:08 +000021# Default number of CPUs per cluster on FVP
22FVP_MAX_CPUS_PER_CLUSTER := 4
23
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000024# Default number of threads per CPU on FVP
25FVP_MAX_PE_PER_CPU := 1
26
Soby Mathew5f6412a2018-02-08 11:39:38 +000027FVP_DT_PREFIX := fvp-base-gicv3-psci
28
Antonio Nino Diaz664adb62016-05-17 09:48:10 +010029$(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
30$(eval $(call add_define,FVP_USE_SP804_TIMER))
Achin Gupta1fa7eb62015-11-03 14:18:34 +000031
32# The FVP platform depends on this macro to build with correct GIC driver.
33$(eval $(call add_define,FVP_USE_GIC_DRIVER))
34
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000035# Pass FVP_CLUSTER_COUNT to the build system.
Soby Mathew47e43f22016-02-01 14:04:34 +000036$(eval $(call add_define,FVP_CLUSTER_COUNT))
Soby Mathew7356b1e2016-03-24 10:12:42 +000037
Jeenu Viswambharan75421132018-01-31 14:52:08 +000038# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
39$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
40
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000041# Pass FVP_MAX_PE_PER_CPU to the build system.
42$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
43
Soby Mathew7356b1e2016-03-24 10:12:42 +000044# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
45# choose the CCI driver , else the CCN driver
46ifeq ($(FVP_CLUSTER_COUNT), 0)
47$(error "Incorrect cluster count specified for FVP port")
48else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
49FVP_INTERCONNECT_DRIVER := FVP_CCI
50else
51FVP_INTERCONNECT_DRIVER := FVP_CCN
Soby Mathew47e43f22016-02-01 14:04:34 +000052endif
53
Soby Mathew7356b1e2016-03-24 10:12:42 +000054$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
55
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000056FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \
Achin Gupta1fa7eb62015-11-03 14:18:34 +000057 drivers/arm/gic/v3/gicv3_main.c \
58 drivers/arm/gic/v3/gicv3_helpers.c \
59 plat/common/plat_gicv3.c \
60 plat/arm/common/arm_gicv3.c
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000061
62# Choose the GIC sources depending upon the how the FVP will be invoked
63ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
Soby Mathew327548c2017-07-13 15:19:51 +010064FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \
65 drivers/arm/gic/v3/gic500.c
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000066else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600)
67FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \
68 drivers/arm/gic/v3/gic600.c
Achin Gupta1fa7eb62015-11-03 14:18:34 +000069else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
70FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
71 drivers/arm/gic/v2/gicv2_main.c \
72 drivers/arm/gic/v2/gicv2_helpers.c \
73 plat/common/plat_gicv2.c \
74 plat/arm/common/arm_gicv2.c
Soby Mathew5f6412a2018-02-08 11:39:38 +000075
76FVP_DT_PREFIX := fvp-base-gicv2-psci
Achin Gupta1fa7eb62015-11-03 14:18:34 +000077else
78$(error "Incorrect GIC driver chosen on FVP port")
79endif
80
Soby Mathew7356b1e2016-03-24 10:12:42 +000081ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +010082FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
Soby Mathew7356b1e2016-03-24 10:12:42 +000083else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
84FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
85 plat/arm/common/arm_ccn.c
86else
87$(error "Incorrect CCN driver chosen on FVP port")
88endif
Vikram Kanigirifbb13012016-02-15 11:54:14 +000089
Soby Mathew9c708b52016-02-26 14:23:19 +000090FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +000091 plat/arm/board/fvp/fvp_security.c \
92 plat/arm/common/arm_tzc400.c
93
Vikram Kanigirifbb13012016-02-15 11:54:14 +000094
Juan Castillo31a68f02015-04-14 12:49:03 +010095PLAT_INCLUDES := -Iplat/arm/board/fvp/include
Sandrine Bailleuxe701e302014-05-20 17:28:25 +010096
Ryan Harkin25cff832014-01-13 12:37:03 +000097
Soby Mathewcc037c12016-04-08 16:42:58 +010098PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
Ryan Harkin25cff832014-01-13 12:37:03 +000099
Soby Mathew0d268dc2016-07-11 14:13:56 +0100100FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
101
102ifeq (${ARCH}, aarch64)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000103
John Tsichritzis7557c662019-06-03 13:54:30 +0100104# select a different set of CPU files, depending on whether we compile for
105# hardware assisted coherency cores or not
John Tsichritzisfe6df392019-03-19 17:20:52 +0000106ifeq (${HW_ASSISTED_COHERENCY}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100107# Cores used without DSU
John Tsichritzisfe6df392019-03-19 17:20:52 +0000108 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
Soby Mathewc704cbc2014-08-14 11:33:56 +0100109 lib/cpus/aarch64/cortex_a53.S \
110 lib/cpus/aarch64/cortex_a57.S \
Yatharth Kochar63af6872016-02-09 12:00:03 +0000111 lib/cpus/aarch64/cortex_a72.S \
John Tsichritzisfe6df392019-03-19 17:20:52 +0000112 lib/cpus/aarch64/cortex_a73.S
113else
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100114# Cores used with DSU only
John Tsichritzis7557c662019-06-03 13:54:30 +0100115 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100116 # AArch64-only cores
John Tsichritzis7557c662019-06-03 13:54:30 +0100117 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \
118 lib/cpus/aarch64/cortex_a76ae.S \
Balint Dobszaycc942642019-07-03 13:02:56 +0200119 lib/cpus/aarch64/cortex_a77.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100120 lib/cpus/aarch64/neoverse_n1.S \
121 lib/cpus/aarch64/neoverse_e1.S \
Louis Mayencourtf57f1082019-05-14 11:00:45 +0100122 lib/cpus/aarch64/neoverse_zeus.S \
Artsem Artsemenkafea97f72019-09-16 15:11:21 +0100123 lib/cpus/aarch64/cortex_hercules.S \
Imre Kis05e4d222019-07-18 14:30:03 +0200124 lib/cpus/aarch64/cortex_hercules_ae.S \
Jimmy Brisson2463f9d2019-12-09 14:02:22 -0600125 lib/cpus/aarch64/cortex_klein.S \
Jimmy Brissond904ac12020-01-08 13:52:51 -0600126 lib/cpus/aarch64/cortex_matterhorn.S \
Imre Kis584410e2019-07-22 14:36:30 +0200127 lib/cpus/aarch64/cortex_a65.S \
128 lib/cpus/aarch64/cortex_a65ae.S
John Tsichritzis7557c662019-06-03 13:54:30 +0100129 endif
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100130 # AArch64/AArch32 cores
131 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
132 lib/cpus/aarch64/cortex_a75.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000133endif
John Tsichritzis6deaf9c2018-10-08 17:09:43 +0100134
Yatharth Kochara4c219a2016-07-12 15:47:03 +0100135else
136FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
Soby Mathew0d268dc2016-07-11 14:13:56 +0100137endif
Sandrine Bailleuxdd505792016-01-13 09:04:26 +0000138
Alexei Fedorov896799a2019-05-09 12:14:40 +0100139BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
140 drivers/arm/sp805/sp805.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100141 drivers/delay_timer/delay_timer.c \
Aditya Angadi20b48412019-04-16 11:29:14 +0530142 drivers/io/io_semihosting.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000143 lib/semihosting/semihosting.c \
Yatharth Kochar88ac53b2016-07-04 11:03:49 +0100144 lib/semihosting/${ARCH}/semihosting_call.S \
145 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100146 plat/arm/board/fvp/fvp_bl1_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100147 plat/arm/board/fvp/fvp_err.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000148 plat/arm/board/fvp/fvp_io_storage.c \
149 ${FVP_CPU_LIBS} \
150 ${FVP_INTERCONNECT_SOURCES}
151
Alexei Fedorov7131d832019-08-16 14:15:59 +0100152ifeq (${FVP_USE_SP804_TIMER},1)
153BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
154else
155BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
156endif
157
Ryan Harkin25cff832014-01-13 12:37:03 +0000158
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100159BL2_SOURCES += drivers/arm/sp805/sp805.c \
160 drivers/io/io_semihosting.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100161 lib/utils/mem_region.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000162 lib/semihosting/semihosting.c \
Yatharth Kochara5f77d32016-07-04 11:26:14 +0100163 lib/semihosting/${ARCH}/semihosting_call.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100164 plat/arm/board/fvp/fvp_bl2_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100165 plat/arm/board/fvp/fvp_err.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100166 plat/arm/board/fvp/fvp_io_storage.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100167 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000168 ${FVP_SECURITY_SOURCES}
Ryan Harkin25cff832014-01-13 12:37:03 +0000169
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100170
171
Roberto Vargas52207802017-11-17 13:22:18 +0000172ifeq (${BL2_AT_EL3},1)
173BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
174 plat/arm/board/fvp/fvp_bl2_el3_setup.c \
175 ${FVP_CPU_LIBS} \
176 ${FVP_INTERCONNECT_SOURCES}
177endif
178
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100179ifeq (${FVP_USE_SP804_TIMER},1)
180BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100181endif
182
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100183BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000184 ${FVP_SECURITY_SOURCES}
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100185
Alexei Fedorov7131d832019-08-16 14:15:59 +0100186ifeq (${FVP_USE_SP804_TIMER},1)
187BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
188endif
189
Antonio Nino Diazf13d09a2019-01-23 21:50:09 +0000190BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
191 drivers/arm/smmu/smmu_v3.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100192 drivers/delay_timer/delay_timer.c \
Antonio Nino Diazd7da2f82018-10-10 11:14:44 +0100193 drivers/cfi/v2m/v2m_flash.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100194 lib/utils/mem_region.c \
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100195 plat/arm/board/fvp/fvp_bl31_setup.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100196 plat/arm/board/fvp/fvp_pm.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100197 plat/arm/board/fvp/fvp_topology.c \
198 plat/arm/board/fvp/aarch64/fvp_helpers.S \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100199 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000200 ${FVP_CPU_LIBS} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000201 ${FVP_GIC_SOURCES} \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000202 ${FVP_INTERCONNECT_SOURCES} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000203 ${FVP_SECURITY_SOURCES}
Juan Castillo5e29c752015-01-07 10:39:25 +0000204
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600205# Support for fconf in BL31
206# Added separately from the above list for better readability
207BL31_SOURCES += common/fdt_wrappers.c \
208 lib/fconf/fconf.c \
209 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
210
Alexei Fedorov7131d832019-08-16 14:15:59 +0100211ifeq (${FVP_USE_SP804_TIMER},1)
212BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
213else
214BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
215endif
216
Soby Mathewa684e582018-02-27 11:17:14 +0000217# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
218ifdef UNIX_MK
Soby Mathew5f6412a2018-02-08 11:39:38 +0000219FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
Soby Mathewb6814842018-04-04 09:40:32 +0100220FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000221 ${PLAT}_fw_config.dts \
Soby Mathewb6814842018-04-04 09:40:32 +0100222 ${PLAT}_soc_fw_config.dts \
223 ${PLAT}_nt_fw_config.dts \
224 )
225
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000226FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
Soby Mathewb6814842018-04-04 09:40:32 +0100227FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
228FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
229
230ifeq (${SPD},tspd)
231FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
232FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
233
234# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
235$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
236endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000237
Achin Guptada6ef0e2019-10-11 14:54:48 +0100238ifeq (${SPD},spmd)
239FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
240FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb
241
242# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
243$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
244endif
245
Soby Mathew5f6412a2018-02-08 11:39:38 +0000246# Add the TB_FW_CONFIG to FIP and specify the same to certtool
247$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config))
Soby Mathewb6814842018-04-04 09:40:32 +0100248# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
249$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config))
250# Add the NT_FW_CONFIG to FIP and specify the same to certtool
251$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000252
253FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
254$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
255
256# Add the HW_CONFIG to FIP and specify the same to certtool
257$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
Soby Mathewa684e582018-02-27 11:17:14 +0000258endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000259
Dimitris Papastamos12241b92017-11-14 13:27:41 +0000260# Enable Activity Monitor Unit extensions by default
261ENABLE_AMU := 1
262
Dimitris Papastamos756b8dc2018-05-31 14:10:06 +0100263# Enable dynamic mitigation support by default
264DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
265
Manish Pandey2207e932019-11-06 13:17:46 +0000266# Enable reclaiming of BL31 initialisation code for secondary cores
Ambroise Vincentb7a14972019-07-17 11:17:28 +0100267# stacks for FVP. However, don't enable reclaiming for clang.
Soby Mathew7823d9e2018-10-14 08:13:44 +0100268ifneq (${RESET_TO_BL31},1)
Ambroise Vincentb7a14972019-07-17 11:17:28 +0100269ifeq ($(findstring clang,$(notdir $(CC))),)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100270RECLAIM_INIT_CODE := 1
Soby Mathew7823d9e2018-10-14 08:13:44 +0100271endif
Ambroise Vincentb7a14972019-07-17 11:17:28 +0100272endif
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100273
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000274ifeq (${ENABLE_AMU},1)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000275BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +0000276 lib/cpus/aarch64/cpuamu_helpers.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000277
278ifeq (${HW_ASSISTED_COHERENCY}, 1)
279BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
280 lib/cpus/aarch64/neoverse_n1_pubsub.c
281endif
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000282endif
283
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100284ifeq (${RAS_EXTENSION},1)
285BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
286endif
287
Douglas Raillard306593d2017-02-24 18:14:15 +0000288ifneq (${ENABLE_STACK_PROTECTOR},0)
289PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
290endif
291
dp-armcdd03cb2017-02-15 11:07:55 +0000292ifeq (${ARCH},aarch32)
293 NEED_BL32 := yes
294endif
295
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000296# Enable the dynamic translation tables library.
297ifeq (${ARCH},aarch32)
298 ifeq (${RESET_TO_SP_MIN},1)
299 BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
300 endif
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000301else # AArch64
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000302 ifeq (${RESET_TO_BL31},1)
303 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
304 endif
Antonio Nino Diaz60ef6752019-02-12 13:32:03 +0000305 ifeq (${SPD},trusty)
306 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
307 endif
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000308endif
309
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000310ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
311 ifeq (${ARCH},aarch32)
312 BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
313 else # AArch64
314 BL31_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
315 ifeq (${SPD},tspd)
316 BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
317 endif
318 endif
319endif
320
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100321ifeq (${USE_DEBUGFS},1)
322 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
323endif
324
Soby Mathew3b5156e2017-10-05 12:27:33 +0100325# Add support for platform supplied linker script for BL31 build
326$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
327
Roberto Vargas9f412482018-01-16 10:35:23 +0000328ifneq (${BL2_AT_EL3}, 0)
329 override BL1_SOURCES =
330endif
331
Juan Castillo31a68f02015-04-14 12:49:03 +0100332include plat/arm/board/common/board_common.mk
Dan Handley2b6b5742015-03-19 19:17:53 +0000333include plat/arm/common/arm_common.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100334
Max Shvetsov06dba292019-12-06 11:50:12 +0000335ifeq (${TRUSTED_BOARD_BOOT}, 1)
336BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
337BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
Soby Mathew45e39e22018-03-26 15:16:46 +0100338# FVP being a development platform, enable capability to disable Authentication
Antonio Nino Diaz05f49572018-09-25 11:37:23 +0100339# dynamically if TRUSTED_BOARD_BOOT is set.
Max Shvetsov06dba292019-12-06 11:50:12 +0000340DYN_DISABLE_AUTH := 1
Soby Mathew45e39e22018-03-26 15:16:46 +0100341endif