blob: a893155227c991dfdf216853fb2faa66a2719d86 [file] [log] [blame]
Ryan Harkin25cff832014-01-13 12:37:03 +00001#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06002# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
Ryan Harkin25cff832014-01-13 12:37:03 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Ryan Harkin25cff832014-01-13 12:37:03 +00005#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Soby Mathewb6f3b1f2016-04-07 17:40:04 +01009# Use the GICv3 driver on the FVP by default
10FVP_USE_GIC_DRIVER := FVP_GICV3
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000011
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000012# Default cluster count for FVP
13FVP_CLUSTER_COUNT := 2
14
Jeenu Viswambharan75421132018-01-31 14:52:08 +000015# Default number of CPUs per cluster on FVP
16FVP_MAX_CPUS_PER_CLUSTER := 4
17
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000018# Default number of threads per CPU on FVP
19FVP_MAX_PE_PER_CPU := 1
20
Manish V Badarkheb24c6372021-01-24 03:26:50 +000021# Disable redistributor frame of inactive/fused CPU cores by marking it as read
22# only; enable redistributor frames of all CPU cores by default.
23FVP_GICR_REGION_PROTECTION := 0
24
Soby Mathew5f6412a2018-02-08 11:39:38 +000025FVP_DT_PREFIX := fvp-base-gicv3-psci
26
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010027# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
28# progbits limit. We need a way to build all useful configurations while waiting
29# on the fvp to increase its SRAM size. The problem is twofild:
30# 1. the cleanup that introduced these enables cleaned up tf-a a little too
31# well and things that previously (incorrectly) were enabled, no longer are.
32# A bunch of CI configs build subtly incorrectly and this combo makes it
33# necessary to forcefully and unconditionally enable them here.
34# 2. the progbits limit is exceeded only when the tsp is involved. However,
35# there are tsp CI configs that run on very high architecture revisions so
36# disabling everything isn't an option.
37# The fix is to enable everything, as before. When the tsp is included, though,
38# we need to slim the size down. In that case, disable all optional features,
39# that will not be present in CI when the tsp is.
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010040# Similarly, DRTM support is only tested on v8.0 models. Disable everything just
41# for it.
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010042# TODO: make all of this unconditional (or only base the condition on
43# ARM_ARCH_* when the makefile supports it).
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010044ifneq (${DRTM_SUPPORT}, 1)
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010045ifneq (${SPD}, tspd)
46 ENABLE_FEAT_AMU := 2
47 ENABLE_FEAT_AMUv1p1 := 2
48 ENABLE_FEAT_HCX := 2
49 ENABLE_MPAM_FOR_LOWER_ELS := 2
50 ENABLE_FEAT_RNG := 2
51 ENABLE_FEAT_TWED := 2
Mark Brown326f2952023-03-14 21:33:04 +000052 ENABLE_FEAT_GCS := 2
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010053ifeq (${ARCH},aarch64)
54ifeq (${SPM_MM}, 0)
55ifeq (${ENABLE_RME}, 0)
56ifeq (${CTX_INCLUDE_FPREGS}, 0)
57 ENABLE_SME_FOR_NS := 2
58endif
59endif
60endif
61endif
62endif
63
64# enable unconditionally for all builds
65ifeq (${ARCH}, aarch64)
66ifeq (${ENABLE_RME},0)
67 ENABLE_BRBE_FOR_NS := 2
68endif
69endif
70ENABLE_TRBE_FOR_NS := 2
71ENABLE_SYS_REG_TRACE_FOR_NS := 2
72ENABLE_FEAT_CSV2_2 := 2
Andre Przywara1f55c412023-01-26 16:47:52 +000073ENABLE_FEAT_DIT := 2
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010074ENABLE_FEAT_PAN := 2
75ENABLE_FEAT_VHE := 2
76CTX_INCLUDE_NEVE_REGS := 2
77ENABLE_FEAT_SEL2 := 2
78ENABLE_TRF_FOR_NS := 2
79ENABLE_FEAT_ECV := 2
80ENABLE_FEAT_FGT := 2
81ENABLE_FEAT_TCR2 := 2
Mark Brown293a6612023-03-14 20:48:43 +000082ENABLE_FEAT_S2PIE := 2
83ENABLE_FEAT_S1PIE := 2
84ENABLE_FEAT_S2POE := 2
85ENABLE_FEAT_S1POE := 2
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010086endif
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010087
Achin Gupta1fa7eb62015-11-03 14:18:34 +000088# The FVP platform depends on this macro to build with correct GIC driver.
89$(eval $(call add_define,FVP_USE_GIC_DRIVER))
90
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000091# Pass FVP_CLUSTER_COUNT to the build system.
Soby Mathew47e43f22016-02-01 14:04:34 +000092$(eval $(call add_define,FVP_CLUSTER_COUNT))
Soby Mathew7356b1e2016-03-24 10:12:42 +000093
Jeenu Viswambharan75421132018-01-31 14:52:08 +000094# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
95$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
96
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000097# Pass FVP_MAX_PE_PER_CPU to the build system.
98$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
99
Manish V Badarkheb24c6372021-01-24 03:26:50 +0000100# Pass FVP_GICR_REGION_PROTECTION to the build system.
101$(eval $(call add_define,FVP_GICR_REGION_PROTECTION))
102
Soby Mathew7356b1e2016-03-24 10:12:42 +0000103# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
104# choose the CCI driver , else the CCN driver
105ifeq ($(FVP_CLUSTER_COUNT), 0)
106$(error "Incorrect cluster count specified for FVP port")
107else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
108FVP_INTERCONNECT_DRIVER := FVP_CCI
109else
110FVP_INTERCONNECT_DRIVER := FVP_CCN
Soby Mathew47e43f22016-02-01 14:04:34 +0000111endif
112
Soby Mathew7356b1e2016-03-24 10:12:42 +0000113$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
114
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000115# Choose the GIC sources depending upon the how the FVP will be invoked
Andre Przywarae1cc1302020-03-25 15:50:38 +0000116ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000117
Andre Przywarae1cc1302020-03-25 15:50:38 +0000118# The GIC model (GIC-600 or GIC-500) will be detected at runtime
119GICV3_SUPPORT_GIC600 := 1
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000120GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
121
122# Include GICv3 driver files
123include drivers/arm/gic/v3/gicv3.mk
124
125FVP_GIC_SOURCES := ${GICV3_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000126 plat/common/plat_gicv3.c \
127 plat/arm/common/arm_gicv3.c
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000128
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600129 ifeq ($(filter 1,${RESET_TO_BL2} \
130 ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
laurenw-armdc5e9a22020-05-12 10:58:11 -0500131 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c
132 endif
133
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000134else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
Alexei Fedorovfc4f80e2020-04-07 11:48:00 +0100135
136# No GICv4 extension
137GIC_ENABLE_V4_EXTN := 0
138$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
139
Alexei Fedorovcaa18022020-07-14 10:47:25 +0100140# Include GICv2 driver files
141include drivers/arm/gic/v2/gicv2.mk
Alexei Fedorovfc4f80e2020-04-07 11:48:00 +0100142
Alexei Fedorovcaa18022020-07-14 10:47:25 +0100143FVP_GIC_SOURCES := ${GICV2_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000144 plat/common/plat_gicv2.c \
145 plat/arm/common/arm_gicv2.c
Soby Mathew5f6412a2018-02-08 11:39:38 +0000146
147FVP_DT_PREFIX := fvp-base-gicv2-psci
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000148else
149$(error "Incorrect GIC driver chosen on FVP port")
150endif
151
Soby Mathew7356b1e2016-03-24 10:12:42 +0000152ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100153FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
Soby Mathew7356b1e2016-03-24 10:12:42 +0000154else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
155FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
156 plat/arm/common/arm_ccn.c
157else
158$(error "Incorrect CCN driver chosen on FVP port")
159endif
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000160
Soby Mathew9c708b52016-02-26 14:23:19 +0000161FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000162 plat/arm/board/fvp/fvp_security.c \
163 plat/arm/common/arm_tzc400.c
164
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000165
Manish V Badarkhe7ac59582023-03-24 08:22:33 +0000166PLAT_INCLUDES := -Iplat/arm/board/fvp/include \
167 -Iinclude/lib/psa
Sandrine Bailleuxe701e302014-05-20 17:28:25 +0100168
Ryan Harkin25cff832014-01-13 12:37:03 +0000169
Soby Mathewcc037c12016-04-08 16:42:58 +0100170PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
Ryan Harkin25cff832014-01-13 12:37:03 +0000171
Soby Mathew0d268dc2016-07-11 14:13:56 +0100172FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
173
174ifeq (${ARCH}, aarch64)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000175
John Tsichritzis7557c662019-06-03 13:54:30 +0100176# select a different set of CPU files, depending on whether we compile for
177# hardware assisted coherency cores or not
John Tsichritzisfe6df392019-03-19 17:20:52 +0000178ifeq (${HW_ASSISTED_COHERENCY}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100179# Cores used without DSU
John Tsichritzisfe6df392019-03-19 17:20:52 +0000180 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
Soby Mathewc704cbc2014-08-14 11:33:56 +0100181 lib/cpus/aarch64/cortex_a53.S \
182 lib/cpus/aarch64/cortex_a57.S \
Yatharth Kochar63af6872016-02-09 12:00:03 +0000183 lib/cpus/aarch64/cortex_a72.S \
John Tsichritzisfe6df392019-03-19 17:20:52 +0000184 lib/cpus/aarch64/cortex_a73.S
185else
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100186# Cores used with DSU only
John Tsichritzis7557c662019-06-03 13:54:30 +0100187 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100188 # AArch64-only cores
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100189 # TODO: add all cores to the appropriate lists
190 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a65.S \
191 lib/cpus/aarch64/cortex_a65ae.S \
192 lib/cpus/aarch64/cortex_a76.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100193 lib/cpus/aarch64/cortex_a76ae.S \
Balint Dobszaycc942642019-07-03 13:02:56 +0200194 lib/cpus/aarch64/cortex_a77.S \
Jimmy Brisson7ec175e2020-06-01 16:49:34 -0500195 lib/cpus/aarch64/cortex_a78.S \
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100196 lib/cpus/aarch64/cortex_a78c.S \
197 lib/cpus/aarch64/cortex_a710.S \
Javier Almansa Sobrino9faad3c2020-10-23 13:22:07 +0100198 lib/cpus/aarch64/neoverse_n_common.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100199 lib/cpus/aarch64/neoverse_n1.S \
Javier Almansa Sobrino9faad3c2020-10-23 13:22:07 +0100200 lib/cpus/aarch64/neoverse_n2.S \
Jimmy Brisson958a0b12020-09-30 15:28:03 -0500201 lib/cpus/aarch64/neoverse_v1.S \
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100202 lib/cpus/aarch64/neoverse_e1.S \
203 lib/cpus/aarch64/cortex_x2.S
John Tsichritzis7557c662019-06-03 13:54:30 +0100204 endif
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100205 # AArch64/AArch32 cores
206 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
207 lib/cpus/aarch64/cortex_a75.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000208endif
John Tsichritzis6deaf9c2018-10-08 17:09:43 +0100209
Yatharth Kochara4c219a2016-07-12 15:47:03 +0100210else
Boyan Karatotevf3581342023-01-27 10:58:42 +0000211FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S \
212 lib/cpus/aarch32/cortex_a57.S
Soby Mathew0d268dc2016-07-11 14:13:56 +0100213endif
Sandrine Bailleuxdd505792016-01-13 09:04:26 +0000214
Alexei Fedorov896799a2019-05-09 12:14:40 +0100215BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
216 drivers/arm/sp805/sp805.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100217 drivers/delay_timer/delay_timer.c \
Aditya Angadi20b48412019-04-16 11:29:14 +0530218 drivers/io/io_semihosting.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000219 lib/semihosting/semihosting.c \
Yatharth Kochar88ac53b2016-07-04 11:03:49 +0100220 lib/semihosting/${ARCH}/semihosting_call.S \
221 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100222 plat/arm/board/fvp/fvp_bl1_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100223 plat/arm/board/fvp/fvp_err.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000224 plat/arm/board/fvp/fvp_io_storage.c \
225 ${FVP_CPU_LIBS} \
226 ${FVP_INTERCONNECT_SOURCES}
227
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500228ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100229BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
230else
231BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
232endif
233
Ryan Harkin25cff832014-01-13 12:37:03 +0000234
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100235BL2_SOURCES += drivers/arm/sp805/sp805.c \
236 drivers/io/io_semihosting.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100237 lib/utils/mem_region.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000238 lib/semihosting/semihosting.c \
Yatharth Kochara5f77d32016-07-04 11:26:14 +0100239 lib/semihosting/${ARCH}/semihosting_call.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100240 plat/arm/board/fvp/fvp_bl2_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100241 plat/arm/board/fvp/fvp_err.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100242 plat/arm/board/fvp/fvp_io_storage.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100243 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000244 ${FVP_SECURITY_SOURCES}
Ryan Harkin25cff832014-01-13 12:37:03 +0000245
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100246
Manish V Badarkhe09a192c2020-08-23 09:58:44 +0100247ifeq (${COT_DESC_IN_DTB},1)
248BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c
249endif
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100250
Zelalem Aweke96c0bab2021-07-11 18:39:39 -0500251ifeq (${ENABLE_RME},1)
252BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000253
Soby Mathewf05d93a2022-03-22 16:21:19 +0000254BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \
255 plat/arm/board/fvp/fvp_realm_attest_key.c
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000256
257# FVP platform does not support RSS, but it can leverage RSS APIs to
258# provide hardcoded token/key on request.
259BL31_SOURCES += lib/psa/delegated_attestation.c
260
Zelalem Aweke96c0bab2021-07-11 18:39:39 -0500261endif
262
Andre Przywarabdc76f12022-11-21 17:07:25 +0000263ifeq (${ENABLE_FEAT_RNG_TRAP},1)
264BL31_SOURCES += plat/arm/board/fvp/fvp_sync_traps.c
265endif
266
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600267ifeq (${RESET_TO_BL2},1)
Roberto Vargas52207802017-11-17 13:22:18 +0000268BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
269 plat/arm/board/fvp/fvp_bl2_el3_setup.c \
270 ${FVP_CPU_LIBS} \
271 ${FVP_INTERCONNECT_SOURCES}
272endif
273
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500274ifeq (${USE_SP804_TIMER},1)
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100275BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100276endif
277
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100278BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000279 ${FVP_SECURITY_SOURCES}
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100280
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500281ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100282BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
283endif
284
Antonio Nino Diazf13d09a2019-01-23 21:50:09 +0000285BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
286 drivers/arm/smmu/smmu_v3.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100287 drivers/delay_timer/delay_timer.c \
Antonio Nino Diazd7da2f82018-10-10 11:14:44 +0100288 drivers/cfi/v2m/v2m_flash.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100289 lib/utils/mem_region.c \
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100290 plat/arm/board/fvp/fvp_bl31_setup.c \
Madhukar Pappireddyd0cf0a92020-04-16 17:54:25 -0500291 plat/arm/board/fvp/fvp_console.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100292 plat/arm/board/fvp/fvp_pm.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100293 plat/arm/board/fvp/fvp_topology.c \
294 plat/arm/board/fvp/aarch64/fvp_helpers.S \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100295 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000296 ${FVP_CPU_LIBS} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000297 ${FVP_GIC_SOURCES} \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000298 ${FVP_INTERCONNECT_SOURCES} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000299 ${FVP_SECURITY_SOURCES}
Juan Castillo5e29c752015-01-07 10:39:25 +0000300
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600301# Support for fconf in BL31
302# Added separately from the above list for better readability
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600303ifeq ($(filter 1,${RESET_TO_BL2} ${RESET_TO_BL31}),)
Chris Kaye9272152021-09-28 15:52:14 +0100304BL31_SOURCES += lib/fconf/fconf.c \
Manish V Badarkhe8717e032020-05-30 17:40:44 +0100305 lib/fconf/fconf_dyn_cfg_getter.c \
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600306 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500307
Chris Kaye9272152021-09-28 15:52:14 +0100308BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
309
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500310ifeq (${SEC_INT_DESC_IN_FCONF},1)
311BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c
312endif
313
Madhukar Pappireddyaa1121f2020-03-13 13:00:17 -0500314endif
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600315
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500316ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100317BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
318else
319BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
320endif
321
Soby Mathewa684e582018-02-27 11:17:14 +0000322# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
323ifdef UNIX_MK
Soby Mathew5f6412a2018-02-08 11:39:38 +0000324FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
Soby Mathewb6814842018-04-04 09:40:32 +0100325FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000326 ${PLAT}_fw_config.dts \
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100327 ${PLAT}_tb_fw_config.dts \
Soby Mathewb6814842018-04-04 09:40:32 +0100328 ${PLAT}_soc_fw_config.dts \
329 ${PLAT}_nt_fw_config.dts \
330 )
331
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100332FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
333FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Soby Mathewb6814842018-04-04 09:40:32 +0100334FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
335FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
336
337ifeq (${SPD},tspd)
338FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
339FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
340
341# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100342$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100343endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000344
Achin Guptada6ef0e2019-10-11 14:54:48 +0100345ifeq (${SPD},spmd)
Olivier Deprezbcaa0682020-04-01 21:28:26 +0200346
347ifeq ($(ARM_SPMC_MANIFEST_DTS),)
348ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
349endif
350
351FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
352FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
Achin Guptada6ef0e2019-10-11 14:54:48 +0100353
354# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100355$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
Achin Guptada6ef0e2019-10-11 14:54:48 +0100356endif
357
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100358# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100359$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG}))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000360# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100361$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100362# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100363$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100364# Add the NT_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100365$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000366
367FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
368$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
369
370# Add the HW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100371$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG}))
Soby Mathewa684e582018-02-27 11:17:14 +0000372endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000373
Dimitris Papastamos756b8dc2018-05-31 14:10:06 +0100374# Enable dynamic mitigation support by default
375DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
376
Andre Przywara0b7f1b02023-03-21 13:53:19 +0000377ifneq (${ENABLE_FEAT_AMU},0)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000378BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +0000379 lib/cpus/aarch64/cpuamu_helpers.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000380
381ifeq (${HW_ASSISTED_COHERENCY}, 1)
382BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
383 lib/cpus/aarch64/neoverse_n1_pubsub.c
384endif
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000385endif
386
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100387ifeq (${RAS_EXTENSION},1)
388BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
389endif
390
Douglas Raillard306593d2017-02-24 18:14:15 +0000391ifneq (${ENABLE_STACK_PROTECTOR},0)
392PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
393endif
394
dp-armcdd03cb2017-02-15 11:07:55 +0000395ifeq (${ARCH},aarch32)
396 NEED_BL32 := yes
397endif
398
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000399# Enable the dynamic translation tables library.
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600400ifeq ($(filter 1,${RESET_TO_BL2} ${ARM_XLAT_TABLES_LIB_V1}),)
Manish V Badarkhe86854e72022-03-15 16:05:58 +0000401 ifeq (${ARCH},aarch32)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900402 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Manish V Badarkhe86854e72022-03-15 16:05:58 +0000403 else # AArch64
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900404 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz60ef6752019-02-12 13:32:03 +0000405 endif
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000406endif
407
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000408ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
409 ifeq (${ARCH},aarch32)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900410 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000411 else # AArch64
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900412 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000413 ifeq (${SPD},tspd)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900414 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000415 endif
416 endif
417endif
418
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100419ifeq (${USE_DEBUGFS},1)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900420 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100421endif
422
Soby Mathew3b5156e2017-10-05 12:27:33 +0100423# Add support for platform supplied linker script for BL31 build
424$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
425
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600426ifneq (${RESET_TO_BL2}, 0)
Roberto Vargas9f412482018-01-16 10:35:23 +0000427 override BL1_SOURCES =
428endif
429
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000430# RSS is not supported on FVP right now. Thus, we use the mocked version
431# of the provided PSA APIs. They return with success and hard-coded token/key.
432PLAT_RSS_NOT_SUPPORTED := 1
433
Tamas Banb0f83252022-02-11 09:49:36 +0100434# Include Measured Boot makefile before any Crypto library makefile.
435# Crypto library makefile may need default definitions of Measured Boot build
436# flags present in Measured Boot makefile.
437ifeq (${MEASURED_BOOT},1)
438 RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
439 $(info Including ${RSS_MEASURED_BOOT_MK})
440 include ${RSS_MEASURED_BOOT_MK}
441
laurenw-arm7834aa02022-05-31 16:39:09 -0500442 ifneq (${MBOOT_RSS_HASH_ALG}, sha256)
443 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
444 endif
445
Tamas Banb0f83252022-02-11 09:49:36 +0100446 BL1_SOURCES += ${MEASURED_BOOT_SOURCES}
447 BL2_SOURCES += ${MEASURED_BOOT_SOURCES}
448endif
449
Juan Castillo31a68f02015-04-14 12:49:03 +0100450include plat/arm/board/common/board_common.mk
Dan Handley2b6b5742015-03-19 19:17:53 +0000451include plat/arm/common/arm_common.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100452
Alexei Fedorov61369a22020-07-13 14:59:02 +0100453ifeq (${MEASURED_BOOT},1)
Manish V Badarkhea74d9632021-09-14 23:12:42 +0100454BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
Tamas Banb0f83252022-02-11 09:49:36 +0100455 plat/arm/board/fvp/fvp_bl1_measured_boot.c \
456 lib/psa/measured_boot.c
457
Manish V Badarkhea74d9632021-09-14 23:12:42 +0100458BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
Tamas Banb0f83252022-02-11 09:49:36 +0100459 plat/arm/board/fvp/fvp_bl2_measured_boot.c \
460 lib/psa/measured_boot.c
461
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200462# Even though RSS is not supported on FVP (see above), we support overriding
463# PLAT_RSS_NOT_SUPPORTED from the command line, just for the purpose of building
464# the code to detect any build regressions. The resulting firmware will not be
465# functional.
466ifneq (${PLAT_RSS_NOT_SUPPORTED},1)
467 $(warning "RSS is not supported on FVP. The firmware will not be functional.")
468 include drivers/arm/rss/rss_comms.mk
469 BL1_SOURCES += ${RSS_COMMS_SOURCES}
470 BL2_SOURCES += ${RSS_COMMS_SOURCES}
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000471 BL31_SOURCES += ${RSS_COMMS_SOURCES}
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200472
Tamas Ban9cc87142022-10-05 11:56:04 +0200473 BL1_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
474 BL2_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
Sandrine Bailleuxb204fe92022-10-12 14:46:56 +0200475 BL31_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200476endif
477
Alexei Fedorov61369a22020-07-13 14:59:02 +0100478endif
479
Lucian Paul-Trifu5ee4f4e2022-06-22 18:45:30 +0100480ifeq (${DRTM_SUPPORT}, 1)
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100481BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \
482 plat/arm/board/fvp/fvp_drtm_dma_prot.c \
483 plat/arm/board/fvp/fvp_drtm_err.c \
johpow01baa3e6c2022-03-11 17:50:58 -0600484 plat/arm/board/fvp/fvp_drtm_measurement.c \
485 plat/arm/board/fvp/fvp_drtm_stub.c \
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100486 plat/arm/common/arm_dyn_cfg.c \
487 plat/arm/board/fvp/fvp_err.c
Lucian Paul-Trifu5ee4f4e2022-06-22 18:45:30 +0100488endif
489
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000490ifeq (${TRUSTED_BOARD_BOOT}, 1)
491BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
492BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
493
Soby Mathew45e39e22018-03-26 15:16:46 +0100494# FVP being a development platform, enable capability to disable Authentication
Antonio Nino Diaz05f49572018-09-25 11:37:23 +0100495# dynamically if TRUSTED_BOARD_BOOT is set.
Max Shvetsov06dba292019-12-06 11:50:12 +0000496DYN_DISABLE_AUTH := 1
Soby Mathew45e39e22018-03-26 15:16:46 +0100497endif
Manish V Badarkhe2d49ef32021-08-24 14:42:35 +0100498
Marc Bonnicic66fc1b2021-12-16 18:31:02 +0000499ifeq (${SPMC_AT_EL3}, 1)
500PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c
501endif
Wing Li05364b92023-01-26 18:33:43 -0800502
503PSCI_OS_INIT_MODE := 1