blob: 472e3e78ce1dbdf41e4c2051c111512ee66a56c8 [file] [log] [blame]
Ryan Harkin25cff832014-01-13 12:37:03 +00001#
Ambroise Vincentb7a14972019-07-17 11:17:28 +01002# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
Ryan Harkin25cff832014-01-13 12:37:03 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Ryan Harkin25cff832014-01-13 12:37:03 +00005#
6
Soby Mathewb6f3b1f2016-04-07 17:40:04 +01007# Use the GICv3 driver on the FVP by default
8FVP_USE_GIC_DRIVER := FVP_GICV3
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +00009
Antonio Nino Diaz664adb62016-05-17 09:48:10 +010010# Use the SP804 timer instead of the generic one
11FVP_USE_SP804_TIMER := 0
12
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000013# Default cluster count for FVP
14FVP_CLUSTER_COUNT := 2
15
Jeenu Viswambharan75421132018-01-31 14:52:08 +000016# Default number of CPUs per cluster on FVP
17FVP_MAX_CPUS_PER_CLUSTER := 4
18
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000019# Default number of threads per CPU on FVP
20FVP_MAX_PE_PER_CPU := 1
21
Soby Mathew5f6412a2018-02-08 11:39:38 +000022FVP_DT_PREFIX := fvp-base-gicv3-psci
23
Antonio Nino Diaz664adb62016-05-17 09:48:10 +010024$(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
25$(eval $(call add_define,FVP_USE_SP804_TIMER))
Achin Gupta1fa7eb62015-11-03 14:18:34 +000026
27# The FVP platform depends on this macro to build with correct GIC driver.
28$(eval $(call add_define,FVP_USE_GIC_DRIVER))
29
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000030# Pass FVP_CLUSTER_COUNT to the build system.
Soby Mathew47e43f22016-02-01 14:04:34 +000031$(eval $(call add_define,FVP_CLUSTER_COUNT))
Soby Mathew7356b1e2016-03-24 10:12:42 +000032
Jeenu Viswambharan75421132018-01-31 14:52:08 +000033# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
35
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000036# Pass FVP_MAX_PE_PER_CPU to the build system.
37$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
38
Soby Mathew7356b1e2016-03-24 10:12:42 +000039# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
40# choose the CCI driver , else the CCN driver
41ifeq ($(FVP_CLUSTER_COUNT), 0)
42$(error "Incorrect cluster count specified for FVP port")
43else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
44FVP_INTERCONNECT_DRIVER := FVP_CCI
45else
46FVP_INTERCONNECT_DRIVER := FVP_CCN
Soby Mathew47e43f22016-02-01 14:04:34 +000047endif
48
Soby Mathew7356b1e2016-03-24 10:12:42 +000049$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
50
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000051# Choose the GIC sources depending upon the how the FVP will be invoked
52ifeq (${FVP_USE_GIC_DRIVER},$(filter ${FVP_USE_GIC_DRIVER},FVP_GICV3 FVP_GIC600))
53 ifeq (${FVP_USE_GIC_DRIVER}, FVP_GIC600)
54 GICV3_IMPL := GIC600
55 endif
56
57# GIC500 is the default option in case GICV3_IMPL is not set
58
59GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
60
61# Include GICv3 driver files
62include drivers/arm/gic/v3/gicv3.mk
63
64FVP_GIC_SOURCES := ${GICV3_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +000065 plat/common/plat_gicv3.c \
66 plat/arm/common/arm_gicv3.c
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000067
Achin Gupta1fa7eb62015-11-03 14:18:34 +000068else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
69FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
70 drivers/arm/gic/v2/gicv2_main.c \
71 drivers/arm/gic/v2/gicv2_helpers.c \
72 plat/common/plat_gicv2.c \
73 plat/arm/common/arm_gicv2.c
Soby Mathew5f6412a2018-02-08 11:39:38 +000074
75FVP_DT_PREFIX := fvp-base-gicv2-psci
Achin Gupta1fa7eb62015-11-03 14:18:34 +000076else
77$(error "Incorrect GIC driver chosen on FVP port")
78endif
79
Soby Mathew7356b1e2016-03-24 10:12:42 +000080ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +010081FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
Soby Mathew7356b1e2016-03-24 10:12:42 +000082else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
83FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
84 plat/arm/common/arm_ccn.c
85else
86$(error "Incorrect CCN driver chosen on FVP port")
87endif
Vikram Kanigirifbb13012016-02-15 11:54:14 +000088
Soby Mathew9c708b52016-02-26 14:23:19 +000089FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +000090 plat/arm/board/fvp/fvp_security.c \
91 plat/arm/common/arm_tzc400.c
92
Vikram Kanigirifbb13012016-02-15 11:54:14 +000093
Juan Castillo31a68f02015-04-14 12:49:03 +010094PLAT_INCLUDES := -Iplat/arm/board/fvp/include
Sandrine Bailleuxe701e302014-05-20 17:28:25 +010095
Ryan Harkin25cff832014-01-13 12:37:03 +000096
Soby Mathewcc037c12016-04-08 16:42:58 +010097PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
Ryan Harkin25cff832014-01-13 12:37:03 +000098
Soby Mathew0d268dc2016-07-11 14:13:56 +010099FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
100
101ifeq (${ARCH}, aarch64)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000102
John Tsichritzis7557c662019-06-03 13:54:30 +0100103# select a different set of CPU files, depending on whether we compile for
104# hardware assisted coherency cores or not
John Tsichritzisfe6df392019-03-19 17:20:52 +0000105ifeq (${HW_ASSISTED_COHERENCY}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100106# Cores used without DSU
John Tsichritzisfe6df392019-03-19 17:20:52 +0000107 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
Soby Mathewc704cbc2014-08-14 11:33:56 +0100108 lib/cpus/aarch64/cortex_a53.S \
109 lib/cpus/aarch64/cortex_a57.S \
Yatharth Kochar63af6872016-02-09 12:00:03 +0000110 lib/cpus/aarch64/cortex_a72.S \
John Tsichritzisfe6df392019-03-19 17:20:52 +0000111 lib/cpus/aarch64/cortex_a73.S
112else
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100113# Cores used with DSU only
John Tsichritzis7557c662019-06-03 13:54:30 +0100114 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100115 # AArch64-only cores
John Tsichritzis7557c662019-06-03 13:54:30 +0100116 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \
117 lib/cpus/aarch64/cortex_a76ae.S \
Balint Dobszaycc942642019-07-03 13:02:56 +0200118 lib/cpus/aarch64/cortex_a77.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100119 lib/cpus/aarch64/neoverse_n1.S \
120 lib/cpus/aarch64/neoverse_e1.S \
Louis Mayencourtf57f1082019-05-14 11:00:45 +0100121 lib/cpus/aarch64/neoverse_zeus.S \
Artsem Artsemenkafea97f72019-09-16 15:11:21 +0100122 lib/cpus/aarch64/cortex_hercules.S \
Imre Kis05e4d222019-07-18 14:30:03 +0200123 lib/cpus/aarch64/cortex_hercules_ae.S \
Jimmy Brisson2463f9d2019-12-09 14:02:22 -0600124 lib/cpus/aarch64/cortex_klein.S \
Jimmy Brissond904ac12020-01-08 13:52:51 -0600125 lib/cpus/aarch64/cortex_matterhorn.S \
Imre Kis584410e2019-07-22 14:36:30 +0200126 lib/cpus/aarch64/cortex_a65.S \
127 lib/cpus/aarch64/cortex_a65ae.S
John Tsichritzis7557c662019-06-03 13:54:30 +0100128 endif
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100129 # AArch64/AArch32 cores
130 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
131 lib/cpus/aarch64/cortex_a75.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000132endif
John Tsichritzis6deaf9c2018-10-08 17:09:43 +0100133
Yatharth Kochara4c219a2016-07-12 15:47:03 +0100134else
135FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
Soby Mathew0d268dc2016-07-11 14:13:56 +0100136endif
Sandrine Bailleuxdd505792016-01-13 09:04:26 +0000137
Alexei Fedorov896799a2019-05-09 12:14:40 +0100138BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
139 drivers/arm/sp805/sp805.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100140 drivers/delay_timer/delay_timer.c \
Aditya Angadi20b48412019-04-16 11:29:14 +0530141 drivers/io/io_semihosting.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000142 lib/semihosting/semihosting.c \
Yatharth Kochar88ac53b2016-07-04 11:03:49 +0100143 lib/semihosting/${ARCH}/semihosting_call.S \
144 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100145 plat/arm/board/fvp/fvp_bl1_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100146 plat/arm/board/fvp/fvp_err.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000147 plat/arm/board/fvp/fvp_io_storage.c \
148 ${FVP_CPU_LIBS} \
149 ${FVP_INTERCONNECT_SOURCES}
150
Alexei Fedorov7131d832019-08-16 14:15:59 +0100151ifeq (${FVP_USE_SP804_TIMER},1)
152BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
153else
154BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
155endif
156
Ryan Harkin25cff832014-01-13 12:37:03 +0000157
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100158BL2_SOURCES += drivers/arm/sp805/sp805.c \
159 drivers/io/io_semihosting.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100160 lib/utils/mem_region.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000161 lib/semihosting/semihosting.c \
Yatharth Kochara5f77d32016-07-04 11:26:14 +0100162 lib/semihosting/${ARCH}/semihosting_call.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100163 plat/arm/board/fvp/fvp_bl2_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100164 plat/arm/board/fvp/fvp_err.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100165 plat/arm/board/fvp/fvp_io_storage.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100166 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000167 ${FVP_SECURITY_SOURCES}
Ryan Harkin25cff832014-01-13 12:37:03 +0000168
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100169
170
Roberto Vargas52207802017-11-17 13:22:18 +0000171ifeq (${BL2_AT_EL3},1)
172BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
173 plat/arm/board/fvp/fvp_bl2_el3_setup.c \
174 ${FVP_CPU_LIBS} \
175 ${FVP_INTERCONNECT_SOURCES}
176endif
177
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100178ifeq (${FVP_USE_SP804_TIMER},1)
179BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100180endif
181
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100182BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000183 ${FVP_SECURITY_SOURCES}
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100184
Alexei Fedorov7131d832019-08-16 14:15:59 +0100185ifeq (${FVP_USE_SP804_TIMER},1)
186BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
187endif
188
Antonio Nino Diazf13d09a2019-01-23 21:50:09 +0000189BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
190 drivers/arm/smmu/smmu_v3.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100191 drivers/delay_timer/delay_timer.c \
Antonio Nino Diazd7da2f82018-10-10 11:14:44 +0100192 drivers/cfi/v2m/v2m_flash.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100193 lib/utils/mem_region.c \
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100194 plat/arm/board/fvp/fvp_bl31_setup.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100195 plat/arm/board/fvp/fvp_pm.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100196 plat/arm/board/fvp/fvp_topology.c \
197 plat/arm/board/fvp/aarch64/fvp_helpers.S \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100198 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000199 ${FVP_CPU_LIBS} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000200 ${FVP_GIC_SOURCES} \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000201 ${FVP_INTERCONNECT_SOURCES} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000202 ${FVP_SECURITY_SOURCES}
Juan Castillo5e29c752015-01-07 10:39:25 +0000203
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600204# Support for fconf in BL31
205# Added separately from the above list for better readability
Madhukar Pappireddyaa1121f2020-03-13 13:00:17 -0500206ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),)
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600207BL31_SOURCES += common/fdt_wrappers.c \
208 lib/fconf/fconf.c \
209 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
Madhukar Pappireddyaa1121f2020-03-13 13:00:17 -0500210endif
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600211
Alexei Fedorov7131d832019-08-16 14:15:59 +0100212ifeq (${FVP_USE_SP804_TIMER},1)
213BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
214else
215BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
216endif
217
Soby Mathewa684e582018-02-27 11:17:14 +0000218# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
219ifdef UNIX_MK
Soby Mathew5f6412a2018-02-08 11:39:38 +0000220FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
Soby Mathewb6814842018-04-04 09:40:32 +0100221FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000222 ${PLAT}_fw_config.dts \
Soby Mathewb6814842018-04-04 09:40:32 +0100223 ${PLAT}_soc_fw_config.dts \
224 ${PLAT}_nt_fw_config.dts \
225 )
226
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000227FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
Soby Mathewb6814842018-04-04 09:40:32 +0100228FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
229FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
230
231ifeq (${SPD},tspd)
232FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
233FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
234
235# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
236$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
237endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000238
Achin Guptada6ef0e2019-10-11 14:54:48 +0100239ifeq (${SPD},spmd)
240FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
241FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb
242
243# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
244$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
245endif
246
Soby Mathew5f6412a2018-02-08 11:39:38 +0000247# Add the TB_FW_CONFIG to FIP and specify the same to certtool
248$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config))
Soby Mathewb6814842018-04-04 09:40:32 +0100249# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
250$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config))
251# Add the NT_FW_CONFIG to FIP and specify the same to certtool
252$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000253
254FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
255$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
256
257# Add the HW_CONFIG to FIP and specify the same to certtool
258$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
Soby Mathewa684e582018-02-27 11:17:14 +0000259endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000260
Dimitris Papastamos12241b92017-11-14 13:27:41 +0000261# Enable Activity Monitor Unit extensions by default
262ENABLE_AMU := 1
263
Dimitris Papastamos756b8dc2018-05-31 14:10:06 +0100264# Enable dynamic mitigation support by default
265DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
266
Manish Pandey2207e932019-11-06 13:17:46 +0000267# Enable reclaiming of BL31 initialisation code for secondary cores
Ambroise Vincentb7a14972019-07-17 11:17:28 +0100268# stacks for FVP. However, don't enable reclaiming for clang.
Soby Mathew7823d9e2018-10-14 08:13:44 +0100269ifneq (${RESET_TO_BL31},1)
Ambroise Vincentb7a14972019-07-17 11:17:28 +0100270ifeq ($(findstring clang,$(notdir $(CC))),)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100271RECLAIM_INIT_CODE := 1
Soby Mathew7823d9e2018-10-14 08:13:44 +0100272endif
Ambroise Vincentb7a14972019-07-17 11:17:28 +0100273endif
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100274
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000275ifeq (${ENABLE_AMU},1)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000276BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +0000277 lib/cpus/aarch64/cpuamu_helpers.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000278
279ifeq (${HW_ASSISTED_COHERENCY}, 1)
280BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
281 lib/cpus/aarch64/neoverse_n1_pubsub.c
282endif
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000283endif
284
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100285ifeq (${RAS_EXTENSION},1)
286BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
287endif
288
Douglas Raillard306593d2017-02-24 18:14:15 +0000289ifneq (${ENABLE_STACK_PROTECTOR},0)
290PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
291endif
292
dp-armcdd03cb2017-02-15 11:07:55 +0000293ifeq (${ARCH},aarch32)
294 NEED_BL32 := yes
295endif
296
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000297# Enable the dynamic translation tables library.
298ifeq (${ARCH},aarch32)
299 ifeq (${RESET_TO_SP_MIN},1)
300 BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
301 endif
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000302else # AArch64
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000303 ifeq (${RESET_TO_BL31},1)
304 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
305 endif
Antonio Nino Diaz60ef6752019-02-12 13:32:03 +0000306 ifeq (${SPD},trusty)
307 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
308 endif
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000309endif
310
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000311ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
312 ifeq (${ARCH},aarch32)
313 BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
314 else # AArch64
315 BL31_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
316 ifeq (${SPD},tspd)
317 BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
318 endif
319 endif
320endif
321
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100322ifeq (${USE_DEBUGFS},1)
323 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
324endif
325
Soby Mathew3b5156e2017-10-05 12:27:33 +0100326# Add support for platform supplied linker script for BL31 build
327$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
328
Roberto Vargas9f412482018-01-16 10:35:23 +0000329ifneq (${BL2_AT_EL3}, 0)
330 override BL1_SOURCES =
331endif
332
Juan Castillo31a68f02015-04-14 12:49:03 +0100333include plat/arm/board/common/board_common.mk
Dan Handley2b6b5742015-03-19 19:17:53 +0000334include plat/arm/common/arm_common.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100335
Max Shvetsov06dba292019-12-06 11:50:12 +0000336ifeq (${TRUSTED_BOARD_BOOT}, 1)
337BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
338BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
Soby Mathew45e39e22018-03-26 15:16:46 +0100339# FVP being a development platform, enable capability to disable Authentication
Antonio Nino Diaz05f49572018-09-25 11:37:23 +0100340# dynamically if TRUSTED_BOARD_BOOT is set.
Max Shvetsov06dba292019-12-06 11:50:12 +0000341DYN_DISABLE_AUTH := 1
Soby Mathew45e39e22018-03-26 15:16:46 +0100342endif