blob: 3c02485f67ea519b030e4fb0eb8f32473673ce2e [file] [log] [blame]
Ryan Harkin25cff832014-01-13 12:37:03 +00001#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06002# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
Ryan Harkin25cff832014-01-13 12:37:03 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Ryan Harkin25cff832014-01-13 12:37:03 +00005#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Soby Mathewb6f3b1f2016-04-07 17:40:04 +01009# Use the GICv3 driver on the FVP by default
10FVP_USE_GIC_DRIVER := FVP_GICV3
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000011
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000012# Default cluster count for FVP
13FVP_CLUSTER_COUNT := 2
14
Jeenu Viswambharan75421132018-01-31 14:52:08 +000015# Default number of CPUs per cluster on FVP
16FVP_MAX_CPUS_PER_CLUSTER := 4
17
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000018# Default number of threads per CPU on FVP
19FVP_MAX_PE_PER_CPU := 1
20
Manish V Badarkheb24c6372021-01-24 03:26:50 +000021# Disable redistributor frame of inactive/fused CPU cores by marking it as read
22# only; enable redistributor frames of all CPU cores by default.
23FVP_GICR_REGION_PROTECTION := 0
24
Soby Mathew5f6412a2018-02-08 11:39:38 +000025FVP_DT_PREFIX := fvp-base-gicv3-psci
26
Chris Kay91dd2532023-06-05 17:22:54 +010027# Size (in kilobytes) of the Trusted SRAM region to utilize when building for
28# the FVP platform. This option defaults to 256.
29FVP_TRUSTED_SRAM_SIZE := 256
30
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010031# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's
32# progbits limit. We need a way to build all useful configurations while waiting
33# on the fvp to increase its SRAM size. The problem is twofild:
34# 1. the cleanup that introduced these enables cleaned up tf-a a little too
35# well and things that previously (incorrectly) were enabled, no longer are.
36# A bunch of CI configs build subtly incorrectly and this combo makes it
37# necessary to forcefully and unconditionally enable them here.
38# 2. the progbits limit is exceeded only when the tsp is involved. However,
39# there are tsp CI configs that run on very high architecture revisions so
40# disabling everything isn't an option.
41# The fix is to enable everything, as before. When the tsp is included, though,
42# we need to slim the size down. In that case, disable all optional features,
43# that will not be present in CI when the tsp is.
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010044# Similarly, DRTM support is only tested on v8.0 models. Disable everything just
45# for it.
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010046# TODO: make all of this unconditional (or only base the condition on
47# ARM_ARCH_* when the makefile supports it).
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010048ifneq (${DRTM_SUPPORT}, 1)
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010049ifneq (${SPD}, tspd)
50 ENABLE_FEAT_AMU := 2
51 ENABLE_FEAT_AMUv1p1 := 2
52 ENABLE_FEAT_HCX := 2
53 ENABLE_MPAM_FOR_LOWER_ELS := 2
54 ENABLE_FEAT_RNG := 2
55 ENABLE_FEAT_TWED := 2
Mark Brown326f2952023-03-14 21:33:04 +000056 ENABLE_FEAT_GCS := 2
Andre Przywara870627e2023-01-27 12:25:49 +000057 ENABLE_FEAT_RAS := 2
Jayanth Dodderi Chidanandc8395cf2023-04-28 15:14:27 +010058ifeq (${ARCH}, aarch64)
59ifneq (${SPD}, spmd)
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010060ifeq (${SPM_MM}, 0)
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010061ifeq (${CTX_INCLUDE_FPREGS}, 0)
62 ENABLE_SME_FOR_NS := 2
Jayanth Dodderi Chidanandcfe053a2022-11-08 10:31:07 +000063 ENABLE_SME2_FOR_NS := 2
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010064endif
65endif
66endif
67endif
68endif
69
70# enable unconditionally for all builds
71ifeq (${ARCH}, aarch64)
72ifeq (${ENABLE_RME},0)
73 ENABLE_BRBE_FOR_NS := 2
74endif
75endif
76ENABLE_TRBE_FOR_NS := 2
77ENABLE_SYS_REG_TRACE_FOR_NS := 2
78ENABLE_FEAT_CSV2_2 := 2
Andre Przywara1f55c412023-01-26 16:47:52 +000079ENABLE_FEAT_DIT := 2
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010080ENABLE_FEAT_PAN := 2
Maksims Svecovsdf4ad842023-03-24 13:05:09 +000081ENABLE_FEAT_MTE_PERM := 2
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010082ENABLE_FEAT_VHE := 2
83CTX_INCLUDE_NEVE_REGS := 2
84ENABLE_FEAT_SEL2 := 2
85ENABLE_TRF_FOR_NS := 2
86ENABLE_FEAT_ECV := 2
87ENABLE_FEAT_FGT := 2
88ENABLE_FEAT_TCR2 := 2
Mark Brown293a6612023-03-14 20:48:43 +000089ENABLE_FEAT_S2PIE := 2
90ENABLE_FEAT_S1PIE := 2
91ENABLE_FEAT_S2POE := 2
92ENABLE_FEAT_S1POE := 2
Boyan Karatotev7b7bc132023-04-04 14:48:04 +010093endif
Boyan Karatotev3e0e7892023-03-30 14:56:45 +010094
Achin Gupta1fa7eb62015-11-03 14:18:34 +000095# The FVP platform depends on this macro to build with correct GIC driver.
96$(eval $(call add_define,FVP_USE_GIC_DRIVER))
97
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000098# Pass FVP_CLUSTER_COUNT to the build system.
Soby Mathew47e43f22016-02-01 14:04:34 +000099$(eval $(call add_define,FVP_CLUSTER_COUNT))
Soby Mathew7356b1e2016-03-24 10:12:42 +0000100
Jeenu Viswambharan75421132018-01-31 14:52:08 +0000101# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
102$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
103
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +0000104# Pass FVP_MAX_PE_PER_CPU to the build system.
105$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
106
Manish V Badarkheb24c6372021-01-24 03:26:50 +0000107# Pass FVP_GICR_REGION_PROTECTION to the build system.
108$(eval $(call add_define,FVP_GICR_REGION_PROTECTION))
109
Chris Kay91dd2532023-06-05 17:22:54 +0100110# Pass FVP_TRUSTED_SRAM_SIZE to the build system.
111$(eval $(call add_define,FVP_TRUSTED_SRAM_SIZE))
112
Soby Mathew7356b1e2016-03-24 10:12:42 +0000113# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
114# choose the CCI driver , else the CCN driver
115ifeq ($(FVP_CLUSTER_COUNT), 0)
116$(error "Incorrect cluster count specified for FVP port")
117else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
118FVP_INTERCONNECT_DRIVER := FVP_CCI
119else
120FVP_INTERCONNECT_DRIVER := FVP_CCN
Soby Mathew47e43f22016-02-01 14:04:34 +0000121endif
122
Soby Mathew7356b1e2016-03-24 10:12:42 +0000123$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
124
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000125# Choose the GIC sources depending upon the how the FVP will be invoked
Andre Przywarae1cc1302020-03-25 15:50:38 +0000126ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000127
Andre Przywarae1cc1302020-03-25 15:50:38 +0000128# The GIC model (GIC-600 or GIC-500) will be detected at runtime
129GICV3_SUPPORT_GIC600 := 1
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +0000130GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
131
132# Include GICv3 driver files
133include drivers/arm/gic/v3/gicv3.mk
134
135FVP_GIC_SOURCES := ${GICV3_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000136 plat/common/plat_gicv3.c \
137 plat/arm/common/arm_gicv3.c
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +0000138
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600139 ifeq ($(filter 1,${RESET_TO_BL2} \
140 ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
laurenw-armdc5e9a22020-05-12 10:58:11 -0500141 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c
142 endif
143
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000144else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
Alexei Fedorovfc4f80e2020-04-07 11:48:00 +0100145
146# No GICv4 extension
147GIC_ENABLE_V4_EXTN := 0
148$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
149
Alexei Fedorovcaa18022020-07-14 10:47:25 +0100150# Include GICv2 driver files
151include drivers/arm/gic/v2/gicv2.mk
Alexei Fedorovfc4f80e2020-04-07 11:48:00 +0100152
Alexei Fedorovcaa18022020-07-14 10:47:25 +0100153FVP_GIC_SOURCES := ${GICV2_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000154 plat/common/plat_gicv2.c \
155 plat/arm/common/arm_gicv2.c
Soby Mathew5f6412a2018-02-08 11:39:38 +0000156
157FVP_DT_PREFIX := fvp-base-gicv2-psci
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000158else
159$(error "Incorrect GIC driver chosen on FVP port")
160endif
161
Soby Mathew7356b1e2016-03-24 10:12:42 +0000162ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100163FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
Soby Mathew7356b1e2016-03-24 10:12:42 +0000164else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
165FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
166 plat/arm/common/arm_ccn.c
167else
168$(error "Incorrect CCN driver chosen on FVP port")
169endif
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000170
Soby Mathew9c708b52016-02-26 14:23:19 +0000171FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000172 plat/arm/board/fvp/fvp_security.c \
173 plat/arm/common/arm_tzc400.c
174
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000175
Manish V Badarkhe7ac59582023-03-24 08:22:33 +0000176PLAT_INCLUDES := -Iplat/arm/board/fvp/include \
177 -Iinclude/lib/psa
Sandrine Bailleuxe701e302014-05-20 17:28:25 +0100178
Ryan Harkin25cff832014-01-13 12:37:03 +0000179
Soby Mathewcc037c12016-04-08 16:42:58 +0100180PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
Ryan Harkin25cff832014-01-13 12:37:03 +0000181
Soby Mathew0d268dc2016-07-11 14:13:56 +0100182FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
183
184ifeq (${ARCH}, aarch64)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000185
John Tsichritzis7557c662019-06-03 13:54:30 +0100186# select a different set of CPU files, depending on whether we compile for
187# hardware assisted coherency cores or not
John Tsichritzisfe6df392019-03-19 17:20:52 +0000188ifeq (${HW_ASSISTED_COHERENCY}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100189# Cores used without DSU
John Tsichritzisfe6df392019-03-19 17:20:52 +0000190 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
Soby Mathewc704cbc2014-08-14 11:33:56 +0100191 lib/cpus/aarch64/cortex_a53.S \
192 lib/cpus/aarch64/cortex_a57.S \
Yatharth Kochar63af6872016-02-09 12:00:03 +0000193 lib/cpus/aarch64/cortex_a72.S \
John Tsichritzisfe6df392019-03-19 17:20:52 +0000194 lib/cpus/aarch64/cortex_a73.S
195else
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100196# Cores used with DSU only
John Tsichritzis7557c662019-06-03 13:54:30 +0100197 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100198 # AArch64-only cores
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100199 # TODO: add all cores to the appropriate lists
200 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a65.S \
201 lib/cpus/aarch64/cortex_a65ae.S \
202 lib/cpus/aarch64/cortex_a76.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100203 lib/cpus/aarch64/cortex_a76ae.S \
Balint Dobszaycc942642019-07-03 13:02:56 +0200204 lib/cpus/aarch64/cortex_a77.S \
Jimmy Brisson7ec175e2020-06-01 16:49:34 -0500205 lib/cpus/aarch64/cortex_a78.S \
Juan Pablo Condef4a70f22023-05-24 22:08:28 -0500206 lib/cpus/aarch64/cortex_a78_ae.S \
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100207 lib/cpus/aarch64/cortex_a78c.S \
208 lib/cpus/aarch64/cortex_a710.S \
Javier Almansa Sobrino9faad3c2020-10-23 13:22:07 +0100209 lib/cpus/aarch64/neoverse_n_common.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100210 lib/cpus/aarch64/neoverse_n1.S \
Javier Almansa Sobrino9faad3c2020-10-23 13:22:07 +0100211 lib/cpus/aarch64/neoverse_n2.S \
Jimmy Brisson958a0b12020-09-30 15:28:03 -0500212 lib/cpus/aarch64/neoverse_v1.S \
Boyan Karatotevf154cbd2023-04-06 10:31:09 +0100213 lib/cpus/aarch64/neoverse_e1.S \
Juan Pablo Condec9fe7ce2023-07-05 11:57:50 -0500214 lib/cpus/aarch64/cortex_x2.S \
Juan Pablo Conde49f70662023-07-06 15:38:59 -0500215 lib/cpus/aarch64/cortex_gelas.S \
216 lib/cpus/aarch64/nevis.S
John Tsichritzis7557c662019-06-03 13:54:30 +0100217 endif
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100218 # AArch64/AArch32 cores
219 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
220 lib/cpus/aarch64/cortex_a75.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000221endif
John Tsichritzis6deaf9c2018-10-08 17:09:43 +0100222
Yatharth Kochara4c219a2016-07-12 15:47:03 +0100223else
Boyan Karatotevf3581342023-01-27 10:58:42 +0000224FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S \
Jayanth Dodderi Chidanand5d478412023-05-09 14:12:48 +0100225 lib/cpus/aarch32/cortex_a57.S \
226 lib/cpus/aarch32/cortex_a53.S
Soby Mathew0d268dc2016-07-11 14:13:56 +0100227endif
Sandrine Bailleuxdd505792016-01-13 09:04:26 +0000228
Alexei Fedorov896799a2019-05-09 12:14:40 +0100229BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
230 drivers/arm/sp805/sp805.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100231 drivers/delay_timer/delay_timer.c \
Aditya Angadi20b48412019-04-16 11:29:14 +0530232 drivers/io/io_semihosting.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000233 lib/semihosting/semihosting.c \
Yatharth Kochar88ac53b2016-07-04 11:03:49 +0100234 lib/semihosting/${ARCH}/semihosting_call.S \
235 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100236 plat/arm/board/fvp/fvp_bl1_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100237 plat/arm/board/fvp/fvp_err.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000238 plat/arm/board/fvp/fvp_io_storage.c \
239 ${FVP_CPU_LIBS} \
240 ${FVP_INTERCONNECT_SOURCES}
241
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500242ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100243BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
244else
245BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
246endif
247
Ryan Harkin25cff832014-01-13 12:37:03 +0000248
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100249BL2_SOURCES += drivers/arm/sp805/sp805.c \
250 drivers/io/io_semihosting.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100251 lib/utils/mem_region.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000252 lib/semihosting/semihosting.c \
Yatharth Kochara5f77d32016-07-04 11:26:14 +0100253 lib/semihosting/${ARCH}/semihosting_call.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100254 plat/arm/board/fvp/fvp_bl2_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100255 plat/arm/board/fvp/fvp_err.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100256 plat/arm/board/fvp/fvp_io_storage.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100257 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000258 ${FVP_SECURITY_SOURCES}
Ryan Harkin25cff832014-01-13 12:37:03 +0000259
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100260
Manish V Badarkhe09a192c2020-08-23 09:58:44 +0100261ifeq (${COT_DESC_IN_DTB},1)
262BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c
263endif
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100264
Zelalem Aweke96c0bab2021-07-11 18:39:39 -0500265ifeq (${ENABLE_RME},1)
266BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000267
Soby Mathewf05d93a2022-03-22 16:21:19 +0000268BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \
269 plat/arm/board/fvp/fvp_realm_attest_key.c
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000270
271# FVP platform does not support RSS, but it can leverage RSS APIs to
272# provide hardcoded token/key on request.
273BL31_SOURCES += lib/psa/delegated_attestation.c
274
Zelalem Aweke96c0bab2021-07-11 18:39:39 -0500275endif
276
Andre Przywarabdc76f12022-11-21 17:07:25 +0000277ifeq (${ENABLE_FEAT_RNG_TRAP},1)
278BL31_SOURCES += plat/arm/board/fvp/fvp_sync_traps.c
279endif
280
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600281ifeq (${RESET_TO_BL2},1)
Roberto Vargas52207802017-11-17 13:22:18 +0000282BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
283 plat/arm/board/fvp/fvp_bl2_el3_setup.c \
284 ${FVP_CPU_LIBS} \
285 ${FVP_INTERCONNECT_SOURCES}
286endif
287
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500288ifeq (${USE_SP804_TIMER},1)
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100289BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100290endif
291
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100292BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000293 ${FVP_SECURITY_SOURCES}
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100294
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500295ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100296BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
297endif
298
Antonio Nino Diazf13d09a2019-01-23 21:50:09 +0000299BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
300 drivers/arm/smmu/smmu_v3.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100301 drivers/delay_timer/delay_timer.c \
Antonio Nino Diazd7da2f82018-10-10 11:14:44 +0100302 drivers/cfi/v2m/v2m_flash.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100303 lib/utils/mem_region.c \
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100304 plat/arm/board/fvp/fvp_bl31_setup.c \
Madhukar Pappireddyd0cf0a92020-04-16 17:54:25 -0500305 plat/arm/board/fvp/fvp_console.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100306 plat/arm/board/fvp/fvp_pm.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100307 plat/arm/board/fvp/fvp_topology.c \
308 plat/arm/board/fvp/aarch64/fvp_helpers.S \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100309 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000310 ${FVP_CPU_LIBS} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000311 ${FVP_GIC_SOURCES} \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000312 ${FVP_INTERCONNECT_SOURCES} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000313 ${FVP_SECURITY_SOURCES}
Juan Castillo5e29c752015-01-07 10:39:25 +0000314
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600315# Support for fconf in BL31
316# Added separately from the above list for better readability
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600317ifeq ($(filter 1,${RESET_TO_BL2} ${RESET_TO_BL31}),)
Chris Kaye9272152021-09-28 15:52:14 +0100318BL31_SOURCES += lib/fconf/fconf.c \
Manish V Badarkhe8717e032020-05-30 17:40:44 +0100319 lib/fconf/fconf_dyn_cfg_getter.c \
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600320 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500321
Chris Kaye9272152021-09-28 15:52:14 +0100322BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
323
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500324ifeq (${SEC_INT_DESC_IN_FCONF},1)
325BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c
326endif
327
Madhukar Pappireddyaa1121f2020-03-13 13:00:17 -0500328endif
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600329
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500330ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100331BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
332else
333BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
334endif
335
Soby Mathewa684e582018-02-27 11:17:14 +0000336# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
337ifdef UNIX_MK
Soby Mathew5f6412a2018-02-08 11:39:38 +0000338FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
Soby Mathewb6814842018-04-04 09:40:32 +0100339FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000340 ${PLAT}_fw_config.dts \
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100341 ${PLAT}_tb_fw_config.dts \
Soby Mathewb6814842018-04-04 09:40:32 +0100342 ${PLAT}_soc_fw_config.dts \
343 ${PLAT}_nt_fw_config.dts \
344 )
345
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100346FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
347FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Soby Mathewb6814842018-04-04 09:40:32 +0100348FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
349FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
350
351ifeq (${SPD},tspd)
352FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
353FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
354
355# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100356$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100357endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000358
Achin Guptada6ef0e2019-10-11 14:54:48 +0100359ifeq (${SPD},spmd)
Olivier Deprezbcaa0682020-04-01 21:28:26 +0200360
361ifeq ($(ARM_SPMC_MANIFEST_DTS),)
362ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
363endif
364
365FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
366FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
Achin Guptada6ef0e2019-10-11 14:54:48 +0100367
368# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100369$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
Achin Guptada6ef0e2019-10-11 14:54:48 +0100370endif
371
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100372# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100373$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG}))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000374# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100375$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100376# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100377$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100378# Add the NT_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100379$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000380
381FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
382$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
383
384# Add the HW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100385$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG}))
Soby Mathewa684e582018-02-27 11:17:14 +0000386endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000387
Dimitris Papastamos756b8dc2018-05-31 14:10:06 +0100388# Enable dynamic mitigation support by default
389DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
390
Andre Przywara0b7f1b02023-03-21 13:53:19 +0000391ifneq (${ENABLE_FEAT_AMU},0)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000392BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +0000393 lib/cpus/aarch64/cpuamu_helpers.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000394
395ifeq (${HW_ASSISTED_COHERENCY}, 1)
396BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
397 lib/cpus/aarch64/neoverse_n1_pubsub.c
398endif
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000399endif
400
Manish Pandeyd419e222023-02-13 12:39:17 +0000401ifeq (${RAS_FFH_SUPPORT},1)
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100402BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
403endif
404
Douglas Raillard306593d2017-02-24 18:14:15 +0000405ifneq (${ENABLE_STACK_PROTECTOR},0)
406PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
407endif
408
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000409# Enable the dynamic translation tables library.
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600410ifeq ($(filter 1,${RESET_TO_BL2} ${ARM_XLAT_TABLES_LIB_V1}),)
Manish V Badarkhe86854e72022-03-15 16:05:58 +0000411 ifeq (${ARCH},aarch32)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900412 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Manish V Badarkhe86854e72022-03-15 16:05:58 +0000413 else # AArch64
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900414 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz60ef6752019-02-12 13:32:03 +0000415 endif
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000416endif
417
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000418ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
419 ifeq (${ARCH},aarch32)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900420 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000421 else # AArch64
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900422 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000423 ifeq (${SPD},tspd)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900424 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000425 endif
426 endif
427endif
428
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100429ifeq (${USE_DEBUGFS},1)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900430 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100431endif
432
Soby Mathew3b5156e2017-10-05 12:27:33 +0100433# Add support for platform supplied linker script for BL31 build
434$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
435
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -0600436ifneq (${RESET_TO_BL2}, 0)
Roberto Vargas9f412482018-01-16 10:35:23 +0000437 override BL1_SOURCES =
438endif
439
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000440# RSS is not supported on FVP right now. Thus, we use the mocked version
441# of the provided PSA APIs. They return with success and hard-coded token/key.
442PLAT_RSS_NOT_SUPPORTED := 1
443
Tamas Banb0f83252022-02-11 09:49:36 +0100444# Include Measured Boot makefile before any Crypto library makefile.
445# Crypto library makefile may need default definitions of Measured Boot build
446# flags present in Measured Boot makefile.
447ifeq (${MEASURED_BOOT},1)
448 RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
449 $(info Including ${RSS_MEASURED_BOOT_MK})
450 include ${RSS_MEASURED_BOOT_MK}
451
laurenw-arm7834aa02022-05-31 16:39:09 -0500452 ifneq (${MBOOT_RSS_HASH_ALG}, sha256)
453 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
454 endif
455
Tamas Banb0f83252022-02-11 09:49:36 +0100456 BL1_SOURCES += ${MEASURED_BOOT_SOURCES}
457 BL2_SOURCES += ${MEASURED_BOOT_SOURCES}
458endif
459
Juan Castillo31a68f02015-04-14 12:49:03 +0100460include plat/arm/board/common/board_common.mk
Dan Handley2b6b5742015-03-19 19:17:53 +0000461include plat/arm/common/arm_common.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100462
Alexei Fedorov61369a22020-07-13 14:59:02 +0100463ifeq (${MEASURED_BOOT},1)
Manish V Badarkhea74d9632021-09-14 23:12:42 +0100464BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
Tamas Banb0f83252022-02-11 09:49:36 +0100465 plat/arm/board/fvp/fvp_bl1_measured_boot.c \
466 lib/psa/measured_boot.c
467
Manish V Badarkhea74d9632021-09-14 23:12:42 +0100468BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
Tamas Banb0f83252022-02-11 09:49:36 +0100469 plat/arm/board/fvp/fvp_bl2_measured_boot.c \
470 lib/psa/measured_boot.c
471
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200472# Even though RSS is not supported on FVP (see above), we support overriding
473# PLAT_RSS_NOT_SUPPORTED from the command line, just for the purpose of building
474# the code to detect any build regressions. The resulting firmware will not be
475# functional.
476ifneq (${PLAT_RSS_NOT_SUPPORTED},1)
477 $(warning "RSS is not supported on FVP. The firmware will not be functional.")
478 include drivers/arm/rss/rss_comms.mk
479 BL1_SOURCES += ${RSS_COMMS_SOURCES}
480 BL2_SOURCES += ${RSS_COMMS_SOURCES}
Manish V Badarkhe37f9ac22023-03-12 21:34:44 +0000481 BL31_SOURCES += ${RSS_COMMS_SOURCES}
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200482
Tamas Ban9cc87142022-10-05 11:56:04 +0200483 BL1_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
484 BL2_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
Sandrine Bailleuxb204fe92022-10-12 14:46:56 +0200485 BL31_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200486endif
487
Alexei Fedorov61369a22020-07-13 14:59:02 +0100488endif
489
Lucian Paul-Trifu5ee4f4e2022-06-22 18:45:30 +0100490ifeq (${DRTM_SUPPORT}, 1)
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100491BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \
492 plat/arm/board/fvp/fvp_drtm_dma_prot.c \
493 plat/arm/board/fvp/fvp_drtm_err.c \
johpow01baa3e6c2022-03-11 17:50:58 -0600494 plat/arm/board/fvp/fvp_drtm_measurement.c \
495 plat/arm/board/fvp/fvp_drtm_stub.c \
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100496 plat/arm/common/arm_dyn_cfg.c \
497 plat/arm/board/fvp/fvp_err.c
Lucian Paul-Trifu5ee4f4e2022-06-22 18:45:30 +0100498endif
499
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000500ifeq (${TRUSTED_BOARD_BOOT}, 1)
501BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
502BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
503
Soby Mathew45e39e22018-03-26 15:16:46 +0100504# FVP being a development platform, enable capability to disable Authentication
Antonio Nino Diaz05f49572018-09-25 11:37:23 +0100505# dynamically if TRUSTED_BOARD_BOOT is set.
Max Shvetsov06dba292019-12-06 11:50:12 +0000506DYN_DISABLE_AUTH := 1
Soby Mathew45e39e22018-03-26 15:16:46 +0100507endif
Manish V Badarkhe2d49ef32021-08-24 14:42:35 +0100508
Marc Bonnicic66fc1b2021-12-16 18:31:02 +0000509ifeq (${SPMC_AT_EL3}, 1)
510PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c
511endif
Wing Li05364b92023-01-26 18:33:43 -0800512
513PSCI_OS_INIT_MODE := 1
Manish Pandey03d87492023-04-24 10:46:21 +0100514
Manish Pandeyc25ab022023-04-24 14:58:55 +0100515ifeq (${SPD},spmd)
516BL31_SOURCES += plat/arm/board/fvp/fvp_spmd.c
517endif
518
519# Test specific macros, keep them at bottom of this file
Manish Pandey03d87492023-04-24 10:46:21 +0100520$(eval $(call add_define,PLATFORM_TEST_EA_FFH))
521ifeq (${PLATFORM_TEST_EA_FFH}, 1)
522 ifeq (${HANDLE_EA_EL3_FIRST_NS}, 0)
523 $(error "PLATFORM_TEST_EA_FFH expects HANDLE_EA_EL3_FIRST_NS to be 1")
524 endif
525BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ea.c
526endif
Madhukar Pappireddy042043b2023-03-02 16:33:25 -0600527
Manish Pandeyc25ab022023-04-24 14:58:55 +0100528$(eval $(call add_define,PLATFORM_TEST_RAS_FFH))
529ifeq (${PLATFORM_TEST_RAS_FFH}, 1)
530 ifeq (${RAS_EXTENSION}, 0)
531 $(error "PLATFORM_TEST_RAS_FFH expects RAS_EXTENSION to be 1")
532 endif
Madhukar Pappireddy042043b2023-03-02 16:33:25 -0600533endif
Sona Mathewd28f8552023-03-14 17:58:13 -0500534
535ifeq (${ERRATA_ABI_SUPPORT}, 1)
536include plat/arm/board/fvp/fvp_cpu_errata.mk
537endif