blob: e48f98ba29437f0275d3fc4b8ddb5ccb12dd0f14 [file] [log] [blame]
Patrick Delaunay85b53972018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
Patrick Delaunay4c5821d2020-07-24 11:13:31 +02004 select SPL_BOARD_INIT
Patrick Delaunay85b53972018-03-12 10:46:10 +01005 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
Simon Glass284cb9c2021-07-10 21:14:31 -06008 select SPL_DRIVERS_MISC
Patrick Delaunay85b53972018-03-12 10:46:10 +01009 select SPL_FRAMEWORK
Simon Glass035939e2021-07-10 21:14:30 -060010 select SPL_GPIO
Patrick Delaunay85b53972018-03-12 10:46:10 +010011 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
13 select SPL_OF_CONTROL
14 select SPL_OF_TRANSLATE
15 select SPL_PINCTRL
16 select SPL_REGMAP
Ley Foon Tan9caf7122018-06-14 18:45:19 +080017 select SPL_DM_RESET
Simon Glassf4d60392021-08-08 12:20:12 -060018 select SPL_SERIAL
Patrick Delaunay85b53972018-03-12 10:46:10 +010019 select SPL_SYSCON
Simon Glass1ba1d4e2021-07-10 21:14:28 -060020 select SPL_WATCHDOG if WATCHDOG
Patrick Delaunayf8600202019-04-18 17:32:47 +020021 imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
22 imply SPL_BOOTSTAGE if BOOTSTAGE
Patrick Delaunayaa4e6852019-02-27 17:01:14 +010023 imply SPL_DISPLAY_PRINT
Patrick Delaunay85b53972018-03-12 10:46:10 +010024 imply SPL_LIBDISK_SUPPORT
Simon Glassa5820472021-08-08 12:20:14 -060025 imply SPL_SPI_LOAD if SPL_SPI
Patrick Delaunay85b53972018-03-12 10:46:10 +010026
27config SYS_SOC
28 default "stm32mp"
29
Patrick Delaunay7e517c62019-04-18 17:32:36 +020030config SYS_MALLOC_LEN
31 default 0x2000000
32
Patrick Delaunay088b6762019-04-18 17:32:37 +020033config ENV_SIZE
Patrice Chotardd83bba42019-05-07 18:40:47 +020034 default 0x2000
Patrick Delaunay088b6762019-04-18 17:32:37 +020035
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010036config STM32MP15x
37 bool "Support STMicroelectronics STM32MP15x Soc"
Patrick Delaunay196b7db2021-10-11 09:52:49 +020038 select ARCH_SUPPORT_PSCI
Patrick Delaunay1e2a9b72021-10-13 15:11:18 +020039 select BINMAN
Lokesh Vutla81b1a672018-04-26 18:21:26 +053040 select CPU_V7A
Patrick Delaunay196b7db2021-10-11 09:52:49 +020041 select CPU_V7_HAS_NONSEC
Patrick Delaunaye0207372018-04-16 10:13:24 +020042 select CPU_V7_HAS_VIRT
Patrice Chotarddf290812022-01-20 08:19:15 +010043 select OF_BOARD if TFABOOT
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020044 select OF_BOARD_SETUP
Patrick Delaunay85b53972018-03-12 10:46:10 +010045 select PINCTRL_STM32
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020046 select STM32_RCC
Patrick Delaunay85b53972018-03-12 10:46:10 +010047 select STM32_RESET
Patrick Delaunay4368e562019-07-30 19:16:25 +020048 select STM32_SERIAL
Andre Przywara7b169252018-04-12 04:24:46 +030049 select SYS_ARCH_TIMER
Patrick Delaunay59d0da12020-07-02 17:43:45 +020050 imply CMD_NVEDIT_INFO
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010051 help
52 support of STMicroelectronics SOC STM32MP15x family
53 STM32MP157, STM32MP153 or STM32MP151
54 STMicroelectronics MPU with core ARMv7
55 dual core A7 for STM32MP157/3, monocore for STM32MP151
56 target all the STMicroelectronics board with SOC STM32MP1 family
57
Patrick Delaunayba4b8b02021-07-26 11:21:34 +020058config STM32MP15x_STM32IMAGE
59 bool "Support STM32 image for generated U-Boot image"
60 depends on STM32MP15x && TFABOOT
61 help
62 Support of STM32 image generation for SOC STM32MP15x
63 for TF-A boot when FIP container is not used
64
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010065choice
66 prompt "STM32MP15x board select"
67 optional
68
69config TARGET_ST_STM32MP15x
70 bool "STMicroelectronics STM32MP15x boards"
71 select STM32MP15x
Patrick Delaunay66111eb2020-03-10 10:15:03 +010072 imply BOOTSTAGE
Patrick Delaunay66111eb2020-03-10 10:15:03 +010073 imply CMD_BOOTSTAGE
Patrick Delaunayf97beae2019-12-03 09:38:58 +010074 imply CMD_CLS if CMD_BMP
Patrick Delaunay28a46092019-07-30 19:16:26 +020075 imply DISABLE_CONSOLE
Patrick Delaunayfcb49912019-07-30 19:16:23 +020076 imply PRE_CONSOLE_BUFFER
Patrick Delaunay887d9e42019-07-30 19:16:22 +020077 imply SILENT_CONSOLE
Patrick Delaunay85b53972018-03-12 10:46:10 +010078 help
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010079 target the STMicroelectronics board with SOC STM32MP15x
80 managed by board/st/stm32mp1:
81 Evalulation board (EV1) or Discovery board (DK1 and DK2).
82 The difference between board are managed with devicetree
83
Jagan Teki6cd3dc92021-03-16 21:52:06 +053084config TARGET_MICROGEA_STM32MP1
85 bool "Engicam MicroGEA STM32MP1 SOM"
86 select STM32MP15x
Jagan Teki6cd3dc92021-03-16 21:52:06 +053087 imply BOOTSTAGE
Jagan Teki6cd3dc92021-03-16 21:52:06 +053088 imply CMD_BOOTSTAGE
89 imply CMD_CLS if CMD_BMP
90 imply DISABLE_CONSOLE
91 imply PRE_CONSOLE_BUFFER
92 imply SILENT_CONSOLE
93 help
94 MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
95
96 MicroGEA STM32MP1 MicroDev 2.0:
97 * MicroDev 2.0 is a general purpose miniature carrier board with CAN,
98 LTE and LVDS panel interfaces.
99 * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
100 for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
101
Jagan Teki46f44b52021-03-16 21:52:07 +0530102 MicroGEA STM32MP1 MicroDev 2.0 7" OF:
103 * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
104 panel and toucscreen.
105 * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
106 pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
107 Open Frame Solution board.
108
Jagan Tekic0f218b2021-03-16 21:52:03 +0530109config TARGET_ICORE_STM32MP1
110 bool "Engicam i.Core STM32MP1 SOM"
111 select STM32MP15x
Jagan Tekic0f218b2021-03-16 21:52:03 +0530112 imply BOOTSTAGE
Jagan Tekic0f218b2021-03-16 21:52:03 +0530113 imply CMD_BOOTSTAGE
114 imply CMD_CLS if CMD_BMP
115 imply DISABLE_CONSOLE
116 imply PRE_CONSOLE_BUFFER
117 imply SILENT_CONSOLE
118 help
119 i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
120
121 i.Core STM32MP1 EDIMM2.2:
122 * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
123 * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
124 creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
125
Jagan Teki42597852021-03-16 21:52:04 +0530126 i.Core STM32MP1 C.TOUCH 2.0
127 * C.TOUCH 2.0 is a general purpose Carrier board.
128 * i.Core STM32MP1 needs to mount on top of this Carrier board
129 for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
130
Marek Vasut5ff05292020-01-24 18:39:16 +0100131config TARGET_DH_STM32MP1_PDK2
132 bool "DH STM32MP1 PDK2"
133 select STM32MP15x
Marek Vasut5ff05292020-01-24 18:39:16 +0100134 help
135 Target the DH PDK2 development kit with STM32MP15x SoM.
136
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100137endchoice
Patrick Delaunay85b53972018-03-12 10:46:10 +0100138
139config SYS_TEXT_BASE
Patrick Delaunay85b53972018-03-12 10:46:10 +0100140 default 0xC0100000
Patrick Delaunay85b53972018-03-12 10:46:10 +0100141
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +0100142config NR_DRAM_BANKS
143 default 1
144
Patrick Delaunayab7d6442020-09-04 12:55:19 +0200145config DDR_CACHEABLE_SIZE
146 hex "Size of the DDR marked cacheable in pre-reloc stage"
Patrick Delaunayab7d6442020-09-04 12:55:19 +0200147 default 0x40000000
148 help
149 Define the size of the DDR marked as cacheable in U-Boot
150 pre-reloc stage.
151 This option can be useful to avoid speculatif access
152 to secured area of DDR used by TF-A or OP-TEE before U-Boot
153 initialization.
154 The areas marked "no-map" in device tree should be located
155 before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
156
Patrick Delaunayfc69c682018-03-20 10:54:54 +0100157config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
158 hex "Partition on MMC2 to use to load U-Boot from"
159 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
160 default 1
161 help
162 Partition on the second MMC to load U-Boot from when the MMC is being
163 used in raw mode
164
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200165config STM32_ETZPC
166 bool "STM32 Extended TrustZone Protection"
Patrick Delaunay3a6e3872020-03-10 16:05:43 +0100167 depends on STM32MP15x
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200168 default y
Simon Glass1c383742021-12-18 11:27:51 -0700169 imply BOOTP_SERVERIP
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200170 help
171 Say y to enable STM32 Extended TrustZone Protection
172
Alexandru Gagniuc31aa6972021-07-29 11:47:17 -0500173config STM32_ECDSA_VERIFY
174 bool "STM32 ECDSA verification via the ROM API"
175 depends on SPL_ECDSA_VERIFY
176 default y
177 help
178 Say y to enable the uclass driver for ECDSA verification using the
179 ROM API provided on STM32MP.
180 The ROM API is only available during SPL for now.
181
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200182config CMD_STM32KEY
183 bool "command stm32key to fuse public key hash"
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200184 help
185 fuse public key hash in corresponding fuse used to authenticate
186 binary.
Patrick Delaunayd6c098a2021-06-28 14:55:57 +0200187 This command is used to evaluate the secure boot on stm32mp SOC,
188 it is deactivated by default in real products.
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200189
Patrick Delaunayfcb49912019-07-30 19:16:23 +0200190config PRE_CON_BUF_ADDR
191 default 0xC02FF000
192
193config PRE_CON_BUF_SZ
194 default 4096
195
Patrick Delaunayf8600202019-04-18 17:32:47 +0200196config BOOTSTAGE_STASH_ADDR
197 default 0xC3000000
198
Patrick Delaunay951edb42021-12-07 10:05:59 +0100199if BOOTCOUNT_GENERIC
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +0200200config SYS_BOOTCOUNT_SINGLEWORD
201 default y
202
203# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
204config SYS_BOOTCOUNT_ADDR
205 default 0x5C00A154
206endif
207
Patrick Delaunay82168e82018-05-17 14:50:46 +0200208if DEBUG_UART
209
210config DEBUG_UART_BOARD_INIT
211 default y
212
213# debug on UART4 by default
214config DEBUG_UART_BASE
215 default 0x40010000
216
217# clock source is HSI on reset
218config DEBUG_UART_CLOCK
219 default 64000000
220endif
221
Patrick Delaunay0440d862021-02-25 13:37:00 +0100222source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
Marek Vasut5ff05292020-01-24 18:39:16 +0100223source "board/dhelectronics/dh_stm32mp1/Kconfig"
Jagan Tekic0f218b2021-03-16 21:52:03 +0530224source "board/engicam/stm32mp1/Kconfig"
225source "board/st/stm32mp1/Kconfig"
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +0100226
Patrick Delaunay85b53972018-03-12 10:46:10 +0100227endif