blob: 4acb29333c2577e880c7b054cfad082e7f33d5f3 [file] [log] [blame]
Patrick Delaunay85b53972018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
Patrick Delaunay4c5821d2020-07-24 11:13:31 +02004 select SPL_BOARD_INIT
Patrick Delaunay85b53972018-03-12 10:46:10 +01005 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
Simon Glass284cb9c2021-07-10 21:14:31 -06008 select SPL_DRIVERS_MISC
Patrick Delaunay85b53972018-03-12 10:46:10 +01009 select SPL_FRAMEWORK
Simon Glass035939e2021-07-10 21:14:30 -060010 select SPL_GPIO
Patrick Delaunay85b53972018-03-12 10:46:10 +010011 select SPL_LIBCOMMON_SUPPORT
12 select SPL_LIBGENERIC_SUPPORT
13 select SPL_OF_CONTROL
14 select SPL_OF_TRANSLATE
15 select SPL_PINCTRL
16 select SPL_REGMAP
Ley Foon Tan9caf7122018-06-14 18:45:19 +080017 select SPL_DM_RESET
Simon Glassf4d60392021-08-08 12:20:12 -060018 select SPL_SERIAL
Patrick Delaunay85b53972018-03-12 10:46:10 +010019 select SPL_SYSCON
Simon Glass1ba1d4e2021-07-10 21:14:28 -060020 select SPL_WATCHDOG if WATCHDOG
Patrick Delaunayf8600202019-04-18 17:32:47 +020021 imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
22 imply SPL_BOOTSTAGE if BOOTSTAGE
Patrick Delaunayaa4e6852019-02-27 17:01:14 +010023 imply SPL_DISPLAY_PRINT
Patrick Delaunay85b53972018-03-12 10:46:10 +010024 imply SPL_LIBDISK_SUPPORT
Simon Glassa5820472021-08-08 12:20:14 -060025 imply SPL_SPI_LOAD if SPL_SPI
Patrick Delaunay85b53972018-03-12 10:46:10 +010026
27config SYS_SOC
28 default "stm32mp"
29
Patrick Delaunay7e517c62019-04-18 17:32:36 +020030config SYS_MALLOC_LEN
31 default 0x2000000
32
Patrick Delaunay088b6762019-04-18 17:32:37 +020033config ENV_SIZE
Patrice Chotardd83bba42019-05-07 18:40:47 +020034 default 0x2000
Patrick Delaunay088b6762019-04-18 17:32:37 +020035
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010036config STM32MP15x
37 bool "Support STMicroelectronics STM32MP15x Soc"
Patrick Delaunayf8fe21d2020-04-01 09:07:33 +020038 select ARCH_SUPPORT_PSCI if !TFABOOT
39 select ARM_SMCCC if TFABOOT
Patrick Delaunay1e2a9b72021-10-13 15:11:18 +020040 select BINMAN
Lokesh Vutla81b1a672018-04-26 18:21:26 +053041 select CPU_V7A
Patrick Delaunayf8fe21d2020-04-01 09:07:33 +020042 select CPU_V7_HAS_NONSEC if !TFABOOT
Patrick Delaunaye0207372018-04-16 10:13:24 +020043 select CPU_V7_HAS_VIRT
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020044 select OF_BOARD_SETUP
Patrick Delaunay85b53972018-03-12 10:46:10 +010045 select PINCTRL_STM32
Patrick Delaunayb139a5b2018-07-09 15:17:20 +020046 select STM32_RCC
Patrick Delaunay85b53972018-03-12 10:46:10 +010047 select STM32_RESET
Patrick Delaunay4368e562019-07-30 19:16:25 +020048 select STM32_SERIAL
Andre Przywara7b169252018-04-12 04:24:46 +030049 select SYS_ARCH_TIMER
Patrick Delaunay59d0da12020-07-02 17:43:45 +020050 imply CMD_NVEDIT_INFO
Patrick Delaunayf8fe21d2020-04-01 09:07:33 +020051 imply SYSRESET_PSCI if TFABOOT
52 imply SYSRESET_SYSCON if !TFABOOT
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010053 help
54 support of STMicroelectronics SOC STM32MP15x family
55 STM32MP157, STM32MP153 or STM32MP151
56 STMicroelectronics MPU with core ARMv7
57 dual core A7 for STM32MP157/3, monocore for STM32MP151
58 target all the STMicroelectronics board with SOC STM32MP1 family
59
Patrick Delaunayba4b8b02021-07-26 11:21:34 +020060config STM32MP15x_STM32IMAGE
61 bool "Support STM32 image for generated U-Boot image"
62 depends on STM32MP15x && TFABOOT
63 help
64 Support of STM32 image generation for SOC STM32MP15x
65 for TF-A boot when FIP container is not used
66
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010067choice
68 prompt "STM32MP15x board select"
69 optional
70
71config TARGET_ST_STM32MP15x
72 bool "STMicroelectronics STM32MP15x boards"
73 select STM32MP15x
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +020074 imply BOOTCOUNT_LIMIT
Patrick Delaunay66111eb2020-03-10 10:15:03 +010075 imply BOOTSTAGE
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +020076 imply CMD_BOOTCOUNT
Patrick Delaunay66111eb2020-03-10 10:15:03 +010077 imply CMD_BOOTSTAGE
Patrick Delaunayf97beae2019-12-03 09:38:58 +010078 imply CMD_CLS if CMD_BMP
Patrick Delaunay28a46092019-07-30 19:16:26 +020079 imply DISABLE_CONSOLE
Patrick Delaunayfcb49912019-07-30 19:16:23 +020080 imply PRE_CONSOLE_BUFFER
Patrick Delaunay887d9e42019-07-30 19:16:22 +020081 imply SILENT_CONSOLE
Patrick Delaunay85b53972018-03-12 10:46:10 +010082 help
Patrick Delaunay310aa8a2020-01-13 15:17:42 +010083 target the STMicroelectronics board with SOC STM32MP15x
84 managed by board/st/stm32mp1:
85 Evalulation board (EV1) or Discovery board (DK1 and DK2).
86 The difference between board are managed with devicetree
87
Jagan Teki6cd3dc92021-03-16 21:52:06 +053088config TARGET_MICROGEA_STM32MP1
89 bool "Engicam MicroGEA STM32MP1 SOM"
90 select STM32MP15x
91 imply BOOTCOUNT_LIMIT
92 imply BOOTSTAGE
93 imply CMD_BOOTCOUNT
94 imply CMD_BOOTSTAGE
95 imply CMD_CLS if CMD_BMP
96 imply DISABLE_CONSOLE
97 imply PRE_CONSOLE_BUFFER
98 imply SILENT_CONSOLE
99 help
100 MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
101
102 MicroGEA STM32MP1 MicroDev 2.0:
103 * MicroDev 2.0 is a general purpose miniature carrier board with CAN,
104 LTE and LVDS panel interfaces.
105 * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
106 for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
107
Jagan Teki46f44b52021-03-16 21:52:07 +0530108 MicroGEA STM32MP1 MicroDev 2.0 7" OF:
109 * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
110 panel and toucscreen.
111 * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
112 pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
113 Open Frame Solution board.
114
Jagan Tekic0f218b2021-03-16 21:52:03 +0530115config TARGET_ICORE_STM32MP1
116 bool "Engicam i.Core STM32MP1 SOM"
117 select STM32MP15x
118 imply BOOTCOUNT_LIMIT
119 imply BOOTSTAGE
120 imply CMD_BOOTCOUNT
121 imply CMD_BOOTSTAGE
122 imply CMD_CLS if CMD_BMP
123 imply DISABLE_CONSOLE
124 imply PRE_CONSOLE_BUFFER
125 imply SILENT_CONSOLE
126 help
127 i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
128
129 i.Core STM32MP1 EDIMM2.2:
130 * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
131 * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
132 creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
133
Jagan Teki42597852021-03-16 21:52:04 +0530134 i.Core STM32MP1 C.TOUCH 2.0
135 * C.TOUCH 2.0 is a general purpose Carrier board.
136 * i.Core STM32MP1 needs to mount on top of this Carrier board
137 for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
138
Marek Vasut5ff05292020-01-24 18:39:16 +0100139config TARGET_DH_STM32MP1_PDK2
140 bool "DH STM32MP1 PDK2"
141 select STM32MP15x
142 imply BOOTCOUNT_LIMIT
143 imply CMD_BOOTCOUNT
144 help
145 Target the DH PDK2 development kit with STM32MP15x SoM.
146
Patrick Delaunay310aa8a2020-01-13 15:17:42 +0100147endchoice
Patrick Delaunay85b53972018-03-12 10:46:10 +0100148
149config SYS_TEXT_BASE
Patrick Delaunay85b53972018-03-12 10:46:10 +0100150 default 0xC0100000
Patrick Delaunay85b53972018-03-12 10:46:10 +0100151
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +0100152config NR_DRAM_BANKS
153 default 1
154
Patrick Delaunayab7d6442020-09-04 12:55:19 +0200155config DDR_CACHEABLE_SIZE
156 hex "Size of the DDR marked cacheable in pre-reloc stage"
157 default 0x10000000 if TFABOOT
158 default 0x40000000
159 help
160 Define the size of the DDR marked as cacheable in U-Boot
161 pre-reloc stage.
162 This option can be useful to avoid speculatif access
163 to secured area of DDR used by TF-A or OP-TEE before U-Boot
164 initialization.
165 The areas marked "no-map" in device tree should be located
166 before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
167
Patrick Delaunayfc69c682018-03-20 10:54:54 +0100168config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
169 hex "Partition on MMC2 to use to load U-Boot from"
170 depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
171 default 1
172 help
173 Partition on the second MMC to load U-Boot from when the MMC is being
174 used in raw mode
175
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200176config STM32_ETZPC
177 bool "STM32 Extended TrustZone Protection"
Patrick Delaunay3a6e3872020-03-10 16:05:43 +0100178 depends on STM32MP15x
Patrick Delaunay43f214c2019-07-05 17:20:15 +0200179 default y
180 help
181 Say y to enable STM32 Extended TrustZone Protection
182
Alexandru Gagniuc31aa6972021-07-29 11:47:17 -0500183config STM32_ECDSA_VERIFY
184 bool "STM32 ECDSA verification via the ROM API"
185 depends on SPL_ECDSA_VERIFY
186 default y
187 help
188 Say y to enable the uclass driver for ECDSA verification using the
189 ROM API provided on STM32MP.
190 The ROM API is only available during SPL for now.
191
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200192config CMD_STM32KEY
193 bool "command stm32key to fuse public key hash"
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200194 help
195 fuse public key hash in corresponding fuse used to authenticate
196 binary.
Patrick Delaunayd6c098a2021-06-28 14:55:57 +0200197 This command is used to evaluate the secure boot on stm32mp SOC,
198 it is deactivated by default in real products.
Patrick Delaunay109d13f2019-07-05 17:20:17 +0200199
Patrick Delaunayfcb49912019-07-30 19:16:23 +0200200config PRE_CON_BUF_ADDR
201 default 0xC02FF000
202
203config PRE_CON_BUF_SZ
204 default 4096
205
Patrick Delaunayf8600202019-04-18 17:32:47 +0200206config BOOTSTAGE_STASH_ADDR
207 default 0xC3000000
208
Patrick Delaunay9c07f4a2019-04-18 17:32:45 +0200209if BOOTCOUNT_LIMIT
210config SYS_BOOTCOUNT_SINGLEWORD
211 default y
212
213# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
214config SYS_BOOTCOUNT_ADDR
215 default 0x5C00A154
216endif
217
Patrick Delaunay82168e82018-05-17 14:50:46 +0200218if DEBUG_UART
219
220config DEBUG_UART_BOARD_INIT
221 default y
222
223# debug on UART4 by default
224config DEBUG_UART_BASE
225 default 0x40010000
226
227# clock source is HSI on reset
228config DEBUG_UART_CLOCK
229 default 64000000
230endif
231
Patrick Delaunay0440d862021-02-25 13:37:00 +0100232source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
Marek Vasut5ff05292020-01-24 18:39:16 +0100233source "board/dhelectronics/dh_stm32mp1/Kconfig"
Jagan Tekic0f218b2021-03-16 21:52:03 +0530234source "board/engicam/stm32mp1/Kconfig"
235source "board/st/stm32mp1/Kconfig"
Patrick Delaunay6d3cbf32019-02-27 17:01:15 +0100236
Patrick Delaunay85b53972018-03-12 10:46:10 +0100237endif