arm: stm32: add new architecture for STM32MP family
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
new file mode 100644
index 0000000..ab94879
--- /dev/null
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -0,0 +1,41 @@
+if ARCH_STM32MP
+
+config SPL
+ select SPL_BOARD_INIT
+ select SPL_CLK
+ select SPL_DM
+ select SPL_DM_SEQ_ALIAS
+ select SPL_FRAMEWORK
+ select SPL_GPIO_SUPPORT
+ select SPL_LIBCOMMON_SUPPORT
+ select SPL_LIBGENERIC_SUPPORT
+ select SPL_OF_CONTROL
+ select SPL_OF_TRANSLATE
+ select SPL_PINCTRL
+ select SPL_REGMAP
+ select SPL_RESET_SUPPORT
+ select SPL_SERIAL_SUPPORT
+ select SPL_SYSCON
+ imply SPL_LIBDISK_SUPPORT
+
+config SYS_SOC
+ default "stm32mp"
+
+config TARGET_STM32MP1
+ bool "Support stm32mp1xx"
+ select CPU_V7
+ select PINCTRL_STM32
+ select STM32_RESET
+ help
+ target STMicroelectronics SOC STM32MP1 family
+ STMicroelectronics MPU with core ARMv7
+
+config SYS_TEXT_BASE
+ prompt "U-Boot base address"
+ default 0xC0100000
+ help
+ configure the U-Boot base address
+ when DDR driver is used:
+ DDR + 1MB (0xC0100000)
+
+endif