Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
ece4c258266576da916ecf49983ee9d434e3eb7e
/
plat
/
intel
/
soc
/
common
5a77020
Merge "fix(intel): update memcpy to memcpy_s" into integration
by Mark Dykes
· Fri Aug 30 20:09:24 2024 +0200
765cf2d
Merge "fix(intel): software workaround for bridge timeout" into integration
by Olivier Deprez
· Wed Aug 28 08:37:23 2024 +0200
ebca515
fix(intel): update memcpy to memcpy_s
by Sieu Mun Tang
· Mon Aug 26 07:59:10 2024 +0800
d9144ec
fix(intel): add in missing ECC register
by Jit Loon Lim
· Thu Aug 22 21:53:03 2024 +0800
6848bd6
feat(intel): enable VAB support for Intel products
by Sieu Mun Tang
· Sat Jul 20 00:43:43 2024 +0800
d80c3d3
feat(intel): add in SHA384 authentication
by Jit Loon Lim
· Thu Oct 26 23:46:01 2023 +0800
c2f06aa
fix(intel): software workaround for bridge timeout
by Jit Loon Lim
· Mon Apr 15 14:48:05 2024 +0800
2738fbc
Merge "fix(intel): f2sdram bridge quick write thru failed" into integration
by Manish Pandey
· Fri Jul 19 15:53:17 2024 +0200
cc10e38
Merge "feat(intel): add QSPI get devinfo mailbox cmd" into integration
by Manish Pandey
· Fri Jul 19 15:51:01 2024 +0200
a995834
fix(intel): add in watchdog for QSPI driver
by Sieu Mun Tang
· Tue Mar 26 08:15:45 2024 +0800
60f0b58
feat(intel): add QSPI get devinfo mailbox cmd
by Kah Jing Lee
· Sun Jan 07 20:34:39 2024 +0800
2626a4e
fix(intel): f2sdram bridge quick write thru failed
by Jit Loon Lim
· Wed Mar 20 21:43:58 2024 +0800
5436c68
fix(intel): update nand driver to match GHRD design
by Girisha Dengi
· Wed Nov 15 13:39:10 2023 +0800
d6cede3
Merge "feat(intel): enable SDMMC frontdoor load for ATF->Linux" into integration
by Sandrine Bailleux
· Fri Jan 19 11:08:14 2024 +0100
c271599
feat(intel): enable query of fip offset on RSU
by Mahesh Rao
· Tue Aug 22 17:26:23 2023 +0800
01c564b
feat(intel): support query of fip offset using RSU
by Mahesh Rao
· Tue Aug 22 17:22:24 2023 +0800
961f7f1
Merge "feat(intel): support wipe DDR after calibration" into integration
by Sandrine Bailleux
· Wed Jan 10 14:49:27 2024 +0100
0360c62
Merge "fix(intel): update from INFO to VERBOSE when print debug message" into integration
by Sandrine Bailleux
· Wed Jan 10 14:45:59 2024 +0100
d20b9d6
Merge "fix(intel): update fcs crypto init code to check for mode" into integration
by Sandrine Bailleux
· Wed Jan 10 13:41:44 2024 +0100
c697fd5
Merge changes I548e3034,I65c7fd1b,I1cdacc0f,If9ac35af into integration
by Sandrine Bailleux (on vacation)
· Wed Dec 27 11:21:09 2023 +0100
76c51fd
fix(intel): update from INFO to VERBOSE when print debug message
by Sieu Mun Tang
· Fri Nov 17 14:02:54 2023 +0800
477aef4
feat(intel): support wipe DDR after calibration
by Jit Loon Lim
· Mon Aug 14 13:12:01 2023 +0800
334ea37
feat(intel): support QSPI ECC Linux for Agilex
by Sieu Mun Tang
· Fri Dec 22 00:43:57 2023 +0800
6e42279
feat(intel): add in QSPI ECC for Linux
by Jit Loon Lim
· Thu Sep 07 16:44:07 2023 +0800
eede099
fix(intel): add HPS remapper to remap base address for SDM
by Sieu Mun Tang
· Fri Dec 22 00:26:42 2023 +0800
e7ab132
Merge "fix(intel): fix hardcoded mpu frequency ticks" into integration
by Sandrine Bailleux
· Tue Dec 19 16:12:59 2023 +0100
1bb0ee0
Merge "fix(intel): update DDR range checking for Agilex5" into integration
by Sandrine Bailleux
· Tue Dec 19 15:32:06 2023 +0100
deb053c
Merge "fix(intel): update fcs functions to check ddr range" into integration
by Sandrine Bailleux
· Tue Dec 19 14:26:28 2023 +0100
f72b96d
Merge "feat(intel): support SDM mailbox safe inject seu error for Linux" into integration
by Manish Pandey
· Mon Dec 18 18:39:10 2023 +0100
c5a3e3a
feat(intel): enable SDMMC frontdoor load for ATF->Linux
by Jit Loon Lim
· Mon Oct 16 00:19:34 2023 +0800
ffa06e7
fix(intel): fix hardcoded mpu frequency ticks
by Jit Loon Lim
· Fri Jul 07 17:15:26 2023 +0800
b46c869
feat(intel): support SDM mailbox safe inject seu error for Linux
by Jit Loon Lim
· Wed Sep 20 14:00:41 2023 +0800
fc4a017
fix(intel): update DDR range checking for Agilex5
by Sieu Mun Tang
· Mon Sep 25 22:30:34 2023 +0800
c0dc40e
fix(intel): update fcs functions to check ddr range
by Jit Loon Lim
· Fri Nov 17 10:36:30 2023 +0800
231ca5c
fix(intel): update fcs crypto init code to check for mode
by Jit Loon Lim
· Wed Sep 13 09:25:59 2023 +0800
05a020f
Merge "fix(intel): update HPS bridges for Agilex5 SoC FPGA" into integration
by Sandrine Bailleux
· Wed Dec 06 11:36:05 2023 +0100
e3eb943
Merge "fix(intel): read QSPI bank buffer data in bytes" into integration
by Manish Pandey
· Tue Nov 28 22:46:29 2023 +0100
94f4418
Merge "feat(intel): restructure watchdog" into integration
by Manish Pandey
· Tue Nov 28 22:45:38 2023 +0100
ed27523
Merge "fix(intel): update individual return result for hps and fpga bridges" into integration
by Manish Pandey
· Mon Nov 27 16:39:04 2023 +0100
c199e0a
Merge "fix(intel): update stream id to non-secure for SDM" into integration
by Manish Pandey
· Mon Nov 27 16:38:24 2023 +0100
07101ec
fix(intel): read QSPI bank buffer data in bytes
by Girisha Dengi
· Thu Oct 12 21:27:23 2023 +0800
0c054e5
fix(intel): update individual return result for hps and fpga bridges
by Jit Loon Lim
· Mon Oct 16 07:57:58 2023 +0800
5dac95d
fix(intel): update stream id to non-secure for SDM
by Sieu Mun Tang
· Fri Sep 15 15:13:46 2023 +0800
b35f68a
fix(intel): update HPS bridges for Agilex5 SoC FPGA
by Sieu Mun Tang
· Mon Oct 16 00:15:38 2023 +0800
9da7620
fix(intel): update boot scratch cold register to use cold 8
by Jit Loon Lim
· Sat Jun 10 00:04:49 2023 +0800
6284537
feat(intel): restructure watchdog
by Sieu Mun Tang
· Fri Jun 09 23:33:36 2023 +0800
4c249f1
feat(intel): platform enablement for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
17d0762
feat(intel): ccu driver for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
7768a66
feat(intel): vab support for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
a7f5494
feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
55bf238
feat(intel): ddr driver for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
b24dddf
feat(intel): cold/warm reset and smp support for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
86733dd
feat(intel): reset manager support for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
7787efe
feat(intel): mailbox and SMC support for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
5e76874
feat(intel): system manager support for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
5080606
feat(intel): uart support for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
8bb9193
feat(intel): pinmux, peripheral and Handoff support for Agilex5 SoC FPGA
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
8eb61b7
fix(intel): fix ncore ccu snoop dvm enable bug
by Jit Loon Lim
· Sat Jun 10 00:13:44 2023 +0800
1e1c8c4
feat(intel): add intel_rsu_update() to sip_svc_v2
by Mahesh Rao
· Tue May 23 14:33:45 2023 +0800
f3662dd
Merge "fix(intel): update checking for memcpy and memset" into integration
by Sandrine Bailleux
· Wed May 24 08:31:09 2023 +0200
709a519
Merge changes I38545567,I2f52d3ea into integration
by Sandrine Bailleux
· Tue May 23 17:43:00 2023 +0200
28c1c78
feat(intel): restructure sys mgr for S10/N5X
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
86f6fb3
feat(intel): restructure sys mgr for Agilex
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
581ad47
fix(intel): update checking for memcpy and memset
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
2bee173
feat(intel): setup SEU ERR read interface for FP8
by Jit Loon Lim
· Wed May 17 12:26:11 2023 +0800
2be03c0
fix(tree): correct some typos
by Elyes Haouas
· Mon Feb 13 09:14:48 2023 +0100
a9fca83
fix(intel): fix Agilex and N5X clock manager to main PLL C0
by Jit Loon Lim
· Thu Dec 22 21:52:36 2022 +0800
f48707a
feat(intel): implement timer init divider via CPU frequency for N5X
by Sieu Mun Tang
· Thu Jun 23 18:05:02 2022 +0800
7eb05ed
Merge "feat(intel): fix bridge disable and reset" into integration
by Sandrine Bailleux
· Wed Apr 12 08:32:56 2023 +0200
55fc120
Merge "fix(intel): update boot scratch to indicate to Uboot is PSCI ON" into integration
by Sandrine Bailleux
· Tue Apr 11 09:39:11 2023 +0200
21165ab
fix(intel): flash dcache before mmio read
by Jit Loon Lim
· Mon Mar 27 15:19:53 2023 +0800
73d0384
fix(intel): fix the pointer of block memory to fill in and bytes being set
by Sieu Mun Tang
· Tue Mar 21 15:11:08 2023 +0800
fda03c9
feat(intel): fix bridge disable and reset
by Ang Tien Sung
· Mon Mar 13 09:32:40 2023 +0800
44c61fc
fix(intel): update boot scratch to indicate to Uboot is PSCI ON
by Jit Loon Lim
· Thu Mar 02 13:38:53 2023 +0800
2757de7
Merge "fix(intel): add mailbox error return status for FCS_DECRYPTION" into integration
by Sandrine Bailleux
· Mon Dec 19 08:37:23 2022 +0100
6c7f0c7
fix(intel): add mailbox error return status for FCS_DECRYPTION
by Sieu Mun Tang
· Sun Dec 04 01:43:35 2022 +0800
12fd5ed
fix(intel): missing NCORE CCU snoop filter fix in BL2
by Jit Loon Lim
· Thu Nov 10 22:08:13 2022 +0800
fc2e956
Merge "feat(intel): extending to support SMMU in FCS" into integration
by Sandrine Bailleux
· Tue Dec 06 17:27:17 2022 +0100
3c4e5ab
Merge "fix(intel): fix fcs_client crashed when increased param size" into integration
by Sandrine Bailleux
· Tue Dec 06 17:27:07 2022 +0100
585cf6d
Merge changes Ia8f1471a,I6b95c19d into integration
by Sandrine Bailleux
· Tue Dec 06 17:26:22 2022 +0100
6f9a4cc
fix(intel): fix fcs_client crashed when increased param size
by Jit Loon Lim
· Tue Sep 13 10:24:04 2022 +0800
bd8da63
feat(intel): extending to support SMMU in FCS
by Sieu Mun Tang
· Wed Sep 28 15:58:28 2022 +0800
71675eb
Merge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration
by Sandrine Bailleux
· Mon Nov 28 15:08:25 2022 +0100
c2cc18f
Merge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration
by Sandrine Bailleux
· Mon Nov 28 15:03:16 2022 +0100
7501681
fix(intel): agilex bitstream pre-authenticate
by Jit Loon Lim
· Thu Nov 03 20:03:37 2022 +0800
dd96d8f
fix(intel): mailbox store QSPI ref clk in scratch reg
by Jit Loon Lim
· Fri Aug 19 13:40:17 2022 +0200
15d4edb
fix(intel): remove checking on TEMP and VOLT checking for HWMON
by Jit Loon Lim
· Thu Oct 06 10:52:40 2022 +0800
746ca17
fix(intel): fix sp_timer0 is not disabled in firewall on Agilex
by Jit Loon Lim
· Tue Sep 20 10:41:37 2022 +0800
1632608
fix(intel): fix print out ERROR when encounter SEU_Err
by Sieu Mun Tang
· Tue Nov 22 23:22:45 2022 +0800
55803a2
fix(intel): fix UART baud rate and clock
by Sieu Mun Tang
· Fri Jul 01 09:08:57 2022 +0800
25b6992
Merge "fix(intel): fix asynchronous read response by copying data to input buffer" into integration
by Sandrine Bailleux
· Mon Oct 03 10:51:09 2022 +0200
c9b11d2
fix(intel): fix asynchronous read response by copying data to input buffer
by Sieu Mun Tang
· Mon Jul 04 22:34:32 2022 +0800
8482cb6
fix(intel): fix Mac verify update and finalize for return response data
by Sieu Mun Tang
· Fri Jun 24 11:11:41 2022 +0800
890e02b
chore: use tabs for indentation
by Jorge Troncoso
· Mon Aug 29 15:58:07 2022 -0700
2f2b61c
fix(intel): remove unused printout
by Sieu Mun Tang
· Fri May 13 16:42:42 2022 +0800
c366760
fix(intel): fix configuration status based on start request
by Sieu Mun Tang
· Fri May 13 14:55:05 2022 +0800
4f5554c
style(intel): align the sequence in header file
by Sieu Mun Tang
· Fri May 13 14:36:32 2022 +0800
7420c53
fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD
by Sieu Mun Tang
· Tue May 10 23:17:04 2022 +0800
527df9f
fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying
by Sieu Mun Tang
· Thu Apr 28 16:28:48 2022 +0800
e77d37d
fix(intel): extending to support large file size for SHA-2 ECDSA data signing and signature verifying
by Sieu Mun Tang
· Thu Apr 28 16:23:20 2022 +0800
Next »