| commit | 1bb0ee05680cd9b1440eec68d1ee1144c8135fa0 | [log] [tgz] |
|---|---|---|
| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | Tue Dec 19 15:32:06 2023 +0100 |
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Tue Dec 19 15:32:06 2023 +0100 |
| tree | 3d3202dc455a0baa766fdd82229d4311daaece51 | |
| parent | deb053c80b8910b4e22c979a4aae27f8d1088ccf [diff] | |
| parent | fc4a01729cc9af00d81f1c24ab198e0ac5900a70 [diff] |
Merge "fix(intel): update DDR range checking for Agilex5" into integration