tree 3d3202dc455a0baa766fdd82229d4311daaece51
parent deb053c80b8910b4e22c979a4aae27f8d1088ccf
parent fc4a01729cc9af00d81f1c24ab198e0ac5900a70
author Sandrine Bailleux <sandrine.bailleux@arm.com> 1702996326 +0100
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1702996326 +0100

Merge "fix(intel): update DDR range checking for Agilex5" into integration