| commit | a7f549423e8e9d9716dff4f506326a0c8236f840 | [log] [tgz] |
|---|---|---|
| author | Jit Loon Lim <jit.loon.lim@intel.com> | Wed May 17 12:26:11 2023 +0800 |
| committer | Jit Loon Lim <jit.loon.lim@intel.com> | Wed Jul 05 10:11:11 2023 +0800 |
| tree | 546d2f87ce15572f317285407ead54412bf33bf5 | |
| parent | 55bf238b06bfc71e20a14282c367b6b2cd80525c [diff] |
feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA This patch is used to implement sdmmc/nand/combo-phy driver to support Cadence IP for Agilex5 SoC FPGA. 1. Added SDMMC/NAND/COMBO-PHY support. 2. Updated product name -> Agilex5 3. Updated QSPI base address Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6