tree 546d2f87ce15572f317285407ead54412bf33bf5
parent 55bf238b06bfc71e20a14282c367b6b2cd80525c
author Jit Loon Lim <jit.loon.lim@intel.com> 1684297571 +0800
committer Jit Loon Lim <jit.loon.lim@intel.com> 1688523071 +0800

feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA

This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
	1. Added SDMMC/NAND/COMBO-PHY support.
	2. Updated product name -> Agilex5
	3. Updated QSPI base address

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6