commit | dd96d8ff48a6c32b18fe641baca029401e8d1501 | [log] [tgz] |
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author | Jit Loon Lim <jit.loon.lim@intel.com> | Fri Aug 19 13:40:17 2022 +0200 |
committer | Sieu Mun Tang <sieu.mun.tang@intel.com> | Tue Nov 22 23:56:42 2022 +0800 |
tree | 336bdf156e3d1dd1ff2682c0e89d5f5de0a26b1a | |
parent | d0a780661d85774de0a281c3579cccb0f8dc91aa [diff] |
fix(intel): mailbox store QSPI ref clk in scratch reg When HPS requests QSPI controller access the SDM returns the QSPI reference clock frequency. Store the provided reference clock frequency (in kHz) in BOOT_SCRATCH_COLD_0 register (bits [27:0]) as u-boot QSPI driver expects this. Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I6b95c19db602387a79ff10abdebbc57abb0c07ff