| commit | b24dddfef9b2a79d90e05643826e410bafb94a6f | [log] [tgz] |
|---|---|---|
| author | Jit Loon Lim <jit.loon.lim@intel.com> | Wed May 17 12:26:11 2023 +0800 |
| committer | Jit Loon Lim <jit.loon.lim@intel.com> | Wed Jul 05 09:08:34 2023 +0800 |
| tree | 1fbc1025514baa088cd5773791ae7bae762102c5 | |
| parent | 86733dd087ac3f8eb6a391d9ce42033520424ffe [diff] |
feat(intel): cold/warm reset and smp support for Agilex5 SoC FPGA This patch is used to implement 1. Cold/Warm reset and SMP support for Agilex5 SoC FPGA 2. Updated product name -> Agilex5 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I2c0645bcbf3a5907a4c79f35cffe674920b48f9d