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Ryan Harkin25cff832014-01-13 12:37:03 +00001#
Manish V Badarkheeba13bd2022-01-08 23:08:02 +00002# Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
Ryan Harkin25cff832014-01-13 12:37:03 +00003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Ryan Harkin25cff832014-01-13 12:37:03 +00005#
6
Chris Kaye9272152021-09-28 15:52:14 +01007include common/fdt_wrappers.mk
8
Soby Mathewb6f3b1f2016-04-07 17:40:04 +01009# Use the GICv3 driver on the FVP by default
10FVP_USE_GIC_DRIVER := FVP_GICV3
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000011
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000012# Default cluster count for FVP
13FVP_CLUSTER_COUNT := 2
14
Jeenu Viswambharan75421132018-01-31 14:52:08 +000015# Default number of CPUs per cluster on FVP
16FVP_MAX_CPUS_PER_CLUSTER := 4
17
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000018# Default number of threads per CPU on FVP
19FVP_MAX_PE_PER_CPU := 1
20
Manish V Badarkheb24c6372021-01-24 03:26:50 +000021# Disable redistributor frame of inactive/fused CPU cores by marking it as read
22# only; enable redistributor frames of all CPU cores by default.
23FVP_GICR_REGION_PROTECTION := 0
24
Soby Mathew5f6412a2018-02-08 11:39:38 +000025FVP_DT_PREFIX := fvp-base-gicv3-psci
26
Achin Gupta1fa7eb62015-11-03 14:18:34 +000027# The FVP platform depends on this macro to build with correct GIC driver.
28$(eval $(call add_define,FVP_USE_GIC_DRIVER))
29
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000030# Pass FVP_CLUSTER_COUNT to the build system.
Soby Mathew47e43f22016-02-01 14:04:34 +000031$(eval $(call add_define,FVP_CLUSTER_COUNT))
Soby Mathew7356b1e2016-03-24 10:12:42 +000032
Jeenu Viswambharan75421132018-01-31 14:52:08 +000033# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
35
Jeenu Viswambharan528d21b2016-11-15 13:53:57 +000036# Pass FVP_MAX_PE_PER_CPU to the build system.
37$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
38
Manish V Badarkheb24c6372021-01-24 03:26:50 +000039# Pass FVP_GICR_REGION_PROTECTION to the build system.
40$(eval $(call add_define,FVP_GICR_REGION_PROTECTION))
41
Soby Mathew7356b1e2016-03-24 10:12:42 +000042# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
43# choose the CCI driver , else the CCN driver
44ifeq ($(FVP_CLUSTER_COUNT), 0)
45$(error "Incorrect cluster count specified for FVP port")
46else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
47FVP_INTERCONNECT_DRIVER := FVP_CCI
48else
49FVP_INTERCONNECT_DRIVER := FVP_CCN
Soby Mathew47e43f22016-02-01 14:04:34 +000050endif
51
Soby Mathew7356b1e2016-03-24 10:12:42 +000052$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
53
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000054# Choose the GIC sources depending upon the how the FVP will be invoked
Andre Przywarae1cc1302020-03-25 15:50:38 +000055ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000056
Andre Przywarae1cc1302020-03-25 15:50:38 +000057# The GIC model (GIC-600 or GIC-500) will be detected at runtime
58GICV3_SUPPORT_GIC600 := 1
Alexei Fedorov84f1b5d2020-03-23 18:45:17 +000059GICV3_OVERRIDE_DISTIF_PWR_OPS := 1
60
61# Include GICv3 driver files
62include drivers/arm/gic/v3/gicv3.mk
63
64FVP_GIC_SOURCES := ${GICV3_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +000065 plat/common/plat_gicv3.c \
66 plat/arm/common/arm_gicv3.c
Jeenu Viswambharand7a901e2016-12-06 16:15:22 +000067
laurenw-armdc5e9a22020-05-12 10:58:11 -050068 ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
69 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c
70 endif
71
Achin Gupta1fa7eb62015-11-03 14:18:34 +000072else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
Alexei Fedorovfc4f80e2020-04-07 11:48:00 +010073
74# No GICv4 extension
75GIC_ENABLE_V4_EXTN := 0
76$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
77
Alexei Fedorovcaa18022020-07-14 10:47:25 +010078# Include GICv2 driver files
79include drivers/arm/gic/v2/gicv2.mk
Alexei Fedorovfc4f80e2020-04-07 11:48:00 +010080
Alexei Fedorovcaa18022020-07-14 10:47:25 +010081FVP_GIC_SOURCES := ${GICV2_SOURCES} \
Achin Gupta1fa7eb62015-11-03 14:18:34 +000082 plat/common/plat_gicv2.c \
83 plat/arm/common/arm_gicv2.c
Soby Mathew5f6412a2018-02-08 11:39:38 +000084
85FVP_DT_PREFIX := fvp-base-gicv2-psci
Achin Gupta1fa7eb62015-11-03 14:18:34 +000086else
87$(error "Incorrect GIC driver chosen on FVP port")
88endif
89
Soby Mathew7356b1e2016-03-24 10:12:42 +000090ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +010091FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
Soby Mathew7356b1e2016-03-24 10:12:42 +000092else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
93FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
94 plat/arm/common/arm_ccn.c
95else
96$(error "Incorrect CCN driver chosen on FVP port")
97endif
Vikram Kanigirifbb13012016-02-15 11:54:14 +000098
Soby Mathew9c708b52016-02-26 14:23:19 +000099FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000100 plat/arm/board/fvp/fvp_security.c \
101 plat/arm/common/arm_tzc400.c
102
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000103
Juan Castillo31a68f02015-04-14 12:49:03 +0100104PLAT_INCLUDES := -Iplat/arm/board/fvp/include
Sandrine Bailleuxe701e302014-05-20 17:28:25 +0100105
Ryan Harkin25cff832014-01-13 12:37:03 +0000106
Soby Mathewcc037c12016-04-08 16:42:58 +0100107PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
Ryan Harkin25cff832014-01-13 12:37:03 +0000108
Soby Mathew0d268dc2016-07-11 14:13:56 +0100109FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
110
111ifeq (${ARCH}, aarch64)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000112
John Tsichritzis7557c662019-06-03 13:54:30 +0100113# select a different set of CPU files, depending on whether we compile for
114# hardware assisted coherency cores or not
John Tsichritzisfe6df392019-03-19 17:20:52 +0000115ifeq (${HW_ASSISTED_COHERENCY}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100116# Cores used without DSU
John Tsichritzisfe6df392019-03-19 17:20:52 +0000117 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
Soby Mathewc704cbc2014-08-14 11:33:56 +0100118 lib/cpus/aarch64/cortex_a53.S \
119 lib/cpus/aarch64/cortex_a57.S \
Yatharth Kochar63af6872016-02-09 12:00:03 +0000120 lib/cpus/aarch64/cortex_a72.S \
John Tsichritzisfe6df392019-03-19 17:20:52 +0000121 lib/cpus/aarch64/cortex_a73.S
122else
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100123# Cores used with DSU only
John Tsichritzis7557c662019-06-03 13:54:30 +0100124 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100125 # AArch64-only cores
John Tsichritzis7557c662019-06-03 13:54:30 +0100126 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \
127 lib/cpus/aarch64/cortex_a76ae.S \
Balint Dobszaycc942642019-07-03 13:02:56 +0200128 lib/cpus/aarch64/cortex_a77.S \
Jimmy Brisson7ec175e2020-06-01 16:49:34 -0500129 lib/cpus/aarch64/cortex_a78.S \
Javier Almansa Sobrino9faad3c2020-10-23 13:22:07 +0100130 lib/cpus/aarch64/neoverse_n_common.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100131 lib/cpus/aarch64/neoverse_n1.S \
Javier Almansa Sobrino9faad3c2020-10-23 13:22:07 +0100132 lib/cpus/aarch64/neoverse_n2.S \
John Tsichritzis7557c662019-06-03 13:54:30 +0100133 lib/cpus/aarch64/neoverse_e1.S \
Jimmy Brisson958a0b12020-09-30 15:28:03 -0500134 lib/cpus/aarch64/neoverse_v1.S \
Joel Goddarda1c50ab2022-09-21 21:52:28 +0530135 lib/cpus/aarch64/neoverse_v2.S \
Jimmy Brisson7cc90c42020-09-30 15:34:51 -0500136 lib/cpus/aarch64/cortex_a78_ae.S \
johpow01a3810e82021-05-18 15:23:31 -0500137 lib/cpus/aarch64/cortex_a510.S \
Rupinderjit Singh7e465552022-08-23 11:55:27 +0100138 lib/cpus/aarch64/cortex_a710.S \
139 lib/cpus/aarch64/cortex_a715.S \
140 lib/cpus/aarch64/cortex_x3.S \
Imre Kis584410e2019-07-22 14:36:30 +0200141 lib/cpus/aarch64/cortex_a65.S \
Bipin Ravi4da1b0b2021-03-16 15:20:58 -0500142 lib/cpus/aarch64/cortex_a65ae.S \
johpow01449d5d72021-08-19 16:12:50 -0500143 lib/cpus/aarch64/cortex_a78c.S \
johpow01e39543a2021-08-19 16:51:26 -0500144 lib/cpus/aarch64/cortex_hayes.S \
johpow0115f10bd2021-12-01 17:40:39 -0600145 lib/cpus/aarch64/cortex_hunter.S \
Harrison Mutai2205f9a2022-10-03 12:48:35 +0100146 lib/cpus/aarch64/cortex_hunter_elp_arm.S \
Jayanth Dodderi Chidanand37de9162021-12-07 17:20:10 +0000147 lib/cpus/aarch64/cortex_x2.S \
148 lib/cpus/aarch64/neoverse_poseidon.S
John Tsichritzis7557c662019-06-03 13:54:30 +0100149 endif
John Tsichritzisc0c104a2019-08-13 10:11:41 +0100150 # AArch64/AArch32 cores
151 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
152 lib/cpus/aarch64/cortex_a75.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000153endif
John Tsichritzis6deaf9c2018-10-08 17:09:43 +0100154
Yatharth Kochara4c219a2016-07-12 15:47:03 +0100155else
156FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
Soby Mathew0d268dc2016-07-11 14:13:56 +0100157endif
Sandrine Bailleuxdd505792016-01-13 09:04:26 +0000158
Alexei Fedorov896799a2019-05-09 12:14:40 +0100159BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
160 drivers/arm/sp805/sp805.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100161 drivers/delay_timer/delay_timer.c \
Aditya Angadi20b48412019-04-16 11:29:14 +0530162 drivers/io/io_semihosting.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000163 lib/semihosting/semihosting.c \
Yatharth Kochar88ac53b2016-07-04 11:03:49 +0100164 lib/semihosting/${ARCH}/semihosting_call.S \
165 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100166 plat/arm/board/fvp/fvp_bl1_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100167 plat/arm/board/fvp/fvp_err.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000168 plat/arm/board/fvp/fvp_io_storage.c \
169 ${FVP_CPU_LIBS} \
170 ${FVP_INTERCONNECT_SOURCES}
171
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500172ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100173BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
174else
175BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
176endif
177
Ryan Harkin25cff832014-01-13 12:37:03 +0000178
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100179BL2_SOURCES += drivers/arm/sp805/sp805.c \
180 drivers/io/io_semihosting.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100181 lib/utils/mem_region.c \
Dan Handley2b6b5742015-03-19 19:17:53 +0000182 lib/semihosting/semihosting.c \
Yatharth Kochara5f77d32016-07-04 11:26:14 +0100183 lib/semihosting/${ARCH}/semihosting_call.S \
Dan Handleyd617f662015-04-27 19:17:18 +0100184 plat/arm/board/fvp/fvp_bl2_setup.c \
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +0100185 plat/arm/board/fvp/fvp_err.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100186 plat/arm/board/fvp/fvp_io_storage.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100187 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000188 ${FVP_SECURITY_SOURCES}
Ryan Harkin25cff832014-01-13 12:37:03 +0000189
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100190
Manish V Badarkhe09a192c2020-08-23 09:58:44 +0100191ifeq (${COT_DESC_IN_DTB},1)
192BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c
193endif
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100194
Zelalem Aweke96c0bab2021-07-11 18:39:39 -0500195ifeq (${ENABLE_RME},1)
196BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S
Soby Mathewf05d93a2022-03-22 16:21:19 +0000197BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \
198 plat/arm/board/fvp/fvp_realm_attest_key.c
Zelalem Aweke96c0bab2021-07-11 18:39:39 -0500199endif
200
Andre Przywarabdc76f12022-11-21 17:07:25 +0000201ifeq (${ENABLE_FEAT_RNG_TRAP},1)
202BL31_SOURCES += plat/arm/board/fvp/fvp_sync_traps.c
203endif
204
Roberto Vargas52207802017-11-17 13:22:18 +0000205ifeq (${BL2_AT_EL3},1)
206BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
207 plat/arm/board/fvp/fvp_bl2_el3_setup.c \
208 ${FVP_CPU_LIBS} \
209 ${FVP_INTERCONNECT_SOURCES}
210endif
211
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500212ifeq (${USE_SP804_TIMER},1)
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100213BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
Antonio Nino Diaz664adb62016-05-17 09:48:10 +0100214endif
215
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100216BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000217 ${FVP_SECURITY_SOURCES}
Yatharth Kochar3a11eda2015-10-14 15:28:11 +0100218
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500219ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100220BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
221endif
222
Antonio Nino Diazf13d09a2019-01-23 21:50:09 +0000223BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
224 drivers/arm/smmu/smmu_v3.c \
Alexei Fedorov7131d832019-08-16 14:15:59 +0100225 drivers/delay_timer/delay_timer.c \
Antonio Nino Diazd7da2f82018-10-10 11:14:44 +0100226 drivers/cfi/v2m/v2m_flash.c \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100227 lib/utils/mem_region.c \
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +0100228 plat/arm/board/fvp/fvp_bl31_setup.c \
Madhukar Pappireddyd0cf0a92020-04-16 17:54:25 -0500229 plat/arm/board/fvp/fvp_console.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100230 plat/arm/board/fvp/fvp_pm.c \
Dan Handleyd617f662015-04-27 19:17:18 +0100231 plat/arm/board/fvp/fvp_topology.c \
232 plat/arm/board/fvp/aarch64/fvp_helpers.S \
Roberto Vargasb96ee4b2018-08-06 13:35:31 +0100233 plat/arm/common/arm_nor_psci_mem_protect.c \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000234 ${FVP_CPU_LIBS} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000235 ${FVP_GIC_SOURCES} \
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000236 ${FVP_INTERCONNECT_SOURCES} \
Vikram Kanigiri70752bb2016-02-10 14:50:53 +0000237 ${FVP_SECURITY_SOURCES}
Juan Castillo5e29c752015-01-07 10:39:25 +0000238
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600239# Support for fconf in BL31
240# Added separately from the above list for better readability
Madhukar Pappireddyaa1121f2020-03-13 13:00:17 -0500241ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),)
Chris Kaye9272152021-09-28 15:52:14 +0100242BL31_SOURCES += lib/fconf/fconf.c \
Manish V Badarkhe8717e032020-05-30 17:40:44 +0100243 lib/fconf/fconf_dyn_cfg_getter.c \
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600244 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500245
Chris Kaye9272152021-09-28 15:52:14 +0100246BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
247
Madhukar Pappireddy02cc3ff2020-06-02 09:26:30 -0500248ifeq (${SEC_INT_DESC_IN_FCONF},1)
249BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c
250endif
251
Madhukar Pappireddyaa1121f2020-03-13 13:00:17 -0500252endif
Madhukar Pappireddyae9677b2020-01-27 13:37:51 -0600253
Madhukar Pappireddy7a554a12020-08-12 13:18:19 -0500254ifeq (${USE_SP804_TIMER},1)
Alexei Fedorov7131d832019-08-16 14:15:59 +0100255BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
256else
257BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
258endif
259
Soby Mathewa684e582018-02-27 11:17:14 +0000260# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
261ifdef UNIX_MK
Soby Mathew5f6412a2018-02-08 11:39:38 +0000262FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
Soby Mathewb6814842018-04-04 09:40:32 +0100263FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
Louis Mayencourt6d2b5732019-12-17 13:17:25 +0000264 ${PLAT}_fw_config.dts \
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100265 ${PLAT}_tb_fw_config.dts \
Soby Mathewb6814842018-04-04 09:40:32 +0100266 ${PLAT}_soc_fw_config.dts \
267 ${PLAT}_nt_fw_config.dts \
268 )
269
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100270FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
271FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
Soby Mathewb6814842018-04-04 09:40:32 +0100272FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
273FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
274
275ifeq (${SPD},tspd)
276FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
277FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
278
279# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100280$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100281endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000282
Achin Guptada6ef0e2019-10-11 14:54:48 +0100283ifeq (${SPD},spmd)
Olivier Deprezbcaa0682020-04-01 21:28:26 +0200284
285ifeq ($(ARM_SPMC_MANIFEST_DTS),)
286ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
287endif
288
289FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
290FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
Achin Guptada6ef0e2019-10-11 14:54:48 +0100291
292# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100293$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG}))
Achin Guptada6ef0e2019-10-11 14:54:48 +0100294endif
295
Manish V Badarkhe64616a52020-05-31 08:53:40 +0100296# Add the FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100297$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG}))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000298# Add the TB_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100299$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100300# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100301$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG}))
Soby Mathewb6814842018-04-04 09:40:32 +0100302# Add the NT_FW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100303$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
Soby Mathew5f6412a2018-02-08 11:39:38 +0000304
305FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
306$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
307
308# Add the HW_CONFIG to FIP and specify the same to certtool
Anders Dellien3f694742020-08-23 19:32:48 +0100309$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG}))
Soby Mathewa684e582018-02-27 11:17:14 +0000310endif
Soby Mathew5f6412a2018-02-08 11:39:38 +0000311
Dimitris Papastamos12241b92017-11-14 13:27:41 +0000312# Enable Activity Monitor Unit extensions by default
313ENABLE_AMU := 1
314
Dimitris Papastamos756b8dc2018-05-31 14:10:06 +0100315# Enable dynamic mitigation support by default
316DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
317
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000318ifeq (${ENABLE_AMU},1)
John Tsichritzisfe6df392019-03-19 17:20:52 +0000319BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
Dimitris Papastamos0b00f8a2018-02-14 10:00:06 +0000320 lib/cpus/aarch64/cpuamu_helpers.S
John Tsichritzisfe6df392019-03-19 17:20:52 +0000321
322ifeq (${HW_ASSISTED_COHERENCY}, 1)
323BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
324 lib/cpus/aarch64/neoverse_n1_pubsub.c
325endif
Dimitris Papastamosd7e2e9e2017-12-11 11:45:35 +0000326endif
327
Jeenu Viswambharana490fe02018-06-08 08:44:36 +0100328ifeq (${RAS_EXTENSION},1)
329BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
330endif
331
Douglas Raillard306593d2017-02-24 18:14:15 +0000332ifneq (${ENABLE_STACK_PROTECTOR},0)
333PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
334endif
335
dp-armcdd03cb2017-02-15 11:07:55 +0000336ifeq (${ARCH},aarch32)
337 NEED_BL32 := yes
338endif
339
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000340# Enable the dynamic translation tables library.
Manish V Badarkhe86854e72022-03-15 16:05:58 +0000341ifeq ($(filter 1,${BL2_AT_EL3} ${ARM_XLAT_TABLES_LIB_V1}),)
342 ifeq (${ARCH},aarch32)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900343 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Manish V Badarkhe86854e72022-03-15 16:05:58 +0000344 else # AArch64
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900345 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Antonio Nino Diaz60ef6752019-02-12 13:32:03 +0000346 endif
Antonio Nino Diaz4e6408c2019-01-23 16:23:07 +0000347endif
348
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000349ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
350 ifeq (${ARCH},aarch32)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900351 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000352 else # AArch64
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900353 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000354 ifeq (${SPD},tspd)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900355 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES
Petre-Ionut Tudore5a6fef2019-11-07 15:18:03 +0000356 endif
357 endif
358endif
359
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100360ifeq (${USE_DEBUGFS},1)
Masahiro Yamada1adc5f52020-04-01 14:28:24 +0900361 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100362endif
363
Soby Mathew3b5156e2017-10-05 12:27:33 +0100364# Add support for platform supplied linker script for BL31 build
365$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
366
Roberto Vargas9f412482018-01-16 10:35:23 +0000367ifneq (${BL2_AT_EL3}, 0)
368 override BL1_SOURCES =
369endif
370
Tamas Banb0f83252022-02-11 09:49:36 +0100371# Include Measured Boot makefile before any Crypto library makefile.
372# Crypto library makefile may need default definitions of Measured Boot build
373# flags present in Measured Boot makefile.
374ifeq (${MEASURED_BOOT},1)
375 RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
376 $(info Including ${RSS_MEASURED_BOOT_MK})
377 include ${RSS_MEASURED_BOOT_MK}
378
laurenw-arm7834aa02022-05-31 16:39:09 -0500379 ifneq (${MBOOT_RSS_HASH_ALG}, sha256)
380 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
381 endif
382
Tamas Banb0f83252022-02-11 09:49:36 +0100383 BL1_SOURCES += ${MEASURED_BOOT_SOURCES}
384 BL2_SOURCES += ${MEASURED_BOOT_SOURCES}
385endif
386
Juan Castillo31a68f02015-04-14 12:49:03 +0100387include plat/arm/board/common/board_common.mk
Dan Handley2b6b5742015-03-19 19:17:53 +0000388include plat/arm/common/arm_common.mk
Soby Mathew45e39e22018-03-26 15:16:46 +0100389
Alexei Fedorov61369a22020-07-13 14:59:02 +0100390ifeq (${MEASURED_BOOT},1)
Manish V Badarkhea74d9632021-09-14 23:12:42 +0100391BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
Tamas Banb0f83252022-02-11 09:49:36 +0100392 plat/arm/board/fvp/fvp_bl1_measured_boot.c \
393 lib/psa/measured_boot.c
394
Manish V Badarkhea74d9632021-09-14 23:12:42 +0100395BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \
Tamas Banb0f83252022-02-11 09:49:36 +0100396 plat/arm/board/fvp/fvp_bl2_measured_boot.c \
397 lib/psa/measured_boot.c
398
Sandrine Bailleuxb204fe92022-10-12 14:46:56 +0200399# Note that attestation code does not depend on measured boot interfaces per se,
400# but the two features go together - attestation without boot measurements is
401# pretty much pointless...
402BL31_SOURCES += lib/psa/delegated_attestation.c
403
Tamas Banb0f83252022-02-11 09:49:36 +0100404PLAT_INCLUDES += -Iinclude/lib/psa
405
406# RSS is not supported on FVP right now. Thus, we use the mocked version
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200407# of the provided PSA APIs. They return with success and hard-coded data.
Tamas Banb0f83252022-02-11 09:49:36 +0100408PLAT_RSS_NOT_SUPPORTED := 1
409
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200410# Even though RSS is not supported on FVP (see above), we support overriding
411# PLAT_RSS_NOT_SUPPORTED from the command line, just for the purpose of building
412# the code to detect any build regressions. The resulting firmware will not be
413# functional.
414ifneq (${PLAT_RSS_NOT_SUPPORTED},1)
415 $(warning "RSS is not supported on FVP. The firmware will not be functional.")
416 include drivers/arm/rss/rss_comms.mk
417 BL1_SOURCES += ${RSS_COMMS_SOURCES}
418 BL2_SOURCES += ${RSS_COMMS_SOURCES}
Sandrine Bailleuxb204fe92022-10-12 14:46:56 +0200419 BL31_SOURCES += ${RSS_COMMS_SOURCES} \
420 lib/psa/delegated_attestation.c
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200421
Tamas Ban9cc87142022-10-05 11:56:04 +0200422 BL1_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
423 BL2_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
Sandrine Bailleuxb204fe92022-10-12 14:46:56 +0200424 BL31_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0
Sandrine Bailleuxe9e37cb2022-08-31 14:05:38 +0200425endif
426
Alexei Fedorov61369a22020-07-13 14:59:02 +0100427endif
428
Lucian Paul-Trifu5ee4f4e2022-06-22 18:45:30 +0100429ifeq (${DRTM_SUPPORT}, 1)
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100430BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \
431 plat/arm/board/fvp/fvp_drtm_dma_prot.c \
432 plat/arm/board/fvp/fvp_drtm_err.c \
johpow01baa3e6c2022-03-11 17:50:58 -0600433 plat/arm/board/fvp/fvp_drtm_measurement.c \
434 plat/arm/board/fvp/fvp_drtm_stub.c \
Manish V Badarkhefcfe4312022-07-12 21:48:04 +0100435 plat/arm/common/arm_dyn_cfg.c \
436 plat/arm/board/fvp/fvp_err.c
Lucian Paul-Trifu5ee4f4e2022-06-22 18:45:30 +0100437endif
438
Manish V Badarkheeba13bd2022-01-08 23:08:02 +0000439ifeq (${TRUSTED_BOARD_BOOT}, 1)
440BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
441BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
442
Soby Mathew45e39e22018-03-26 15:16:46 +0100443# FVP being a development platform, enable capability to disable Authentication
Antonio Nino Diaz05f49572018-09-25 11:37:23 +0100444# dynamically if TRUSTED_BOARD_BOOT is set.
Max Shvetsov06dba292019-12-06 11:50:12 +0000445DYN_DISABLE_AUTH := 1
Soby Mathew45e39e22018-03-26 15:16:46 +0100446endif
Manish V Badarkhe2d49ef32021-08-24 14:42:35 +0100447
448# enable trace buffer control registers access to NS by default
449ENABLE_TRBE_FOR_NS := 1
450
johpow0181865962022-01-28 17:06:20 -0600451# enable branch record buffer control registers access in NS by default
452# only enable for aarch64
453# do not enable when ENABLE_RME=1
454ifeq (${ARCH}, aarch64)
455ifeq (${ENABLE_RME},0)
456 ENABLE_BRBE_FOR_NS := 1
457endif
458endif
459
Manish V Badarkhe2d49ef32021-08-24 14:42:35 +0100460# enable trace system registers access to NS by default
461ENABLE_SYS_REG_TRACE_FOR_NS := 1
462
463# enable trace filter control registers access to NS by default
464ENABLE_TRF_FOR_NS := 1
Marc Bonnicic66fc1b2021-12-16 18:31:02 +0000465
Andre Przywaraca23fa22022-11-10 14:42:07 +0000466# Linux relies on EL3 enablement if those features are present
467ENABLE_FEAT_FGT := 2
Andre Przywara625a0592022-11-10 14:42:07 +0000468ENABLE_FEAT_HCX := 2
Andre Przywaraca23fa22022-11-10 14:42:07 +0000469
Marc Bonnicic66fc1b2021-12-16 18:31:02 +0000470ifeq (${SPMC_AT_EL3}, 1)
471PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c
472endif