blob: 72547f00fbecc9360e2c352e6b88cb0130e38bc7 [file] [log] [blame]
Miquel Raynal1f1ae152018-08-16 17:30:07 +02001
Miquel Raynald0935362019-10-03 19:50:03 +02002menuconfig MTD_RAW_NAND
Miquel Raynal8115c452018-08-16 17:30:08 +02003 bool "Raw NAND Device Support"
Miquel Raynald0935362019-10-03 19:50:03 +02004if MTD_RAW_NAND
Miquel Raynal1f1ae152018-08-16 17:30:07 +02005
6config SYS_NAND_SELF_INIT
7 bool
8 help
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
11
Tom Rini98372452021-12-12 22:12:36 -050012config SPL_SYS_NAND_SELF_INIT
13 bool
14 depends on !SPL_NAND_SIMPLE
15 help
16 This option, if enabled, provides more flexible and linux-like
17 NAND initialization process, in SPL.
18
19config TPL_SYS_NAND_SELF_INIT
20 bool
21 depends on TPL_NAND_SUPPORT
22 help
23 This option, if enabled, provides more flexible and linux-like
24 NAND initialization process, in SPL.
25
Tom Rini1a9f23d2022-05-26 14:31:57 -040026config TPL_NAND_INIT
27 bool
28
Roger Quadros685c4282022-12-20 12:22:00 +020029config SPL_NAND_INIT
30 bool
31
Tom Riniac164de2022-10-28 20:27:04 -040032config SYS_MAX_NAND_DEVICE
33 int "Maximum number of NAND devices to support"
34 default 1
35
Stefan Agnerbd186142018-12-06 14:57:09 +010036config SYS_NAND_DRIVER_ECC_LAYOUT
Tom Rinid03e14e2021-12-11 14:55:54 -050037 bool "Omit standard ECC layouts to save space"
Stefan Agnerbd186142018-12-06 14:57:09 +010038 help
Tom Rinid03e14e2021-12-11 14:55:54 -050039 Omit standard ECC layouts to save space. Select this if your driver
Stefan Agnerbd186142018-12-06 14:57:09 +010040 is known to provide its own ECC layout.
41
Stefan Roese23b37f92019-08-22 12:28:04 +020042config SYS_NAND_USE_FLASH_BBT
43 bool "Enable BBT (Bad Block Table) support"
44 help
45 Enable the BBT (Bad Block Table) usage.
46
Tom Rini2b2696a2022-11-12 17:36:48 -050047config SYS_NAND_NO_SUBPAGE_WRITE
48 bool "Disable subpage write support"
49 depends on NAND_ARASAN || NAND_DAVINCI || NAND_KIRKWOOD
50
Balamanikandan Gunasundarfe33c7d2022-10-25 16:21:01 +053051config DM_NAND_ATMEL
52 bool "Support Atmel NAND controller with DM support"
53 select SYS_NAND_SELF_INIT
54 imply SYS_NAND_USE_FLASH_BBT
55 help
56 Enable this driver for NAND flash platforms using an Atmel NAND
57 controller.
58
Miquel Raynal1f1ae152018-08-16 17:30:07 +020059config NAND_ATMEL
60 bool "Support Atmel NAND controller"
Tom Rini98372452021-12-12 22:12:36 -050061 select SYS_NAND_SELF_INIT
Miquel Raynal1f1ae152018-08-16 17:30:07 +020062 imply SYS_NAND_USE_FLASH_BBT
63 help
64 Enable this driver for NAND flash platforms using an Atmel NAND
65 controller.
66
Derald D. Woods7830fc52018-12-15 01:36:46 -060067if NAND_ATMEL
68
69config ATMEL_NAND_HWECC
70 bool "Atmel Hardware ECC"
Derald D. Woods7830fc52018-12-15 01:36:46 -060071
72config ATMEL_NAND_HW_PMECC
73 bool "Atmel Programmable Multibit ECC (PMECC)"
74 select ATMEL_NAND_HWECC
Derald D. Woods7830fc52018-12-15 01:36:46 -060075 help
76 The Programmable Multibit ECC (PMECC) controller is a programmable
77 binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
78
79config PMECC_CAP
80 int "PMECC Correctable ECC Bits"
81 depends on ATMEL_NAND_HW_PMECC
82 default 2
83 help
84 Correctable ECC bits, can be 2, 4, 8, 12, and 24.
85
86config PMECC_SECTOR_SIZE
87 int "PMECC Sector Size"
88 depends on ATMEL_NAND_HW_PMECC
89 default 512
90 help
91 Sector size, in bytes, can be 512 or 1024.
92
93config SPL_GENERATE_ATMEL_PMECC_HEADER
94 bool "Atmel PMECC Header Generation"
Tom Rini0a83cc22022-06-10 23:03:09 -040095 depends on SPL
Derald D. Woods7830fc52018-12-15 01:36:46 -060096 select ATMEL_NAND_HWECC
97 select ATMEL_NAND_HW_PMECC
Derald D. Woods7830fc52018-12-15 01:36:46 -060098 help
99 Generate Programmable Multibit ECC (PMECC) header for SPL image.
100
Tom Rini70aa87d2022-11-12 17:36:42 -0500101choice
102 prompt "NAND bus width (bits)"
103 default SYS_NAND_DBW_8
104
105config SYS_NAND_DBW_8
106 bool "NAND bus width is 8 bits"
107
108config SYS_NAND_DBW_16
109 bool "NAND bus width is 16 bits"
110
111endchoice
112
Derald D. Woods7830fc52018-12-15 01:36:46 -0600113endif
114
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +0100115config NAND_BRCMNAND
116 bool "Support Broadcom NAND controller"
Miquel Raynala903be42019-10-03 19:50:04 +0200117 depends on OF_CONTROL && DM && DM_MTD
Tom Rini98372452021-12-12 22:12:36 -0500118 select SYS_NAND_SELF_INIT
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +0100119 help
120 Enable the driver for NAND flash on platforms using a Broadcom NAND
121 controller.
122
Álvaro Fernández Rojasd9f9bfc2019-08-28 19:12:15 +0200123config NAND_BRCMNAND_6368
124 bool "Support Broadcom NAND controller on bcm6368"
125 depends on NAND_BRCMNAND && ARCH_BMIPS
126 help
127 Enable support for broadcom nand driver on bcm6368.
128
Philippe Reynese175c322022-02-11 19:18:36 +0100129config NAND_BRCMNAND_6753
130 bool "Support Broadcom NAND controller on bcm6753"
William Zhang38921822022-08-22 11:49:08 -0700131 depends on NAND_BRCMNAND && BCM6855
Philippe Reynese175c322022-02-11 19:18:36 +0100132 help
133 Enable support for broadcom nand driver on bcm6753.
134
Philippe Reynes74ead742020-01-07 20:14:13 +0100135config NAND_BRCMNAND_68360
136 bool "Support Broadcom NAND controller on bcm68360"
William Zhangdf0b5bb2022-08-22 11:31:43 -0700137 depends on NAND_BRCMNAND && BCM6856
Philippe Reynes74ead742020-01-07 20:14:13 +0100138 help
139 Enable support for broadcom nand driver on bcm68360.
140
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +0100141config NAND_BRCMNAND_6838
142 bool "Support Broadcom NAND controller on bcm6838"
143 depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
144 help
145 Enable support for broadcom nand driver on bcm6838.
146
147config NAND_BRCMNAND_6858
148 bool "Support Broadcom NAND controller on bcm6858"
William Zhang6b45fa62022-08-22 11:39:45 -0700149 depends on NAND_BRCMNAND && BCM6858
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +0100150 help
151 Enable support for broadcom nand driver on bcm6858.
152
153config NAND_BRCMNAND_63158
154 bool "Support Broadcom NAND controller on bcm63158"
William Zhang35a3ec1b2022-08-22 11:19:46 -0700155 depends on NAND_BRCMNAND && BCM63158
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +0100156 help
157 Enable support for broadcom nand driver on bcm63158.
158
Linus Walleij2306c332023-03-08 22:42:31 +0100159config NAND_BRCMNAND_IPROC
160 bool "Support Broadcom NAND controller on the iproc family"
161 depends on NAND_BRCMNAND
162 help
163 Enable support for broadcom nand driver on the Broadcom
164 iproc family such as Northstar (BCM5301x, BCM4708...)
165
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200166config NAND_DAVINCI
167 bool "Support TI Davinci NAND controller"
Tom Rini98372452021-12-12 22:12:36 -0500168 select SYS_NAND_SELF_INIT if TARGET_DA850EVM
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200169 help
170 Enable this driver for NAND flash controllers available in TI Davinci
171 and Keystone2 platforms
172
Tom Rinid1286e12022-11-12 17:36:45 -0500173choice
174 prompt "Type of ECC used on NAND"
175 default SYS_NAND_4BIT_HW_ECC_OOBFIRST
176 depends on NAND_DAVINCI
177
178config SYS_NAND_HW_ECC
179 bool "Use 1-bit HW ECC"
180
Tom Rini7f750f82022-10-28 20:27:11 -0400181config SYS_NAND_4BIT_HW_ECC_OOBFIRST
182 bool "Use 4-bit HW ECC with OOB at the front"
Tom Rinid1286e12022-11-12 17:36:45 -0500183
184config SYS_NAND_SOFT_ECC
185 bool "Use software ECC"
186
187endchoice
Tom Rini7f750f82022-10-28 20:27:11 -0400188
Tom Rini33adefd2022-11-12 17:36:49 -0500189choice
190 prompt "NAND page size"
191 depends on NAND_DAVINCI
192 default SYS_NAND_PAGE_2K
193
194config SYS_NAND_PAGE_2K
195 bool "Page size is 2K"
196
197config SYS_NAND_PAGE_4K
198 bool "Page size is 4K"
199
200endchoice
201
Tom Rinidada0e32021-09-12 20:32:24 -0400202config KEYSTONE_RBL_NAND
203 depends on ARCH_KEYSTONE
204 def_bool y
205
Tom Rinifae1dab2021-09-22 14:50:29 -0400206config SPL_NAND_LOAD
207 def_bool y
208 depends on NAND_DAVINCI && ARCH_DAVINCI && SPL_NAND_SUPPORT
209
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200210config NAND_DENALI
211 bool
212 select SYS_NAND_SELF_INIT
213 imply CMD_NAND
214
215config NAND_DENALI_DT
216 bool "Support Denali NAND controller as a DT device"
217 select NAND_DENALI
Lokanathan, Raaj791edf72022-12-11 23:37:42 +0800218 select SPL_SYS_NAND_SELF_INIT
Masahiro Yamada8fc53822020-01-30 22:07:59 +0900219 depends on OF_CONTROL && DM_MTD
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200220 help
221 Enable the driver for NAND flash on platforms using a Denali NAND
222 controller as a DT device.
223
Tom Rinia73788c2021-09-22 14:50:37 -0400224config NAND_FSL_ELBC
225 bool "Support Freescale Enhanced Local Bus Controller FCM NAND driver"
Tom Rini98372452021-12-12 22:12:36 -0500226 select TPL_SYS_NAND_SELF_INIT if TPL_NAND_SUPPORT
227 select SPL_SYS_NAND_SELF_INIT
228 select SYS_NAND_SELF_INIT
Tom Rinia73788c2021-09-22 14:50:37 -0400229 depends on FSL_ELBC
230 help
231 Enable the Freescale Enhanced Local Bus Controller FCM NAND driver.
232
Pali Rohárbb834db2022-04-04 18:17:19 +0200233config NAND_FSL_ELBC_DT
234 bool "Support Freescale Enhanced Local Bus Controller FCM NAND driver (DT mode)"
235 depends on NAND_FSL_ELBC
236
Tom Rinia73788c2021-09-22 14:50:37 -0400237config NAND_FSL_IFC
238 bool "Support Freescale Integrated Flash Controller NAND driver"
Tom Rini98372452021-12-12 22:12:36 -0500239 select TPL_SYS_NAND_SELF_INIT if TPL_NAND_SUPPORT
Tom Rini1a9f23d2022-05-26 14:31:57 -0400240 select TPL_NAND_INIT if TPL && !TPL_FRAMEWORK
Tom Rini98372452021-12-12 22:12:36 -0500241 select SPL_SYS_NAND_SELF_INIT
242 select SYS_NAND_SELF_INIT
Tom Rini05b419e2021-12-11 14:55:49 -0500243 select FSL_IFC
Tom Rinia73788c2021-09-22 14:50:37 -0400244 help
245 Enable the Freescale Integrated Flash Controller NAND driver.
246
Tom Rinib91baf62022-11-19 18:45:29 -0500247config NAND_KIRKWOOD
248 bool "Support for Kirkwood NAND controller"
249 depends on ARCH_KIRKWOOD
250 default y
251
252config NAND_ECC_BCH
253 bool
254
255config NAND_KMETER1
256 bool "Support KMETER1 NAND controller"
257 depends on VENDOR_KM
258 select NAND_ECC_BCH
259
Tom Rini08204272021-09-22 14:50:28 -0400260config NAND_LPC32XX_MLC
261 bool "Support LPC32XX_MLC controller"
Tom Rini98372452021-12-12 22:12:36 -0500262 select SYS_NAND_SELF_INIT
Tom Rini08204272021-09-22 14:50:28 -0400263 help
264 Enable the LPC32XX MLC NAND controller.
265
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200266config NAND_LPC32XX_SLC
267 bool "Support LPC32XX_SLC controller"
268 help
269 Enable the LPC32XX SLC NAND controller.
270
271config NAND_OMAP_GPMC
272 bool "Support OMAP GPMC NAND controller"
Roger Quadros0bde4972022-10-11 14:50:00 +0300273 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3
Roger Quadros80cf6372022-12-20 12:21:59 +0200274 select SYS_NAND_SELF_INIT if ARCH_K3
Roger Quadros685c4282022-12-20 12:22:00 +0200275 select SPL_NAND_INIT if ARCH_K3
276 select SPL_SYS_NAND_SELF_INIT if ARCH_K3
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200277 help
278 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
279 GPMC controller is used for parallel NAND flash devices, and can
280 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
281 and BCH16 ECC algorithms.
282
Tom Rinif6d26d82021-09-22 14:50:39 -0400283if NAND_OMAP_GPMC
284
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200285config NAND_OMAP_GPMC_PREFETCH
286 bool "Enable GPMC Prefetch"
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200287 default y
288 help
289 On OMAP platforms that use the GPMC controller
290 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
291 uses the prefetch mode to speed up read operations.
292
293config NAND_OMAP_ELM
294 bool "Enable ELM driver for OMAPxx and AMxx platforms."
Tom Rinif6d26d82021-09-22 14:50:39 -0400295 depends on !OMAP34XX
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200296 help
297 ELM controller is used for ECC error detection (not ECC calculation)
298 of BCH4, BCH8 and BCH16 ECC algorithms.
299 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
300 thus such SoC platforms need to depend on software library for ECC error
301 detection. However ECC calculation on such plaforms would still be
302 done by GPMC controller.
303
Tom Rinif6d26d82021-09-22 14:50:39 -0400304choice
305 prompt "ECC scheme"
306 default NAND_OMAP_ECCSCHEME_BCH8_CODE_HW
307 help
308 On OMAP platforms, this CONFIG specifies NAND ECC scheme.
309 It can take following values:
310 OMAP_ECC_HAM1_CODE_SW
311 1-bit Hamming code using software lib.
312 (for legacy devices only)
313 OMAP_ECC_HAM1_CODE_HW
314 1-bit Hamming code using GPMC hardware.
315 (for legacy devices only)
316 OMAP_ECC_BCH4_CODE_HW_DETECTION_SW
317 4-bit BCH code (unsupported)
318 OMAP_ECC_BCH4_CODE_HW
319 4-bit BCH code (unsupported)
320 OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
321 8-bit BCH code with
322 - ecc calculation using GPMC hardware engine,
323 - error detection using software library.
324 - requires CONFIG_BCH to enable software BCH library
325 (For legacy device which do not have ELM h/w engine)
326 OMAP_ECC_BCH8_CODE_HW
327 8-bit BCH code with
328 - ecc calculation using GPMC hardware engine,
329 - error detection using ELM hardware engine.
330 OMAP_ECC_BCH16_CODE_HW
331 16-bit BCH code with
332 - ecc calculation using GPMC hardware engine,
333 - error detection using ELM hardware engine.
334
335 How to select ECC scheme on OMAP and AMxx platforms ?
336 -----------------------------------------------------
337 Though higher ECC schemes have more capability to detect and correct
338 bit-flips, but still selection of ECC scheme is dependent on following
339 - hardware engines present in SoC.
340 Some legacy OMAP SoC do not have ELM h/w engine thus such
341 SoC cannot support BCHx_HW ECC schemes.
342 - size of OOB/Spare region
343 With higher ECC schemes, more OOB/Spare area is required to
344 store ECC. So choice of ECC scheme is limited by NAND oobsize.
345
346 In general following expression can help:
347 NAND_OOBSIZE >= 2 + (NAND_PAGESIZE / 512) * ECC_BYTES
348 where
349 NAND_OOBSIZE = number of bytes available in
350 OOB/spare area per NAND page.
351 NAND_PAGESIZE = bytes in main-area of NAND page.
352 ECC_BYTES = number of ECC bytes generated to
353 protect 512 bytes of data, which is:
354 3 for HAM1_xx ecc schemes
355 7 for BCH4_xx ecc schemes
356 14 for BCH8_xx ecc schemes
357 26 for BCH16_xx ecc schemes
358
359 example to check for BCH16 on 2K page NAND
360 NAND_PAGESIZE = 2048
361 NAND_OOBSIZE = 64
362 2 + (2048 / 512) * 26 = 106 > NAND_OOBSIZE
363 Thus BCH16 cannot be supported on 2K page NAND.
364
365 However, for 4K pagesize NAND
366 NAND_PAGESIZE = 4096
367 NAND_OOBSIZE = 224
368 ECC_BYTES = 26
369 2 + (4096 / 512) * 26 = 210 < NAND_OOBSIZE
370 Thus BCH16 can be supported on 4K page NAND.
371
372config NAND_OMAP_ECCSCHEME_HAM1_CODE_SW
373 bool "1-bit Hamming code using software lib"
374
375config NAND_OMAP_ECCSCHEME_HAM1_CODE_HW
376 bool "1-bit Hamming code using GPMC hardware"
377
378config NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW
379 bool "8-bit BCH code with HW calculation SW error detection"
380
381config NAND_OMAP_ECCSCHEME_BCH8_CODE_HW
382 bool "8-bit BCH code with HW calculation and error detection"
383
384config NAND_OMAP_ECCSCHEME_BCH16_CODE_HW
385 bool "16-bit BCH code with HW calculation and error detection"
386
387endchoice
388
389config NAND_OMAP_ECCSCHEME
390 int
391 default 1 if NAND_OMAP_ECCSCHEME_HAM1_CODE_SW
392 default 2 if NAND_OMAP_ECCSCHEME_HAM1_CODE_HW
393 default 5 if NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW
394 default 6 if NAND_OMAP_ECCSCHEME_BCH8_CODE_HW
395 default 7 if NAND_OMAP_ECCSCHEME_BCH16_CODE_HW
396 help
397 This must be kept in sync with the enum in
398 include/linux/mtd/omap_gpmc.h
399
400endif
401
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200402config NAND_VF610_NFC
403 bool "Support for Freescale NFC for VF610"
404 select SYS_NAND_SELF_INIT
Stefan Agnerbd186142018-12-06 14:57:09 +0100405 select SYS_NAND_DRIVER_ECC_LAYOUT
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200406 imply CMD_NAND
407 help
408 Enables support for NAND Flash Controller on some Freescale
409 processors like the VF610, MCF54418 or Kinetis K70.
410 The driver supports a maximum 2k page size. The driver
411 currently does not support hardware ECC.
412
Lukasz Majewskif006cb32018-12-03 10:24:50 +0100413if NAND_VF610_NFC
414
415config NAND_VF610_NFC_DT
416 bool "Support Vybrid's vf610 NAND controller as a DT device"
Miquel Raynala903be42019-10-03 19:50:04 +0200417 depends on OF_CONTROL && DM_MTD
Lukasz Majewskif006cb32018-12-03 10:24:50 +0100418 help
419 Enable the driver for Vybrid's vf610 NAND flash on platforms
420 using device tree.
421
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200422choice
423 prompt "Hardware ECC strength"
424 depends on NAND_VF610_NFC
425 default SYS_NAND_VF610_NFC_45_ECC_BYTES
426 help
427 Select the ECC strength used in the hardware BCH ECC block.
428
429config SYS_NAND_VF610_NFC_45_ECC_BYTES
430 bool "24-error correction (45 ECC bytes)"
431
432config SYS_NAND_VF610_NFC_60_ECC_BYTES
433 bool "32-error correction (60 ECC bytes)"
434
435endchoice
436
Lukasz Majewskif006cb32018-12-03 10:24:50 +0100437endif
438
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200439config NAND_PXA3XX
440 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
441 select SYS_NAND_SELF_INIT
Shmuel Hazan759349e2020-10-29 08:52:18 +0200442 select DM_MTD
Shmuel Hazan58983222020-10-29 08:52:20 +0200443 select REGMAP
444 select SYSCON
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200445 imply CMD_NAND
446 help
447 This enables the driver for the NAND flash device found on
448 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
449
450config NAND_SUNXI
451 bool "Support for NAND on Allwinner SoCs"
452 default ARCH_SUNXI
453 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
454 select SYS_NAND_SELF_INIT
455 select SYS_NAND_U_BOOT_LOCATIONS
456 select SPL_NAND_SUPPORT
Tom Rini98372452021-12-12 22:12:36 -0500457 select SPL_SYS_NAND_SELF_INIT
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200458 imply CMD_NAND
459 ---help---
460 Enable support for NAND. This option enables the standard and
461 SPL drivers.
462 The SPL driver only supports reading from the NAND using DMA
463 transfers.
464
465if NAND_SUNXI
466
467config NAND_SUNXI_SPL_ECC_STRENGTH
468 int "Allwinner NAND SPL ECC Strength"
469 default 64
470
471config NAND_SUNXI_SPL_ECC_SIZE
472 int "Allwinner NAND SPL ECC Step Size"
473 default 1024
474
475config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
476 int "Allwinner NAND SPL Usable Page Size"
477 default 1024
478
479endif
480
481config NAND_ARASAN
482 bool "Configure Arasan Nand"
483 select SYS_NAND_SELF_INIT
Michal Simekc5587832020-08-19 09:59:52 +0200484 depends on DM_MTD
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200485 imply CMD_NAND
486 help
487 This enables Nand driver support for Arasan nand flash
488 controller. This uses the hardware ECC for read and
489 write operations.
490
491config NAND_MXC
492 bool "MXC NAND support"
493 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
494 imply CMD_NAND
495 help
496 This enables the NAND driver for the NAND flash controller on the
Haolin Lie8df55b2021-07-18 10:13:39 +0800497 i.MX27 / i.MX31 / i.MX5 processors.
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200498
Tom Rini1ba2a002022-11-12 17:36:50 -0500499config SYS_NAND_SIZE
500 int "Size of NAND in kilobytes"
501 depends on NAND_MXC && SPL_NAND_SUPPORT
502 default 268435456
503
Tom Rini17e67002022-12-02 16:42:37 -0500504config MXC_NAND_HWECC
505 bool "Hardware ECC support in MXC NAND"
506 depends on NAND_MXC
507
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200508config NAND_MXS
509 bool "MXS NAND support"
Peng Fan128abf42020-05-04 22:09:00 +0800510 depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
Tom Rini98372452021-12-12 22:12:36 -0500511 select SPL_SYS_NAND_SELF_INIT
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200512 select SYS_NAND_SELF_INIT
513 imply CMD_NAND
514 select APBH_DMA
Peng Fan128abf42020-05-04 22:09:00 +0800515 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
516 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200517 help
518 This enables NAND driver for the NAND flash controller on the
519 MXS processors.
520
521if NAND_MXS
522
523config NAND_MXS_DT
524 bool "Support MXS NAND controller as a DT device"
Miquel Raynala903be42019-10-03 19:50:04 +0200525 depends on OF_CONTROL && DM_MTD
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200526 help
527 Enable the driver for MXS NAND flash on platforms using
528 device tree.
529
530config NAND_MXS_USE_MINIMUM_ECC
531 bool "Use minimum ECC strength supported by the controller"
532 default false
533
534endif
535
Zhengxun Li01551712021-09-14 13:43:51 +0800536config NAND_MXIC
537 bool "Macronix raw NAND controller"
538 select SYS_NAND_SELF_INIT
539 help
540 This selects the Macronix raw NAND controller driver.
541
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200542config NAND_ZYNQ
543 bool "Support for Zynq Nand controller"
Tom Rini98372452021-12-12 22:12:36 -0500544 select SPL_SYS_NAND_SELF_INIT
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200545 select SYS_NAND_SELF_INIT
Ashok Reddy Somabb8448a2019-12-27 04:47:12 -0700546 select DM_MTD
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200547 imply CMD_NAND
548 help
549 This enables Nand driver support for Nand flash controller
550 found on Zynq SoC.
551
552config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
553 bool "Enable use of 1st stage bootloader timing for NAND"
554 depends on NAND_ZYNQ
555 help
Michal Simek50fa1182023-05-17 09:17:16 +0200556 This flag prevent U-Boot reconfigure NAND flash controller and reuse
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200557 the NAND timing from 1st stage bootloader.
558
Suneel Garapati9de7d2b2020-08-26 14:37:22 +0200559config NAND_OCTEONTX
560 bool "Support for OcteonTX NAND controller"
561 select SYS_NAND_SELF_INIT
562 imply CMD_NAND
563 help
564 This enables Nand flash controller hardware found on the OcteonTX
565 processors.
566
567config NAND_OCTEONTX_HW_ECC
568 bool "Support Hardware ECC for OcteonTX NAND controller"
569 depends on NAND_OCTEONTX
570 default y
571 help
572 This enables Hardware BCH engine found on the OcteonTX processors to
573 support ECC for NAND flash controller.
574
Christophe Kerelloda141682019-04-05 11:41:50 +0200575config NAND_STM32_FMC2
576 bool "Support for NAND controller on STM32MP SoCs"
577 depends on ARCH_STM32MP
578 select SYS_NAND_SELF_INIT
579 imply CMD_NAND
580 help
581 Enables support for NAND Flash chips on SoCs containing the FMC2
582 NAND controller. This controller is found on STM32MP SoCs.
583 The controller supports a maximum 8k page size and supports
584 a maximum 8-bit correction error per sector of 512 bytes.
585
Kate Liu41ccd2e2020-12-11 13:46:12 -0800586config CORTINA_NAND
587 bool "Support for NAND controller on Cortina-Access SoCs"
588 depends on CORTINA_PLATFORM
589 select SYS_NAND_SELF_INIT
590 select DM_MTD
591 imply CMD_NAND
592 help
593 Enables support for NAND Flash chips on Coartina-Access SoCs platform
594 This controller is found on Presidio/Venus SoCs.
595 The controller supports a maximum 8k page size and supports
596 a maximum 40-bit error correction per sector of 1024 bytes.
597
Yifeng Zhao9e9021e2021-06-07 16:40:29 +0800598config ROCKCHIP_NAND
599 bool "Support for NAND controller on Rockchip SoCs"
600 depends on ARCH_ROCKCHIP
601 select SYS_NAND_SELF_INIT
602 select DM_MTD
603 imply CMD_NAND
604 help
605 Enables support for NAND Flash chips on Rockchip SoCs platform.
606 This controller is found on Rockchip SoCs.
607 There are four different versions of NAND FLASH Controllers,
608 including:
609 NFC v600: RK2928, RK3066, RK3188
610 NFC v622: RK3036, RK3128
611 NFC v800: RK3308, RV1108
612 NFC v900: PX30, RK3326
613
Johan Jonker904e0f02023-10-18 16:00:27 +0200614config ROCKCHIP_NAND_SKIP_BBTSCAN
615 bool "Skip the automatic BBT scan with Rockchip NAND controllers"
616 depends on ROCKCHIP_NAND
617 default n
618 help
619 Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN
620 option when data content is not in MTD format or
621 must remain unchanged.
622
Tom Rini8f37ac42021-12-12 22:12:35 -0500623config TEGRA_NAND
624 bool "Support for NAND controller on Tegra SoCs"
625 depends on ARCH_TEGRA
626 select SYS_NAND_SELF_INIT
627 imply CMD_NAND
628 help
629 Enables support for NAND Flash chips on Tegra SoCs platforms.
630
developer10a61df2022-05-20 11:23:47 +0800631config NAND_MT7621
632 bool "Support for MediaTek MT7621 NAND flash controller"
633 depends on SOC_MT7621
634 select SYS_NAND_SELF_INIT
635 select SPL_SYS_NAND_SELF_INIT
636 imply CMD_NAND
637 help
638 This enables NAND driver for the NAND flash controller on MediaTek
639 MT7621 platform.
640 The controller supports 4~12 bits correction per 512 bytes with a
641 maximum 4KB page size.
642
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200643comment "Generic NAND options"
644
645config SYS_NAND_BLOCK_SIZE
646 hex "NAND chip eraseblock size"
Pali Rohár5c5cf602023-01-10 22:55:21 +0100647 depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT || \
648 MVEBU_SPL_BOOT_DEVICE_NAND
developer10a61df2022-05-20 11:23:47 +0800649 depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && \
650 !NAND_FSL_IFC && !NAND_MT7621
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200651 help
652 Number of data bytes in one eraseblock for the NAND chip on the
653 board. This is the multiple of NAND_PAGE_SIZE and the number of
654 pages.
655
Tom Rinifdae0072021-09-22 14:50:34 -0400656config SYS_NAND_ONFI_DETECTION
657 bool "Enable detection of ONFI compliant devices during probe"
658 help
659 Enables detection of ONFI compliant devices during probe.
660 And fetching device parameters flashed on device, by parsing
661 ONFI parameter page.
662
Tom Rini2510a812021-09-22 14:50:30 -0400663config SYS_NAND_PAGE_COUNT
664 hex "NAND chip page count"
665 depends on SPL_NAND_SUPPORT && (NAND_ATMEL || NAND_MXC || \
Roger Quadrosd93ea962022-12-20 12:22:01 +0200666 SPL_NAND_AM33XX_BCH || SPL_NAND_LOAD || SPL_NAND_SIMPLE || \
667 NAND_OMAP_GPMC)
Tom Rini2510a812021-09-22 14:50:30 -0400668 help
669 Number of pages in the NAND chip.
670
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200671config SYS_NAND_PAGE_SIZE
672 hex "NAND chip page size"
Tom Rinifae1dab2021-09-22 14:50:29 -0400673 depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
674 SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
Pali Rohár5c5cf602023-01-10 22:55:21 +0100675 MVEBU_SPL_BOOT_DEVICE_NAND || \
Tom Rinifae1dab2021-09-22 14:50:29 -0400676 (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
developer10a61df2022-05-20 11:23:47 +0800677 depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_MT7621
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200678 help
679 Number of data bytes in one page for the NAND chip on the
680 board, not including the OOB area.
681
682config SYS_NAND_OOBSIZE
683 hex "NAND chip OOB size"
Tom Rinifae1dab2021-09-22 14:50:29 -0400684 depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
685 SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
686 (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
Tom Rinid24700f2021-10-30 23:03:56 -0400687 depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200688 help
689 Number of bytes in the Out-Of-Band area for the NAND chip on
690 the board.
691
692# Enhance depends when converting drivers to Kconfig which use this config
693# option (mxc_nand, ndfc, omap_gpmc).
694config SYS_NAND_BUSWIDTH_16BIT
695 bool "Use 16-bit NAND interface"
696 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
697 help
698 Indicates that NAND device has 16-bit wide data-bus. In absence of this
699 config, bus-width of NAND device is assumed to be either 8-bit and later
700 determined by reading ONFI params.
701 Above config is useful when NAND device's bus-width information cannot
702 be determined from on-chip ONFI params, like in following scenarios:
703 - SPL boot does not support reading of ONFI parameters. This is done to
704 keep SPL code foot-print small.
705 - In current U-Boot flow using nand_init(), driver initialization
706 happens in board_nand_init() which is called before any device probe
707 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
708 not available while configuring controller. So a static CONFIG_NAND_xx
709 is needed to know the device's bus-width in advance.
710
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200711if SPL
712
Tom Rini8e6d9c72021-09-22 14:50:33 -0400713config SYS_NAND_5_ADDR_CYCLE
714 bool "Wait 5 address cycles during NAND commands"
715 depends on SPL_NAND_AM33XX_BCH || SPL_NAND_SIMPLE || \
716 (SPL_NAND_SUPPORT && NAND_ATMEL)
717 default y
718 help
719 Some controllers require waiting for 5 address cycles when issuing
720 some commands, on NAND chips larger than 128MiB.
721
Tom Rinia2fbd4a2021-09-22 14:50:32 -0400722choice
Tom Rinifdae0072021-09-22 14:50:34 -0400723 prompt "NAND bad block marker/indicator position in the OOB"
Tom Rinia2fbd4a2021-09-22 14:50:32 -0400724 depends on SPL_NAND_AM33XX_BCH || SPL_NAND_DENALI || SPL_NAND_SIMPLE || \
725 SPL_NAND_SUPPORT && (NAND_ATMEL || NAND_MXC)
726 default HAS_NAND_LARGE_BADBLOCK_POS
727 help
728 In the OOB, which position contains the badblock information.
729
730config HAS_NAND_LARGE_BADBLOCK_POS
731 bool "Set the bad block marker/indicator to the 'large' position"
732
733config HAS_NAND_SMALL_BADBLOCK_POS
734 bool "Set the bad block marker/indicator to the 'small' position"
735
736endchoice
737
738config SYS_NAND_BAD_BLOCK_POS
739 int
740 default 0 if HAS_NAND_LARGE_BADBLOCK_POS
741 default 5 if HAS_NAND_SMALL_BADBLOCK_POS
742
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200743config SYS_NAND_U_BOOT_LOCATIONS
Michal Simek50fa1182023-05-17 09:17:16 +0200744 bool "Define U-Boot binaries locations in NAND"
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200745 help
746 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
Michal Simek50fa1182023-05-17 09:17:16 +0200747 This option should not be enabled when compiling U-Boot for boards
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200748 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
749 file.
750
751config SYS_NAND_U_BOOT_OFFS
752 hex "Location in NAND to read U-Boot from"
753 default 0x800000 if NAND_SUNXI
754 depends on SYS_NAND_U_BOOT_LOCATIONS
755 help
756 Set the offset from the start of the nand where u-boot should be
757 loaded from.
758
759config SYS_NAND_U_BOOT_OFFS_REDUND
760 hex "Location in NAND to read U-Boot from"
761 default SYS_NAND_U_BOOT_OFFS
762 depends on SYS_NAND_U_BOOT_LOCATIONS
763 help
764 Set the offset from the start of the nand where the redundant u-boot
765 should be loaded from.
766
767config SPL_NAND_AM33XX_BCH
768 bool "Enables SPL-NAND driver which supports ELM based"
Tom Rini0a83cc22022-06-10 23:03:09 -0400769 depends on SPL_NAND_SUPPORT && NAND_OMAP_GPMC && !OMAP34XX
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200770 default y
771 help
772 Hardware ECC correction. This is useful for platforms which have ELM
773 hardware engine and use NAND boot mode.
774 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
775 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
776 SPL-NAND driver with software ECC correction support.
777
778config SPL_NAND_DENALI
779 bool "Support Denali NAND controller for SPL"
Tom Rini0a83cc22022-06-10 23:03:09 -0400780 depends on SPL_NAND_SUPPORT
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200781 help
782 This is a small implementation of the Denali NAND controller
783 for use on SPL.
784
Masahiro Yamada64648cb2020-04-17 16:51:42 +0900785config NAND_DENALI_SPARE_AREA_SKIP_BYTES
786 int "Number of bytes skipped in OOB area"
787 depends on SPL_NAND_DENALI
788 range 0 63
789 help
790 This option specifies the number of bytes to skip from the beginning
791 of OOB area before last ECC sector data starts. This is potentially
792 used to preserve the bad block marker in the OOB area.
793
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200794config SPL_NAND_SIMPLE
795 bool "Use simple SPL NAND driver"
Tom Rini0a83cc22022-06-10 23:03:09 -0400796 depends on !SPL_NAND_AM33XX_BCH && SPL_NAND_SUPPORT
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200797 help
798 Support for NAND boot using simple NAND drivers that
799 expose the cmd_ctrl() interface.
Tom Rini4251f7d2022-11-12 17:36:44 -0500800
801config SYS_NAND_HW_ECC_OOBFIRST
802 bool "In SPL, read the OOB first and then the data from NAND"
803 depends on SPL_NAND_SIMPLE
804
Miquel Raynal1f1ae152018-08-16 17:30:07 +0200805endif
806
807endif # if NAND