Convert CONFIG_NAND_OMAP_ECCSCHEME to Kconfig
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in
include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we
will use be a choice statement, enumerating the ones which we have
implemented.
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 2e6fe14..790ee34 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -156,9 +156,10 @@
do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
and BCH16 ECC algorithms.
+if NAND_OMAP_GPMC
+
config NAND_OMAP_GPMC_PREFETCH
bool "Enable GPMC Prefetch"
- depends on NAND_OMAP_GPMC
default y
help
On OMAP platforms that use the GPMC controller
@@ -167,7 +168,7 @@
config NAND_OMAP_ELM
bool "Enable ELM driver for OMAPxx and AMxx platforms."
- depends on NAND_OMAP_GPMC && !OMAP34XX
+ depends on !OMAP34XX
help
ELM controller is used for ECC error detection (not ECC calculation)
of BCH4, BCH8 and BCH16 ECC algorithms.
@@ -176,6 +177,104 @@
detection. However ECC calculation on such plaforms would still be
done by GPMC controller.
+choice
+ prompt "ECC scheme"
+ default NAND_OMAP_ECCSCHEME_BCH8_CODE_HW
+ help
+ On OMAP platforms, this CONFIG specifies NAND ECC scheme.
+ It can take following values:
+ OMAP_ECC_HAM1_CODE_SW
+ 1-bit Hamming code using software lib.
+ (for legacy devices only)
+ OMAP_ECC_HAM1_CODE_HW
+ 1-bit Hamming code using GPMC hardware.
+ (for legacy devices only)
+ OMAP_ECC_BCH4_CODE_HW_DETECTION_SW
+ 4-bit BCH code (unsupported)
+ OMAP_ECC_BCH4_CODE_HW
+ 4-bit BCH code (unsupported)
+ OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+ 8-bit BCH code with
+ - ecc calculation using GPMC hardware engine,
+ - error detection using software library.
+ - requires CONFIG_BCH to enable software BCH library
+ (For legacy device which do not have ELM h/w engine)
+ OMAP_ECC_BCH8_CODE_HW
+ 8-bit BCH code with
+ - ecc calculation using GPMC hardware engine,
+ - error detection using ELM hardware engine.
+ OMAP_ECC_BCH16_CODE_HW
+ 16-bit BCH code with
+ - ecc calculation using GPMC hardware engine,
+ - error detection using ELM hardware engine.
+
+ How to select ECC scheme on OMAP and AMxx platforms ?
+ -----------------------------------------------------
+ Though higher ECC schemes have more capability to detect and correct
+ bit-flips, but still selection of ECC scheme is dependent on following
+ - hardware engines present in SoC.
+ Some legacy OMAP SoC do not have ELM h/w engine thus such
+ SoC cannot support BCHx_HW ECC schemes.
+ - size of OOB/Spare region
+ With higher ECC schemes, more OOB/Spare area is required to
+ store ECC. So choice of ECC scheme is limited by NAND oobsize.
+
+ In general following expression can help:
+ NAND_OOBSIZE >= 2 + (NAND_PAGESIZE / 512) * ECC_BYTES
+ where
+ NAND_OOBSIZE = number of bytes available in
+ OOB/spare area per NAND page.
+ NAND_PAGESIZE = bytes in main-area of NAND page.
+ ECC_BYTES = number of ECC bytes generated to
+ protect 512 bytes of data, which is:
+ 3 for HAM1_xx ecc schemes
+ 7 for BCH4_xx ecc schemes
+ 14 for BCH8_xx ecc schemes
+ 26 for BCH16_xx ecc schemes
+
+ example to check for BCH16 on 2K page NAND
+ NAND_PAGESIZE = 2048
+ NAND_OOBSIZE = 64
+ 2 + (2048 / 512) * 26 = 106 > NAND_OOBSIZE
+ Thus BCH16 cannot be supported on 2K page NAND.
+
+ However, for 4K pagesize NAND
+ NAND_PAGESIZE = 4096
+ NAND_OOBSIZE = 224
+ ECC_BYTES = 26
+ 2 + (4096 / 512) * 26 = 210 < NAND_OOBSIZE
+ Thus BCH16 can be supported on 4K page NAND.
+
+config NAND_OMAP_ECCSCHEME_HAM1_CODE_SW
+ bool "1-bit Hamming code using software lib"
+
+config NAND_OMAP_ECCSCHEME_HAM1_CODE_HW
+ bool "1-bit Hamming code using GPMC hardware"
+
+config NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW
+ bool "8-bit BCH code with HW calculation SW error detection"
+
+config NAND_OMAP_ECCSCHEME_BCH8_CODE_HW
+ bool "8-bit BCH code with HW calculation and error detection"
+
+config NAND_OMAP_ECCSCHEME_BCH16_CODE_HW
+ bool "16-bit BCH code with HW calculation and error detection"
+
+endchoice
+
+config NAND_OMAP_ECCSCHEME
+ int
+ default 1 if NAND_OMAP_ECCSCHEME_HAM1_CODE_SW
+ default 2 if NAND_OMAP_ECCSCHEME_HAM1_CODE_HW
+ default 5 if NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW
+ default 6 if NAND_OMAP_ECCSCHEME_BCH8_CODE_HW
+ default 7 if NAND_OMAP_ECCSCHEME_BCH16_CODE_HW
+ help
+ This must be kept in sync with the enum in
+ include/linux/mtd/omap_gpmc.h
+
+endif
+
config NAND_VF610_NFC
bool "Support for Freescale NFC for VF610"
select SYS_NAND_SELF_INIT