Simon Glass | 4cc43bf | 2021-08-18 21:40:25 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Devicetree file for running sandbox tests |
| 4 | * |
| 5 | * This includes lots of extra devices used by various tests. |
| 6 | * |
| 7 | * Note that SPL use the main sandbox.dts file |
| 8 | */ |
| 9 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 10 | /dts-v1/; |
| 11 | |
Patrick Delaunay | 23aee61 | 2020-01-13 11:35:13 +0100 | [diff] [blame] | 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | #include <dt-bindings/gpio/sandbox-gpio.h> |
Marek Szyprowski | ad39859 | 2021-02-18 11:33:18 +0100 | [diff] [blame] | 14 | #include <dt-bindings/input/input.h> |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 15 | #include <dt-bindings/pinctrl/sandbox-pinmux.h> |
Jean-Jacques Hiblot | a94b697 | 2020-10-16 16:16:34 +0530 | [diff] [blame] | 16 | #include <dt-bindings/mux/mux.h> |
Patrick Delaunay | 23aee61 | 2020-01-13 11:35:13 +0100 | [diff] [blame] | 17 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 18 | / { |
| 19 | model = "sandbox"; |
| 20 | compatible = "sandbox"; |
| 21 | #address-cells = <1>; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 22 | #size-cells = <1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 23 | |
Simon Glass | fef72b7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 24 | aliases { |
| 25 | console = &uart0; |
Michael Walle | 7efcdfd | 2021-02-25 16:51:11 +0100 | [diff] [blame] | 26 | ethernet0 = "/eth@10002000"; |
| 27 | ethernet2 = &swp_0; |
| 28 | ethernet3 = ð_3; |
| 29 | ethernet4 = &dsa_eth0; |
| 30 | ethernet5 = ð_5; |
Sean Anderson | 67d93a4 | 2022-05-05 13:11:30 -0400 | [diff] [blame] | 31 | ethernet6 = "/eth@10004000"; |
| 32 | ethernet7 = &swp_1; |
| 33 | ethernet8 = &phy_eth0; |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 34 | gpio1 = &gpio_a; |
| 35 | gpio2 = &gpio_b; |
Patrick Delaunay | 28bdaa5 | 2020-01-13 11:35:14 +0100 | [diff] [blame] | 36 | gpio3 = &gpio_c; |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 37 | i2c0 = "/i2c@0"; |
Simon Glass | e4fef74 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 38 | mmc0 = "/mmc0"; |
| 39 | mmc1 = "/mmc1"; |
Bin Meng | 408e590 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 40 | pci0 = &pci0; |
| 41 | pci1 = &pci1; |
Bin Meng | 510dddb | 2018-08-03 01:14:50 -0700 | [diff] [blame] | 42 | pci2 = &pci2; |
Michael Walle | 7c41a22 | 2020-06-02 01:47:09 +0200 | [diff] [blame] | 43 | remoteproc0 = &rproc_1; |
| 44 | remoteproc1 = &rproc_2; |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 45 | rtc0 = &rtc_0; |
| 46 | rtc1 = &rtc_1; |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 47 | spi0 = "/spi@0"; |
Przemyslaw Marczak | 3dbb55e | 2015-05-13 13:38:34 +0200 | [diff] [blame] | 48 | testfdt6 = "/e-test"; |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 49 | testbus3 = "/some-bus"; |
| 50 | testfdt0 = "/some-bus/c-test@0"; |
Simon Glass | 7d5e411 | 2020-12-16 21:20:26 -0700 | [diff] [blame] | 51 | testfdt12 = "/some-bus/c-test@1"; |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 52 | testfdt3 = "/b-test"; |
| 53 | testfdt5 = "/some-bus/c-test@5"; |
| 54 | testfdt8 = "/a-test"; |
Simon Glass | 791a17f | 2020-12-16 21:20:27 -0700 | [diff] [blame] | 55 | testfdtm1 = &testfdtm1; |
Eugeniu Rosca | 5ba71e5 | 2018-05-19 14:13:55 +0200 | [diff] [blame] | 56 | fdt-dummy0 = "/translation-test@8000/dev@0,0"; |
| 57 | fdt-dummy1 = "/translation-test@8000/dev@1,100"; |
| 58 | fdt-dummy2 = "/translation-test@8000/dev@2,200"; |
| 59 | fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 60 | usb0 = &usb_0; |
| 61 | usb1 = &usb_1; |
| 62 | usb2 = &usb_2; |
Mario Six | 9592215 | 2018-08-09 14:51:19 +0200 | [diff] [blame] | 63 | axi0 = &axi; |
Mario Six | 02ad6fb | 2018-09-27 09:19:31 +0200 | [diff] [blame] | 64 | osd0 = "/osd"; |
Simon Glass | fef72b7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 65 | }; |
| 66 | |
Philippe Reynes | 462d163 | 2022-03-28 22:56:53 +0200 | [diff] [blame] | 67 | binman { |
| 68 | }; |
| 69 | |
Rasmus Villemoes | 30d4d2b | 2021-04-21 11:06:55 +0200 | [diff] [blame] | 70 | config { |
Simon Glass | 0034d96 | 2021-08-07 07:24:01 -0600 | [diff] [blame] | 71 | testing-bool; |
| 72 | testing-int = <123>; |
| 73 | testing-str = "testing"; |
Rasmus Villemoes | 30d4d2b | 2021-04-21 11:06:55 +0200 | [diff] [blame] | 74 | environment { |
| 75 | from_fdt = "yes"; |
| 76 | fdt_env_path = ""; |
| 77 | }; |
| 78 | }; |
| 79 | |
Simon Glass | b255efc | 2022-04-24 23:31:24 -0600 | [diff] [blame] | 80 | bootstd { |
| 81 | compatible = "u-boot,boot-std"; |
| 82 | |
| 83 | filename-prefixes = "/", "/boot/"; |
| 84 | bootdev-order = "mmc2", "mmc1"; |
| 85 | |
| 86 | syslinux { |
| 87 | compatible = "u-boot,distro-syslinux"; |
| 88 | }; |
| 89 | |
| 90 | efi { |
| 91 | compatible = "u-boot,distro-efi"; |
| 92 | }; |
| 93 | }; |
| 94 | |
Andrew Scull | 451b8b1 | 2022-05-30 10:00:12 +0000 | [diff] [blame] | 95 | fuzzing-engine { |
| 96 | compatible = "sandbox,fuzzing-engine"; |
| 97 | }; |
| 98 | |
Nandor Han | 6521e5d | 2021-06-10 16:56:44 +0300 | [diff] [blame] | 99 | reboot-mode0 { |
| 100 | compatible = "reboot-mode-gpio"; |
| 101 | gpios = <&gpio_c 0 GPIO_ACTIVE_HIGH>, <&gpio_c 1 GPIO_ACTIVE_HIGH>; |
| 102 | u-boot,env-variable = "bootstatus"; |
| 103 | mode-test = <0x01>; |
| 104 | mode-download = <0x03>; |
| 105 | }; |
| 106 | |
Nandor Han | 7e4067a | 2021-06-10 16:56:45 +0300 | [diff] [blame] | 107 | reboot_mode1: reboot-mode@14 { |
| 108 | compatible = "reboot-mode-rtc"; |
| 109 | rtc = <&rtc_0>; |
| 110 | reg = <0x30 4>; |
| 111 | u-boot,env-variable = "bootstatus"; |
| 112 | big-endian; |
| 113 | mode-test = <0x21969147>; |
| 114 | mode-download = <0x51939147>; |
| 115 | }; |
| 116 | |
Simon Glass | ed96cde | 2018-12-10 10:37:33 -0700 | [diff] [blame] | 117 | audio: audio-codec { |
| 118 | compatible = "sandbox,audio-codec"; |
| 119 | #sound-dai-cells = <1>; |
| 120 | }; |
| 121 | |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 122 | buttons { |
| 123 | compatible = "gpio-keys"; |
| 124 | |
Heinrich Schuchardt | 57c2fc6 | 2020-09-14 12:50:54 +0200 | [diff] [blame] | 125 | btn1 { |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 126 | gpios = <&gpio_a 3 0>; |
Heinrich Schuchardt | 57c2fc6 | 2020-09-14 12:50:54 +0200 | [diff] [blame] | 127 | label = "button1"; |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 128 | }; |
| 129 | |
Heinrich Schuchardt | 57c2fc6 | 2020-09-14 12:50:54 +0200 | [diff] [blame] | 130 | btn2 { |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 131 | gpios = <&gpio_a 4 0>; |
Heinrich Schuchardt | 57c2fc6 | 2020-09-14 12:50:54 +0200 | [diff] [blame] | 132 | label = "button2"; |
Philippe Reynes | 1ee2648 | 2020-07-24 18:19:51 +0200 | [diff] [blame] | 133 | }; |
| 134 | }; |
| 135 | |
Marek Szyprowski | ad39859 | 2021-02-18 11:33:18 +0100 | [diff] [blame] | 136 | buttons2 { |
| 137 | compatible = "adc-keys"; |
| 138 | io-channels = <&adc 3>; |
| 139 | keyup-threshold-microvolt = <3000000>; |
| 140 | |
| 141 | button-up { |
| 142 | label = "button3"; |
| 143 | linux,code = <KEY_F3>; |
| 144 | press-threshold-microvolt = <1500000>; |
| 145 | }; |
| 146 | |
| 147 | button-down { |
| 148 | label = "button4"; |
| 149 | linux,code = <KEY_F4>; |
| 150 | press-threshold-microvolt = <1000000>; |
| 151 | }; |
| 152 | |
| 153 | button-enter { |
| 154 | label = "button5"; |
| 155 | linux,code = <KEY_F5>; |
| 156 | press-threshold-microvolt = <500000>; |
| 157 | }; |
| 158 | }; |
| 159 | |
Simon Glass | c953aaf | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 160 | cros_ec: cros-ec { |
Simon Glass | 699c9ca | 2018-10-01 12:22:08 -0600 | [diff] [blame] | 161 | reg = <0 0>; |
| 162 | compatible = "google,cros-ec-sandbox"; |
| 163 | |
| 164 | /* |
| 165 | * This describes the flash memory within the EC. Note |
| 166 | * that the STM32L flash erases to 0, not 0xff. |
| 167 | */ |
| 168 | flash { |
| 169 | image-pos = <0x08000000>; |
| 170 | size = <0x20000>; |
| 171 | erase-value = <0>; |
| 172 | |
| 173 | /* Information for sandbox */ |
| 174 | ro { |
| 175 | image-pos = <0>; |
| 176 | size = <0xf000>; |
| 177 | }; |
| 178 | wp-ro { |
| 179 | image-pos = <0xf000>; |
| 180 | size = <0x1000>; |
Simon Glass | bf0a692 | 2021-01-21 13:57:14 -0700 | [diff] [blame] | 181 | used = <0x884>; |
| 182 | compress = "lz4"; |
| 183 | uncomp-size = <0xcf8>; |
| 184 | hash { |
| 185 | algo = "sha256"; |
| 186 | value = [00 01 02 03 04 05 06 07 |
| 187 | 08 09 0a 0b 0c 0d 0e 0f |
| 188 | 10 11 12 13 14 15 16 17 |
| 189 | 18 19 1a 1b 1c 1d 1e 1f]; |
| 190 | }; |
Simon Glass | 699c9ca | 2018-10-01 12:22:08 -0600 | [diff] [blame] | 191 | }; |
| 192 | rw { |
| 193 | image-pos = <0x10000>; |
| 194 | size = <0x10000>; |
| 195 | }; |
| 196 | }; |
Alper Nebi Yasak | 8a8cd4f | 2021-05-19 19:33:31 +0300 | [diff] [blame] | 197 | |
| 198 | cros_ec_pwm: cros-ec-pwm { |
| 199 | compatible = "google,cros-ec-pwm"; |
| 200 | #pwm-cells = <1>; |
| 201 | }; |
| 202 | |
Simon Glass | 699c9ca | 2018-10-01 12:22:08 -0600 | [diff] [blame] | 203 | }; |
| 204 | |
Yannick Fertré | 9712c82 | 2019-10-07 15:29:05 +0200 | [diff] [blame] | 205 | dsi_host: dsi_host { |
| 206 | compatible = "sandbox,dsi-host"; |
| 207 | }; |
| 208 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 209 | a-test { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 210 | reg = <0 1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 211 | compatible = "denx,u-boot-fdt-test"; |
Simon Glass | a7bb08a | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 212 | ping-expect = <0>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 213 | ping-add = <0>; |
Simon Glass | fef72b7 | 2014-07-23 06:55:03 -0600 | [diff] [blame] | 214 | u-boot,dm-pre-reloc; |
Patrick Delaunay | 23aee61 | 2020-01-13 11:35:13 +0100 | [diff] [blame] | 215 | test-gpios = <&gpio_a 1>, <&gpio_a 4>, |
| 216 | <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>, |
Simon Glass | 16e1040 | 2015-01-05 20:05:29 -0700 | [diff] [blame] | 217 | <0>, <&gpio_a 12>; |
Patrick Delaunay | 23aee61 | 2020-01-13 11:35:13 +0100 | [diff] [blame] | 218 | test2-gpios = <&gpio_a 1>, <&gpio_a 4>, |
| 219 | <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>, |
| 220 | <&gpio_b 7 GPIO_IN 3 2 1>, |
| 221 | <&gpio_b 8 GPIO_OUT 3 2 1>, |
| 222 | <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>; |
Patrick Delaunay | 28bdaa5 | 2020-01-13 11:35:14 +0100 | [diff] [blame] | 223 | test3-gpios = |
| 224 | <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>, |
| 225 | <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>, |
| 226 | <&gpio_c 2 GPIO_OUT>, |
| 227 | <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>, |
| 228 | <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>, |
Neil Armstrong | 643778b | 2020-05-05 10:43:18 +0200 | [diff] [blame] | 229 | <&gpio_c 5 GPIO_IN>, |
| 230 | <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>, |
| 231 | <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>; |
Jean-Jacques Hiblot | 7387340 | 2020-09-11 13:43:35 +0530 | [diff] [blame] | 232 | test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; |
| 233 | test5-gpios = <&gpio_a 19>; |
| 234 | |
Simon Glass | 7302539 | 2021-10-23 17:26:04 -0600 | [diff] [blame] | 235 | bool-value; |
Stefan Herbrechtsmeier | 1b090e6 | 2022-06-14 15:21:30 +0200 | [diff] [blame] | 236 | int8-value = /bits/ 8 <0x12>; |
| 237 | int16-value = /bits/ 16 <0x1234>; |
Simon Glass | 6df01f9 | 2018-12-10 10:37:37 -0700 | [diff] [blame] | 238 | int-value = <1234>; |
| 239 | uint-value = <(-1234)>; |
Dario Binacchi | 421e81e | 2020-03-29 18:04:40 +0200 | [diff] [blame] | 240 | int64-value = /bits/ 64 <0x1111222233334444>; |
Dario Binacchi | 81d80b5 | 2020-03-29 18:04:41 +0200 | [diff] [blame] | 241 | int-array = <5678 9123 4567>; |
Simon Glass | dd0ed90 | 2020-07-07 13:11:58 -0600 | [diff] [blame] | 242 | str-value = "test string"; |
Simon Glass | 515dcff | 2020-02-06 09:55:00 -0700 | [diff] [blame] | 243 | interrupts-extended = <&irq 3 0>; |
Simon Glass | 0964239 | 2020-07-07 13:12:11 -0600 | [diff] [blame] | 244 | acpi,name = "GHIJ"; |
Patrick Delaunay | 8cd2801 | 2020-09-25 09:41:16 +0200 | [diff] [blame] | 245 | phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>; |
Jean-Jacques Hiblot | a94b697 | 2020-10-16 16:16:34 +0530 | [diff] [blame] | 246 | |
| 247 | mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>, |
| 248 | <&muxcontroller0 2>, <&muxcontroller0 3>, |
| 249 | <&muxcontroller1>; |
| 250 | mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4"; |
| 251 | mux-syscon = <&syscon3>; |
Dario Binacchi | 836cc9d | 2020-12-30 00:16:26 +0100 | [diff] [blame] | 252 | display-timings { |
| 253 | timing0: 240x320 { |
| 254 | clock-frequency = <6500000>; |
| 255 | hactive = <240>; |
| 256 | vactive = <320>; |
| 257 | hfront-porch = <6>; |
| 258 | hback-porch = <7>; |
| 259 | hsync-len = <1>; |
| 260 | vback-porch = <5>; |
| 261 | vfront-porch = <8>; |
| 262 | vsync-len = <2>; |
| 263 | hsync-active = <1>; |
| 264 | vsync-active = <0>; |
| 265 | de-active = <1>; |
| 266 | pixelclk-active = <1>; |
| 267 | interlaced; |
| 268 | doublescan; |
| 269 | doubleclk; |
| 270 | }; |
| 271 | timing1: 480x800 { |
| 272 | clock-frequency = <9000000>; |
| 273 | hactive = <480>; |
| 274 | vactive = <800>; |
| 275 | hfront-porch = <10>; |
| 276 | hback-porch = <59>; |
| 277 | hsync-len = <12>; |
| 278 | vback-porch = <15>; |
| 279 | vfront-porch = <17>; |
| 280 | vsync-len = <16>; |
| 281 | hsync-active = <0>; |
| 282 | vsync-active = <1>; |
| 283 | de-active = <0>; |
| 284 | pixelclk-active = <0>; |
| 285 | }; |
| 286 | timing2: 800x480 { |
| 287 | clock-frequency = <33500000>; |
| 288 | hactive = <800>; |
| 289 | vactive = <480>; |
| 290 | hback-porch = <89>; |
| 291 | hfront-porch = <164>; |
| 292 | vback-porch = <23>; |
| 293 | vfront-porch = <10>; |
| 294 | hsync-len = <11>; |
| 295 | vsync-len = <13>; |
| 296 | }; |
| 297 | }; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 298 | }; |
| 299 | |
| 300 | junk { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 301 | reg = <1 1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 302 | compatible = "not,compatible"; |
| 303 | }; |
| 304 | |
| 305 | no-compatible { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 306 | reg = <2 1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 307 | }; |
| 308 | |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 309 | backlight: backlight { |
| 310 | compatible = "pwm-backlight"; |
| 311 | enable-gpios = <&gpio_a 1>; |
| 312 | power-supply = <&ldo_1>; |
| 313 | pwms = <&pwm 0 1000>; |
| 314 | default-brightness-level = <5>; |
| 315 | brightness-levels = <0 16 32 64 128 170 202 234 255>; |
| 316 | }; |
| 317 | |
Jean-Jacques Hiblot | e83a31b | 2018-08-09 16:17:46 +0200 | [diff] [blame] | 318 | bind-test { |
Patrice Chotard | 7b7f939 | 2020-07-28 09:13:33 +0200 | [diff] [blame] | 319 | compatible = "simple-bus"; |
Jean-Jacques Hiblot | e83a31b | 2018-08-09 16:17:46 +0200 | [diff] [blame] | 320 | bind-test-child1 { |
| 321 | compatible = "sandbox,phy"; |
| 322 | #phy-cells = <1>; |
| 323 | }; |
| 324 | |
| 325 | bind-test-child2 { |
| 326 | compatible = "simple-bus"; |
| 327 | }; |
| 328 | }; |
| 329 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 330 | b-test { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 331 | reg = <3 1>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 332 | compatible = "denx,u-boot-fdt-test"; |
Simon Glass | a7bb08a | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 333 | ping-expect = <3>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 334 | ping-add = <3>; |
Jean-Jacques Hiblot | a94b697 | 2020-10-16 16:16:34 +0530 | [diff] [blame] | 335 | |
| 336 | mux-controls = <&muxcontroller0 0>; |
| 337 | mux-control-names = "mux0"; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 338 | }; |
| 339 | |
Jean-Jacques Hiblot | 7e9db02 | 2017-04-24 11:51:28 +0200 | [diff] [blame] | 340 | phy_provider0: gen_phy@0 { |
| 341 | compatible = "sandbox,phy"; |
| 342 | #phy-cells = <1>; |
| 343 | }; |
| 344 | |
| 345 | phy_provider1: gen_phy@1 { |
| 346 | compatible = "sandbox,phy"; |
| 347 | #phy-cells = <0>; |
| 348 | broken; |
| 349 | }; |
| 350 | |
developer | 7109297 | 2020-05-02 11:35:12 +0200 | [diff] [blame] | 351 | phy_provider2: gen_phy@2 { |
| 352 | compatible = "sandbox,phy"; |
| 353 | #phy-cells = <0>; |
| 354 | }; |
| 355 | |
Jean-Jacques Hiblot | 7e9db02 | 2017-04-24 11:51:28 +0200 | [diff] [blame] | 356 | gen_phy_user: gen_phy_user { |
| 357 | compatible = "simple-bus"; |
| 358 | phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>; |
| 359 | phy-names = "phy1", "phy2", "phy3"; |
| 360 | }; |
| 361 | |
developer | 7109297 | 2020-05-02 11:35:12 +0200 | [diff] [blame] | 362 | gen_phy_user1: gen_phy_user1 { |
| 363 | compatible = "simple-bus"; |
| 364 | phys = <&phy_provider0 0>, <&phy_provider2>; |
| 365 | phy-names = "phy1", "phy2"; |
| 366 | }; |
| 367 | |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 368 | some-bus { |
| 369 | #address-cells = <1>; |
| 370 | #size-cells = <0>; |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 371 | compatible = "denx,u-boot-test-bus"; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 372 | reg = <3 1>; |
Simon Glass | a7bb08a | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 373 | ping-expect = <4>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 374 | ping-add = <4>; |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 375 | c-test@5 { |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 376 | compatible = "denx,u-boot-fdt-test"; |
| 377 | reg = <5>; |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 378 | ping-expect = <5>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 379 | ping-add = <5>; |
| 380 | }; |
Simon Glass | 4071742 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 381 | c-test@0 { |
| 382 | compatible = "denx,u-boot-fdt-test"; |
| 383 | reg = <0>; |
| 384 | ping-expect = <6>; |
| 385 | ping-add = <6>; |
| 386 | }; |
| 387 | c-test@1 { |
| 388 | compatible = "denx,u-boot-fdt-test"; |
| 389 | reg = <1>; |
| 390 | ping-expect = <7>; |
| 391 | ping-add = <7>; |
| 392 | }; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 393 | }; |
| 394 | |
| 395 | d-test { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 396 | reg = <3 1>; |
Simon Glass | db6f020 | 2014-07-23 06:55:12 -0600 | [diff] [blame] | 397 | ping-expect = <6>; |
| 398 | ping-add = <6>; |
| 399 | compatible = "google,another-fdt-test"; |
| 400 | }; |
| 401 | |
| 402 | e-test { |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 403 | reg = <3 1>; |
Simon Glass | a7bb08a | 2014-07-23 06:54:57 -0600 | [diff] [blame] | 404 | ping-expect = <6>; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 405 | ping-add = <6>; |
| 406 | compatible = "google,another-fdt-test"; |
| 407 | }; |
| 408 | |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 409 | f-test { |
| 410 | compatible = "denx,u-boot-fdt-test"; |
| 411 | }; |
| 412 | |
| 413 | g-test { |
| 414 | compatible = "denx,u-boot-fdt-test"; |
| 415 | }; |
| 416 | |
Bin Meng | d9d2478 | 2018-10-10 22:07:01 -0700 | [diff] [blame] | 417 | h-test { |
| 418 | compatible = "denx,u-boot-fdt-test1"; |
| 419 | }; |
| 420 | |
developer | cf8bc13 | 2020-05-02 11:35:10 +0200 | [diff] [blame] | 421 | i-test { |
| 422 | compatible = "mediatek,u-boot-fdt-test"; |
| 423 | #address-cells = <1>; |
| 424 | #size-cells = <0>; |
| 425 | |
| 426 | subnode@0 { |
| 427 | reg = <0>; |
| 428 | }; |
| 429 | |
| 430 | subnode@1 { |
| 431 | reg = <1>; |
| 432 | }; |
| 433 | |
| 434 | subnode@2 { |
| 435 | reg = <2>; |
| 436 | }; |
| 437 | }; |
| 438 | |
Simon Glass | 204675c | 2019-12-29 21:19:25 -0700 | [diff] [blame] | 439 | devres-test { |
| 440 | compatible = "denx,u-boot-devres-test"; |
| 441 | }; |
| 442 | |
Jean-Jacques Hiblot | 7387340 | 2020-09-11 13:43:35 +0530 | [diff] [blame] | 443 | another-test { |
| 444 | reg = <0 2>; |
| 445 | compatible = "denx,u-boot-fdt-test"; |
| 446 | test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>; |
| 447 | test5-gpios = <&gpio_a 19>; |
| 448 | }; |
| 449 | |
Nicolas Saenz Julienne | 22b7f7e | 2021-01-12 13:55:23 +0100 | [diff] [blame] | 450 | mmio-bus@0 { |
| 451 | #address-cells = <1>; |
| 452 | #size-cells = <1>; |
| 453 | compatible = "denx,u-boot-test-bus"; |
| 454 | dma-ranges = <0x10000000 0x00000000 0x00040000>; |
| 455 | |
| 456 | subnode@0 { |
| 457 | compatible = "denx,u-boot-fdt-test"; |
| 458 | }; |
| 459 | }; |
| 460 | |
| 461 | mmio-bus@1 { |
| 462 | #address-cells = <1>; |
| 463 | #size-cells = <1>; |
| 464 | compatible = "denx,u-boot-test-bus"; |
Nicolas Saenz Julienne | 892e9b4 | 2021-01-12 13:55:25 +0100 | [diff] [blame] | 465 | |
| 466 | subnode@0 { |
| 467 | compatible = "denx,u-boot-fdt-test"; |
| 468 | }; |
Nicolas Saenz Julienne | 22b7f7e | 2021-01-12 13:55:23 +0100 | [diff] [blame] | 469 | }; |
| 470 | |
Simon Glass | 3c601b1 | 2020-07-07 13:12:06 -0600 | [diff] [blame] | 471 | acpi_test1: acpi-test { |
Simon Glass | 2d67fdf | 2020-04-08 16:57:34 -0600 | [diff] [blame] | 472 | compatible = "denx,u-boot-acpi-test"; |
Simon Glass | d43e0ba | 2020-07-07 13:12:03 -0600 | [diff] [blame] | 473 | acpi-ssdt-test-data = "ab"; |
Simon Glass | 990cd5b | 2020-07-07 13:12:08 -0600 | [diff] [blame] | 474 | acpi-dsdt-test-data = "hi"; |
Simon Glass | ebb2e83 | 2020-07-07 13:11:39 -0600 | [diff] [blame] | 475 | child { |
| 476 | compatible = "denx,u-boot-acpi-test"; |
| 477 | }; |
Simon Glass | 2d67fdf | 2020-04-08 16:57:34 -0600 | [diff] [blame] | 478 | }; |
| 479 | |
Simon Glass | 3c601b1 | 2020-07-07 13:12:06 -0600 | [diff] [blame] | 480 | acpi_test2: acpi-test2 { |
Simon Glass | 17968c3 | 2020-04-26 09:19:46 -0600 | [diff] [blame] | 481 | compatible = "denx,u-boot-acpi-test"; |
Simon Glass | d43e0ba | 2020-07-07 13:12:03 -0600 | [diff] [blame] | 482 | acpi-ssdt-test-data = "cd"; |
Simon Glass | 990cd5b | 2020-07-07 13:12:08 -0600 | [diff] [blame] | 483 | acpi-dsdt-test-data = "jk"; |
Simon Glass | 17968c3 | 2020-04-26 09:19:46 -0600 | [diff] [blame] | 484 | }; |
| 485 | |
Patrice Chotard | 9cc2d14 | 2017-09-04 14:55:57 +0200 | [diff] [blame] | 486 | clocks { |
| 487 | clk_fixed: clk-fixed { |
| 488 | compatible = "fixed-clock"; |
| 489 | #clock-cells = <0>; |
| 490 | clock-frequency = <1234>; |
| 491 | }; |
Anup Patel | 8d28c3c | 2019-02-25 08:14:55 +0000 | [diff] [blame] | 492 | |
| 493 | clk_fixed_factor: clk-fixed-factor { |
| 494 | compatible = "fixed-factor-clock"; |
| 495 | #clock-cells = <0>; |
| 496 | clock-div = <3>; |
| 497 | clock-mult = <2>; |
| 498 | clocks = <&clk_fixed>; |
| 499 | }; |
Lukasz Majewski | ccafcdd | 2019-06-24 15:50:47 +0200 | [diff] [blame] | 500 | |
| 501 | osc { |
| 502 | compatible = "fixed-clock"; |
| 503 | #clock-cells = <0>; |
| 504 | clock-frequency = <20000000>; |
| 505 | }; |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 506 | }; |
| 507 | |
| 508 | clk_sandbox: clk-sbox { |
Simon Glass | 8cc4d82 | 2015-07-06 12:54:24 -0600 | [diff] [blame] | 509 | compatible = "sandbox,clk"; |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 510 | #clock-cells = <1>; |
Jean-Jacques Hiblot | c1e9c94 | 2019-10-22 14:00:07 +0200 | [diff] [blame] | 511 | assigned-clocks = <&clk_sandbox 3>; |
| 512 | assigned-clock-rates = <321>; |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 513 | }; |
| 514 | |
| 515 | clk-test { |
| 516 | compatible = "sandbox,clk-test"; |
| 517 | clocks = <&clk_fixed>, |
| 518 | <&clk_sandbox 1>, |
Jean-Jacques Hiblot | 98e8418 | 2019-10-22 14:00:05 +0200 | [diff] [blame] | 519 | <&clk_sandbox 0>, |
| 520 | <&clk_sandbox 3>, |
| 521 | <&clk_sandbox 2>; |
| 522 | clock-names = "fixed", "i2c", "spi", "uart2", "uart1"; |
Simon Glass | 8cc4d82 | 2015-07-06 12:54:24 -0600 | [diff] [blame] | 523 | }; |
| 524 | |
Lukasz Majewski | 8c0709b | 2019-06-24 15:50:50 +0200 | [diff] [blame] | 525 | ccf: clk-ccf { |
| 526 | compatible = "sandbox,clk-ccf"; |
| 527 | }; |
| 528 | |
Simon Glass | 507ab96 | 2021-12-04 08:56:31 -0700 | [diff] [blame] | 529 | efi-media { |
| 530 | compatible = "sandbox,efi-media"; |
| 531 | }; |
| 532 | |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 533 | eth@10002000 { |
| 534 | compatible = "sandbox,eth"; |
| 535 | reg = <0x10002000 0x1000>; |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 536 | }; |
| 537 | |
| 538 | eth_5: eth@10003000 { |
| 539 | compatible = "sandbox,eth"; |
| 540 | reg = <0x10003000 0x1000>; |
Sean Anderson | 13652b8 | 2022-05-05 13:11:44 -0400 | [diff] [blame] | 541 | nvmem-cells = <ð5_addr>; |
| 542 | nvmem-cell-names = "mac-address"; |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 543 | }; |
| 544 | |
Bin Meng | 04a11cb | 2015-08-27 22:25:53 -0700 | [diff] [blame] | 545 | eth_3: sbe5 { |
| 546 | compatible = "sandbox,eth"; |
| 547 | reg = <0x10005000 0x1000>; |
Sean Anderson | e2dc0e6 | 2022-05-05 13:11:42 -0400 | [diff] [blame] | 548 | nvmem-cells = <ð3_addr>; |
| 549 | nvmem-cell-names = "mac-address"; |
Bin Meng | 04a11cb | 2015-08-27 22:25:53 -0700 | [diff] [blame] | 550 | }; |
| 551 | |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 552 | eth@10004000 { |
| 553 | compatible = "sandbox,eth"; |
| 554 | reg = <0x10004000 0x1000>; |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 555 | }; |
| 556 | |
Marek BehĂșn | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 557 | phy_eth0: phy-test-eth { |
| 558 | compatible = "sandbox,eth"; |
| 559 | reg = <0x10007000 0x1000>; |
Sean Anderson | 24b1b8d | 2022-05-05 13:11:35 -0400 | [diff] [blame] | 560 | mac-address = [ 02 00 11 22 33 49 ]; |
Marek BehĂșn | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 561 | phy-handle = <ðphy1>; |
Marek BehĂșn | bc19477 | 2022-04-07 00:33:01 +0200 | [diff] [blame] | 562 | phy-mode = "2500base-x"; |
Marek BehĂșn | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 563 | }; |
| 564 | |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 565 | dsa_eth0: dsa-test-eth { |
| 566 | compatible = "sandbox,eth"; |
| 567 | reg = <0x10006000 0x1000>; |
Sean Anderson | 5768e8b | 2022-05-05 13:11:43 -0400 | [diff] [blame] | 568 | nvmem-cells = <ð4_addr>; |
| 569 | nvmem-cell-names = "mac-address"; |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 570 | }; |
| 571 | |
| 572 | dsa-test { |
| 573 | compatible = "sandbox,dsa"; |
| 574 | |
| 575 | ports { |
| 576 | #address-cells = <1>; |
| 577 | #size-cells = <0>; |
| 578 | swp_0: port@0 { |
| 579 | reg = <0>; |
| 580 | label = "lan0"; |
| 581 | phy-mode = "rgmii-rxid"; |
| 582 | |
| 583 | fixed-link { |
| 584 | speed = <100>; |
| 585 | full-duplex; |
| 586 | }; |
| 587 | }; |
| 588 | |
| 589 | swp_1: port@1 { |
| 590 | reg = <1>; |
| 591 | label = "lan1"; |
| 592 | phy-mode = "rgmii-txid"; |
Bin Meng | 381ed97 | 2021-03-14 20:14:58 +0800 | [diff] [blame] | 593 | fixed-link = <0 1 100 0 0>; |
Claudiu Manoil | d9eaa92 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 594 | }; |
| 595 | |
| 596 | port@2 { |
| 597 | reg = <2>; |
| 598 | ethernet = <&dsa_eth0>; |
| 599 | |
| 600 | fixed-link { |
| 601 | speed = <1000>; |
| 602 | full-duplex; |
| 603 | }; |
| 604 | }; |
| 605 | }; |
| 606 | }; |
| 607 | |
Rajan Vaja | b3b2ddb | 2018-09-19 03:43:46 -0700 | [diff] [blame] | 608 | firmware { |
| 609 | sandbox_firmware: sandbox-firmware { |
| 610 | compatible = "sandbox,firmware"; |
| 611 | }; |
Etienne Carriere | 02fd126 | 2020-09-09 18:44:00 +0200 | [diff] [blame] | 612 | |
Etienne Carriere | 09665cb | 2022-02-21 09:22:39 +0100 | [diff] [blame] | 613 | scmi { |
Etienne Carriere | 02fd126 | 2020-09-09 18:44:00 +0200 | [diff] [blame] | 614 | compatible = "sandbox,scmi-agent"; |
| 615 | #address-cells = <1>; |
| 616 | #size-cells = <0>; |
Etienne Carriere | 2d94c08fa | 2020-09-09 18:44:05 +0200 | [diff] [blame] | 617 | |
Etienne Carriere | 09665cb | 2022-02-21 09:22:39 +0100 | [diff] [blame] | 618 | protocol@10 { |
| 619 | reg = <0x10>; |
| 620 | }; |
| 621 | |
| 622 | clk_scmi: protocol@14 { |
Etienne Carriere | 2d94c08fa | 2020-09-09 18:44:05 +0200 | [diff] [blame] | 623 | reg = <0x14>; |
| 624 | #clock-cells = <1>; |
| 625 | }; |
Etienne Carriere | 8b9b689 | 2020-09-09 18:44:07 +0200 | [diff] [blame] | 626 | |
Etienne Carriere | 09665cb | 2022-02-21 09:22:39 +0100 | [diff] [blame] | 627 | reset_scmi: protocol@16 { |
Etienne Carriere | 8b9b689 | 2020-09-09 18:44:07 +0200 | [diff] [blame] | 628 | reg = <0x16>; |
| 629 | #reset-cells = <1>; |
| 630 | }; |
Etienne Carriere | b8f15cd | 2021-03-08 22:38:07 +0100 | [diff] [blame] | 631 | |
| 632 | protocol@17 { |
| 633 | reg = <0x17>; |
| 634 | |
| 635 | regulators { |
| 636 | #address-cells = <1>; |
| 637 | #size-cells = <0>; |
| 638 | |
Etienne Carriere | 09665cb | 2022-02-21 09:22:39 +0100 | [diff] [blame] | 639 | regul0_scmi: reg@0 { |
Etienne Carriere | b8f15cd | 2021-03-08 22:38:07 +0100 | [diff] [blame] | 640 | reg = <0>; |
| 641 | regulator-name = "sandbox-voltd0"; |
| 642 | regulator-min-microvolt = <1100000>; |
| 643 | regulator-max-microvolt = <3300000>; |
| 644 | }; |
Etienne Carriere | 09665cb | 2022-02-21 09:22:39 +0100 | [diff] [blame] | 645 | regul1_scmi: reg@1 { |
Etienne Carriere | b8f15cd | 2021-03-08 22:38:07 +0100 | [diff] [blame] | 646 | reg = <0x1>; |
| 647 | regulator-name = "sandbox-voltd1"; |
| 648 | regulator-min-microvolt = <1800000>; |
| 649 | }; |
| 650 | }; |
| 651 | }; |
Etienne Carriere | 02fd126 | 2020-09-09 18:44:00 +0200 | [diff] [blame] | 652 | }; |
Rajan Vaja | b3b2ddb | 2018-09-19 03:43:46 -0700 | [diff] [blame] | 653 | }; |
| 654 | |
Alexander Dahl | 6ac319d | 2022-09-30 14:04:30 +0200 | [diff] [blame] | 655 | fpga { |
| 656 | compatible = "sandbox,fpga"; |
| 657 | }; |
| 658 | |
Patrick Delaunay | 1b4a22f | 2020-01-13 11:35:15 +0100 | [diff] [blame] | 659 | pinctrl-gpio { |
| 660 | compatible = "sandbox,pinctrl-gpio"; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 661 | |
Patrick Delaunay | 1b4a22f | 2020-01-13 11:35:15 +0100 | [diff] [blame] | 662 | gpio_a: base-gpios { |
| 663 | compatible = "sandbox,gpio"; |
| 664 | gpio-controller; |
| 665 | #gpio-cells = <1>; |
| 666 | gpio-bank-name = "a"; |
| 667 | sandbox,gpio-count = <20>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 668 | hog_input_active_low { |
| 669 | gpio-hog; |
| 670 | input; |
Philippe Reynes | b25a5b3 | 2020-07-24 15:51:53 +0200 | [diff] [blame] | 671 | gpios = <10 GPIO_ACTIVE_LOW>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 672 | }; |
| 673 | hog_input_active_high { |
| 674 | gpio-hog; |
| 675 | input; |
Philippe Reynes | b25a5b3 | 2020-07-24 15:51:53 +0200 | [diff] [blame] | 676 | gpios = <11 GPIO_ACTIVE_HIGH>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 677 | }; |
| 678 | hog_output_low { |
| 679 | gpio-hog; |
| 680 | output-low; |
Philippe Reynes | b25a5b3 | 2020-07-24 15:51:53 +0200 | [diff] [blame] | 681 | gpios = <12 GPIO_ACTIVE_HIGH>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 682 | }; |
| 683 | hog_output_high { |
| 684 | gpio-hog; |
| 685 | output-high; |
Philippe Reynes | b25a5b3 | 2020-07-24 15:51:53 +0200 | [diff] [blame] | 686 | gpios = <13 GPIO_ACTIVE_HIGH>; |
Heiko Schocher | 4508abf | 2020-05-22 11:08:58 +0200 | [diff] [blame] | 687 | }; |
Patrick Delaunay | 1b4a22f | 2020-01-13 11:35:15 +0100 | [diff] [blame] | 688 | }; |
| 689 | |
| 690 | gpio_b: extra-gpios { |
| 691 | compatible = "sandbox,gpio"; |
| 692 | gpio-controller; |
| 693 | #gpio-cells = <5>; |
| 694 | gpio-bank-name = "b"; |
| 695 | sandbox,gpio-count = <10>; |
| 696 | }; |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 697 | |
Patrick Delaunay | 1b4a22f | 2020-01-13 11:35:15 +0100 | [diff] [blame] | 698 | gpio_c: pinmux-gpios { |
| 699 | compatible = "sandbox,gpio"; |
| 700 | gpio-controller; |
| 701 | #gpio-cells = <2>; |
| 702 | gpio-bank-name = "c"; |
| 703 | sandbox,gpio-count = <10>; |
| 704 | }; |
Patrick Delaunay | 28bdaa5 | 2020-01-13 11:35:14 +0100 | [diff] [blame] | 705 | }; |
| 706 | |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 707 | i2c@0 { |
| 708 | #address-cells = <1>; |
| 709 | #size-cells = <0>; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 710 | reg = <0 1>; |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 711 | compatible = "sandbox,i2c"; |
| 712 | clock-frequency = <100000>; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 713 | pinctrl-names = "default"; |
| 714 | pinctrl-0 = <&pinmux_i2c0_pins>; |
| 715 | |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 716 | eeprom@2c { |
Sean Anderson | e2dc0e6 | 2022-05-05 13:11:42 -0400 | [diff] [blame] | 717 | #address-cells = <1>; |
| 718 | #size-cells = <1>; |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 719 | reg = <0x2c>; |
| 720 | compatible = "i2c-eeprom"; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 721 | sandbox,emul = <&emul_eeprom>; |
Michal Simek | 4f18f92 | 2020-05-28 11:48:55 +0200 | [diff] [blame] | 722 | partitions { |
| 723 | compatible = "fixed-partitions"; |
| 724 | #address-cells = <1>; |
| 725 | #size-cells = <1>; |
| 726 | bootcount_i2c: bootcount@10 { |
| 727 | reg = <10 2>; |
| 728 | }; |
| 729 | }; |
Sean Anderson | e2dc0e6 | 2022-05-05 13:11:42 -0400 | [diff] [blame] | 730 | |
| 731 | eth3_addr: mac-address@24 { |
| 732 | reg = <24 6>; |
| 733 | }; |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 734 | }; |
Przemyslaw Marczak | 77bee05 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 735 | |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 736 | rtc_0: rtc@43 { |
Sean Anderson | 5768e8b | 2022-05-05 13:11:43 -0400 | [diff] [blame] | 737 | #address-cells = <1>; |
| 738 | #size-cells = <1>; |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 739 | reg = <0x43>; |
| 740 | compatible = "sandbox-rtc"; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 741 | sandbox,emul = <&emul0>; |
Sean Anderson | 5768e8b | 2022-05-05 13:11:43 -0400 | [diff] [blame] | 742 | |
| 743 | eth4_addr: mac-address@40 { |
| 744 | reg = <0x40 6>; |
| 745 | }; |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 746 | }; |
| 747 | |
| 748 | rtc_1: rtc@61 { |
| 749 | reg = <0x61>; |
| 750 | compatible = "sandbox-rtc"; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 751 | sandbox,emul = <&emul1>; |
| 752 | }; |
| 753 | |
| 754 | i2c_emul: emul { |
| 755 | reg = <0xff>; |
| 756 | compatible = "sandbox,i2c-emul-parent"; |
| 757 | emul_eeprom: emul-eeprom { |
| 758 | compatible = "sandbox,i2c-eeprom"; |
| 759 | sandbox,filename = "i2c.bin"; |
| 760 | sandbox,size = <256>; |
| 761 | }; |
| 762 | emul0: emul0 { |
Simon Glass | 98af374 | 2021-02-03 06:01:17 -0700 | [diff] [blame] | 763 | compatible = "sandbox,i2c-rtc-emul"; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 764 | }; |
| 765 | emul1: emull { |
Simon Glass | 98af374 | 2021-02-03 06:01:17 -0700 | [diff] [blame] | 766 | compatible = "sandbox,i2c-rtc-emul"; |
Simon Glass | 336b295 | 2015-05-22 15:42:17 -0600 | [diff] [blame] | 767 | }; |
| 768 | }; |
| 769 | |
Przemyslaw Marczak | 77bee05 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 770 | sandbox_pmic: sandbox_pmic { |
| 771 | reg = <0x40>; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 772 | sandbox,emul = <&emul_pmic0>; |
Przemyslaw Marczak | 77bee05 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 773 | }; |
Lukasz Majewski | a4d8297 | 2018-05-15 16:26:40 +0200 | [diff] [blame] | 774 | |
| 775 | mc34708: pmic@41 { |
| 776 | reg = <0x41>; |
Simon Glass | 17b56f6 | 2018-11-18 08:14:34 -0700 | [diff] [blame] | 777 | sandbox,emul = <&emul_pmic1>; |
Lukasz Majewski | a4d8297 | 2018-05-15 16:26:40 +0200 | [diff] [blame] | 778 | }; |
Simon Glass | 7df766e | 2014-12-10 08:55:55 -0700 | [diff] [blame] | 779 | }; |
| 780 | |
Philipp Tomsich | 1fc5330 | 2018-12-14 21:14:29 +0100 | [diff] [blame] | 781 | bootcount@0 { |
| 782 | compatible = "u-boot,bootcount-rtc"; |
| 783 | rtc = <&rtc_1>; |
| 784 | offset = <0x13>; |
| 785 | }; |
| 786 | |
Michal Simek | 4f18f92 | 2020-05-28 11:48:55 +0200 | [diff] [blame] | 787 | bootcount { |
| 788 | compatible = "u-boot,bootcount-i2c-eeprom"; |
| 789 | i2c-eeprom = <&bootcount_i2c>; |
| 790 | }; |
| 791 | |
Nandor Han | 8889581 | 2021-06-10 15:40:38 +0300 | [diff] [blame] | 792 | bootcount_4@0 { |
| 793 | compatible = "u-boot,bootcount-syscon"; |
| 794 | syscon = <&syscon0>; |
| 795 | reg = <0x0 0x04>, <0x0 0x04>; |
| 796 | reg-names = "syscon_reg", "offset"; |
| 797 | }; |
| 798 | |
| 799 | bootcount_2@0 { |
| 800 | compatible = "u-boot,bootcount-syscon"; |
| 801 | syscon = <&syscon0>; |
| 802 | reg = <0x0 0x04>, <0x0 0x02> ; |
| 803 | reg-names = "syscon_reg", "offset"; |
| 804 | }; |
| 805 | |
Marek Szyprowski | ad39859 | 2021-02-18 11:33:18 +0100 | [diff] [blame] | 806 | adc: adc@0 { |
Przemyslaw Marczak | 1bc7f23 | 2015-10-27 13:08:06 +0100 | [diff] [blame] | 807 | compatible = "sandbox,adc"; |
Marek Szyprowski | ad39859 | 2021-02-18 11:33:18 +0100 | [diff] [blame] | 808 | #io-channel-cells = <1>; |
Przemyslaw Marczak | 1bc7f23 | 2015-10-27 13:08:06 +0100 | [diff] [blame] | 809 | vdd-supply = <&buck2>; |
| 810 | vss-microvolts = <0>; |
| 811 | }; |
| 812 | |
Mark Kettenis | 67748ee | 2021-10-23 16:58:02 +0200 | [diff] [blame] | 813 | iommu: iommu@0 { |
| 814 | compatible = "sandbox,iommu"; |
| 815 | #iommu-cells = <0>; |
| 816 | }; |
| 817 | |
Simon Glass | 515dcff | 2020-02-06 09:55:00 -0700 | [diff] [blame] | 818 | irq: irq { |
Simon Glass | 54028bc | 2019-12-06 21:41:59 -0700 | [diff] [blame] | 819 | compatible = "sandbox,irq"; |
Simon Glass | 515dcff | 2020-02-06 09:55:00 -0700 | [diff] [blame] | 820 | interrupt-controller; |
| 821 | #interrupt-cells = <2>; |
Simon Glass | 54028bc | 2019-12-06 21:41:59 -0700 | [diff] [blame] | 822 | }; |
| 823 | |
Simon Glass | 90b6fef | 2016-01-18 19:52:26 -0700 | [diff] [blame] | 824 | lcd { |
| 825 | u-boot,dm-pre-reloc; |
| 826 | compatible = "sandbox,lcd-sdl"; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 827 | pinctrl-names = "default"; |
| 828 | pinctrl-0 = <&pinmux_lcd_pins>; |
Simon Glass | 90b6fef | 2016-01-18 19:52:26 -0700 | [diff] [blame] | 829 | xres = <1366>; |
| 830 | yres = <768>; |
| 831 | }; |
| 832 | |
Simon Glass | d783eb3 | 2015-07-06 12:54:34 -0600 | [diff] [blame] | 833 | leds { |
| 834 | compatible = "gpio-leds"; |
| 835 | |
| 836 | iracibble { |
| 837 | gpios = <&gpio_a 1 0>; |
| 838 | label = "sandbox:red"; |
| 839 | }; |
| 840 | |
| 841 | martinet { |
| 842 | gpios = <&gpio_a 2 0>; |
| 843 | label = "sandbox:green"; |
| 844 | }; |
Patrick Bruenn | b58adfe | 2018-04-11 11:16:29 +0200 | [diff] [blame] | 845 | |
| 846 | default_on { |
| 847 | gpios = <&gpio_a 5 0>; |
| 848 | label = "sandbox:default_on"; |
| 849 | default-state = "on"; |
| 850 | }; |
| 851 | |
| 852 | default_off { |
| 853 | gpios = <&gpio_a 6 0>; |
Sean Anderson | fbf8d65 | 2020-09-14 11:02:03 -0400 | [diff] [blame] | 854 | /* label intentionally omitted */ |
Patrick Bruenn | b58adfe | 2018-04-11 11:16:29 +0200 | [diff] [blame] | 855 | default-state = "off"; |
| 856 | }; |
Simon Glass | d783eb3 | 2015-07-06 12:54:34 -0600 | [diff] [blame] | 857 | }; |
| 858 | |
Paul Doelle | 709f037 | 2022-07-04 09:00:25 +0000 | [diff] [blame] | 859 | wdt-gpio-toggle { |
Rasmus Villemoes | 2b67387 | 2021-08-19 11:57:05 +0200 | [diff] [blame] | 860 | gpios = <&gpio_a 7 0>; |
| 861 | compatible = "linux,wdt-gpio"; |
Rasmus Villemoes | f91ff5a | 2021-08-19 11:57:06 +0200 | [diff] [blame] | 862 | hw_margin_ms = <100>; |
Paul Doelle | 709f037 | 2022-07-04 09:00:25 +0000 | [diff] [blame] | 863 | hw_algo = "toggle"; |
| 864 | always-running; |
| 865 | }; |
| 866 | |
| 867 | wdt-gpio-level { |
| 868 | gpios = <&gpio_a 7 0>; |
| 869 | compatible = "linux,wdt-gpio"; |
| 870 | hw_margin_ms = <100>; |
| 871 | hw_algo = "level"; |
Rasmus Villemoes | 2b67387 | 2021-08-19 11:57:05 +0200 | [diff] [blame] | 872 | always-running; |
| 873 | }; |
| 874 | |
Stephen Warren | 62f2c90 | 2016-05-16 17:41:37 -0600 | [diff] [blame] | 875 | mbox: mbox { |
| 876 | compatible = "sandbox,mbox"; |
| 877 | #mbox-cells = <1>; |
| 878 | }; |
| 879 | |
| 880 | mbox-test { |
| 881 | compatible = "sandbox,mbox-test"; |
| 882 | mboxes = <&mbox 100>, <&mbox 1>; |
| 883 | mbox-names = "other", "test"; |
| 884 | }; |
| 885 | |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 886 | cpus { |
Heinrich Schuchardt | 20f9d3d | 2021-08-28 11:42:08 +0200 | [diff] [blame] | 887 | #address-cells = <1>; |
| 888 | #size-cells = <0>; |
Sean Anderson | 79d3bba | 2020-09-28 10:52:23 -0400 | [diff] [blame] | 889 | timebase-frequency = <2000000>; |
Heinrich Schuchardt | 20f9d3d | 2021-08-28 11:42:08 +0200 | [diff] [blame] | 890 | cpu1: cpu@1 { |
| 891 | device_type = "cpu"; |
| 892 | reg = <0x1>; |
Sean Anderson | 79d3bba | 2020-09-28 10:52:23 -0400 | [diff] [blame] | 893 | timebase-frequency = <3000000>; |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 894 | compatible = "sandbox,cpu_sandbox"; |
| 895 | u-boot,dm-pre-reloc; |
| 896 | }; |
Mario Six | dea5df7 | 2018-08-06 10:23:44 +0200 | [diff] [blame] | 897 | |
Heinrich Schuchardt | 20f9d3d | 2021-08-28 11:42:08 +0200 | [diff] [blame] | 898 | cpu2: cpu@2 { |
| 899 | device_type = "cpu"; |
| 900 | reg = <0x2>; |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 901 | compatible = "sandbox,cpu_sandbox"; |
| 902 | u-boot,dm-pre-reloc; |
| 903 | }; |
Mario Six | dea5df7 | 2018-08-06 10:23:44 +0200 | [diff] [blame] | 904 | |
Heinrich Schuchardt | 20f9d3d | 2021-08-28 11:42:08 +0200 | [diff] [blame] | 905 | cpu3: cpu@3 { |
| 906 | device_type = "cpu"; |
| 907 | reg = <0x3>; |
AKASHI Takahiro | 8fb963a | 2019-08-27 17:17:03 +0900 | [diff] [blame] | 908 | compatible = "sandbox,cpu_sandbox"; |
| 909 | u-boot,dm-pre-reloc; |
| 910 | }; |
Mario Six | dea5df7 | 2018-08-06 10:23:44 +0200 | [diff] [blame] | 911 | }; |
| 912 | |
Dave Gerlach | 75dbdfc | 2020-07-15 23:39:58 -0500 | [diff] [blame] | 913 | chipid: chipid { |
| 914 | compatible = "sandbox,soc"; |
| 915 | }; |
| 916 | |
Simon Glass | c953aaf | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 917 | i2s: i2s { |
| 918 | compatible = "sandbox,i2s"; |
| 919 | #sound-dai-cells = <1>; |
Simon Glass | 4d5814c | 2019-02-16 20:24:56 -0700 | [diff] [blame] | 920 | sandbox,silent; /* Don't emit sounds while testing */ |
Simon Glass | c953aaf | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 921 | }; |
| 922 | |
Jean-Jacques Hiblot | db97c7f | 2019-07-05 09:33:57 +0200 | [diff] [blame] | 923 | nop-test_0 { |
| 924 | compatible = "sandbox,nop_sandbox1"; |
| 925 | nop-test_1 { |
| 926 | compatible = "sandbox,nop_sandbox2"; |
| 927 | bind = "True"; |
| 928 | }; |
| 929 | nop-test_2 { |
| 930 | compatible = "sandbox,nop_sandbox2"; |
| 931 | bind = "False"; |
| 932 | }; |
| 933 | }; |
| 934 | |
Mario Six | a8ce0ee | 2018-07-31 14:24:14 +0200 | [diff] [blame] | 935 | misc-test { |
Sean Anderson | 13652b8 | 2022-05-05 13:11:44 -0400 | [diff] [blame] | 936 | #address-cells = <1>; |
| 937 | #size-cells = <1>; |
Mario Six | a8ce0ee | 2018-07-31 14:24:14 +0200 | [diff] [blame] | 938 | compatible = "sandbox,misc_sandbox"; |
Sean Anderson | 13652b8 | 2022-05-05 13:11:44 -0400 | [diff] [blame] | 939 | |
| 940 | eth5_addr: mac-address@10 { |
| 941 | reg = <0x10 6>; |
| 942 | }; |
Mario Six | a8ce0ee | 2018-07-31 14:24:14 +0200 | [diff] [blame] | 943 | }; |
| 944 | |
Simon Glass | e4fef74 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 945 | mmc2 { |
| 946 | compatible = "sandbox,mmc"; |
Simon Glass | 965cd40 | 2021-07-05 16:32:58 -0600 | [diff] [blame] | 947 | non-removable; |
Simon Glass | e4fef74 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 948 | }; |
| 949 | |
Simon Glass | b255efc | 2022-04-24 23:31:24 -0600 | [diff] [blame] | 950 | /* This is used for the bootdev tests */ |
Simon Glass | e4fef74 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 951 | mmc1 { |
| 952 | compatible = "sandbox,mmc"; |
Simon Glass | b255efc | 2022-04-24 23:31:24 -0600 | [diff] [blame] | 953 | filename = "mmc1.img"; |
Simon Glass | e4fef74 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 954 | }; |
| 955 | |
Simon Glass | b255efc | 2022-04-24 23:31:24 -0600 | [diff] [blame] | 956 | /* This is used for the fastboot tests */ |
Simon Glass | e4fef74 | 2017-04-23 20:02:07 -0600 | [diff] [blame] | 957 | mmc0 { |
Simon Glass | d3e58e4 | 2015-07-06 12:54:32 -0600 | [diff] [blame] | 958 | compatible = "sandbox,mmc"; |
| 959 | }; |
| 960 | |
Simon Glass | 53a68b3 | 2019-02-16 20:24:50 -0700 | [diff] [blame] | 961 | pch { |
| 962 | compatible = "sandbox,pch"; |
| 963 | }; |
| 964 | |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 965 | pci0: pci@0 { |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 966 | compatible = "sandbox,pci"; |
| 967 | device_type = "pci"; |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 968 | bus-range = <0x00 0xff>; |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 969 | #address-cells = <3>; |
| 970 | #size-cells = <2>; |
Simon Glass | 35464f7 | 2019-09-25 08:56:08 -0600 | [diff] [blame] | 971 | ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000 |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 972 | 0x01000000 0 0x20000000 0x20000000 0 0x2000>; |
Bin Meng | cbf071b | 2018-08-03 01:14:39 -0700 | [diff] [blame] | 973 | pci@0,0 { |
| 974 | compatible = "pci-generic"; |
| 975 | reg = <0x0000 0 0 0 0>; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 976 | sandbox,emul = <&swap_case_emul0_0>; |
Bin Meng | cbf071b | 2018-08-03 01:14:39 -0700 | [diff] [blame] | 977 | }; |
Alex Marginean | f127443 | 2019-06-07 11:24:24 +0300 | [diff] [blame] | 978 | pci@1,0 { |
| 979 | compatible = "pci-generic"; |
Simon Glass | 23b2759 | 2019-09-15 12:08:58 -0600 | [diff] [blame] | 980 | /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */ |
| 981 | reg = <0x02000814 0 0 0 0 |
| 982 | 0x01000810 0 0 0 0>; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 983 | sandbox,emul = <&swap_case_emul0_1>; |
Alex Marginean | f127443 | 2019-06-07 11:24:24 +0300 | [diff] [blame] | 984 | }; |
Simon Glass | 937bb47 | 2019-12-06 21:41:57 -0700 | [diff] [blame] | 985 | p2sb-pci@2,0 { |
| 986 | compatible = "sandbox,p2sb"; |
| 987 | reg = <0x02001010 0 0 0 0>; |
| 988 | sandbox,emul = <&p2sb_emul>; |
| 989 | |
| 990 | adder { |
| 991 | intel,p2sb-port-id = <3>; |
| 992 | compatible = "sandbox,adder"; |
| 993 | }; |
| 994 | }; |
Simon Glass | 8c50102 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 995 | pci@1e,0 { |
| 996 | compatible = "sandbox,pmc"; |
| 997 | reg = <0xf000 0 0 0 0>; |
| 998 | sandbox,emul = <&pmc_emul1e>; |
| 999 | acpi-base = <0x400>; |
| 1000 | gpe0-dwx-mask = <0xf>; |
| 1001 | gpe0-dwx-shift-base = <4>; |
| 1002 | gpe0-dw = <6 7 9>; |
| 1003 | gpe0-sts = <0x20>; |
| 1004 | gpe0-en = <0x30>; |
| 1005 | }; |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 1006 | pci@1f,0 { |
| 1007 | compatible = "pci-generic"; |
Simon Glass | 23b2759 | 2019-09-15 12:08:58 -0600 | [diff] [blame] | 1008 | /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */ |
| 1009 | reg = <0x0100f810 0 0 0 0>; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 1010 | sandbox,emul = <&swap_case_emul0_1f>; |
Simon Glass | 3a6eae6 | 2015-03-05 12:25:34 -0700 | [diff] [blame] | 1011 | }; |
| 1012 | }; |
| 1013 | |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 1014 | pci-emul0 { |
| 1015 | compatible = "sandbox,pci-emul-parent"; |
| 1016 | swap_case_emul0_0: emul0@0,0 { |
| 1017 | compatible = "sandbox,swap-case"; |
| 1018 | }; |
| 1019 | swap_case_emul0_1: emul0@1,0 { |
| 1020 | compatible = "sandbox,swap-case"; |
| 1021 | use-ea; |
| 1022 | }; |
| 1023 | swap_case_emul0_1f: emul0@1f,0 { |
| 1024 | compatible = "sandbox,swap-case"; |
| 1025 | }; |
Simon Glass | 937bb47 | 2019-12-06 21:41:57 -0700 | [diff] [blame] | 1026 | p2sb_emul: emul@2,0 { |
| 1027 | compatible = "sandbox,p2sb-emul"; |
| 1028 | }; |
Simon Glass | 8c50102 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 1029 | pmc_emul1e: emul@1e,0 { |
| 1030 | compatible = "sandbox,pmc-emul"; |
| 1031 | }; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 1032 | }; |
| 1033 | |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 1034 | pci1: pci@1 { |
Bin Meng | 408e590 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 1035 | compatible = "sandbox,pci"; |
| 1036 | device_type = "pci"; |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 1037 | bus-range = <0x00 0xff>; |
Bin Meng | 408e590 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 1038 | #address-cells = <3>; |
| 1039 | #size-cells = <2>; |
Suneel Garapati | 3ac3aec | 2019-10-19 17:10:20 -0700 | [diff] [blame] | 1040 | ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0 |
Andrew Scull | c7456a4 | 2022-04-21 16:11:09 +0000 | [diff] [blame] | 1041 | 0x02000000 0 0x31000000 0x3e000000 0 0x2000 // MEM1 |
Suneel Garapati | 3ac3aec | 2019-10-19 17:10:20 -0700 | [diff] [blame] | 1042 | 0x01000000 0 0x40000000 0x40000000 0 0x2000>; |
Bin Meng | 5fed536 | 2018-08-03 01:14:47 -0700 | [diff] [blame] | 1043 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678 |
Marek Vasut | e573322 | 2018-10-10 21:27:08 +0200 | [diff] [blame] | 1044 | 0x0c 0x00 0x1234 0x5678 |
| 1045 | 0x10 0x00 0x1234 0x5678>; |
| 1046 | pci@10,0 { |
| 1047 | reg = <0x8000 0 0 0 0>; |
| 1048 | }; |
Bin Meng | 408e590 | 2018-08-03 01:14:41 -0700 | [diff] [blame] | 1049 | }; |
| 1050 | |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 1051 | pci2: pci@2 { |
Bin Meng | 510dddb | 2018-08-03 01:14:50 -0700 | [diff] [blame] | 1052 | compatible = "sandbox,pci"; |
| 1053 | device_type = "pci"; |
Tom Rini | 4a3ca48 | 2020-02-11 12:41:23 -0500 | [diff] [blame] | 1054 | bus-range = <0x00 0xff>; |
Bin Meng | 510dddb | 2018-08-03 01:14:50 -0700 | [diff] [blame] | 1055 | #address-cells = <3>; |
| 1056 | #size-cells = <2>; |
| 1057 | ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000 |
| 1058 | 0x01000000 0 0x60000000 0x60000000 0 0x2000>; |
| 1059 | sandbox,dev-info = <0x08 0x00 0x1234 0x5678>; |
| 1060 | pci@1f,0 { |
| 1061 | compatible = "pci-generic"; |
| 1062 | reg = <0xf800 0 0 0 0>; |
Simon Glass | b98ba4c | 2019-09-25 08:56:10 -0600 | [diff] [blame] | 1063 | sandbox,emul = <&swap_case_emul2_1f>; |
| 1064 | }; |
| 1065 | }; |
| 1066 | |
| 1067 | pci-emul2 { |
| 1068 | compatible = "sandbox,pci-emul-parent"; |
| 1069 | swap_case_emul2_1f: emul2@1f,0 { |
| 1070 | compatible = "sandbox,swap-case"; |
Bin Meng | 510dddb | 2018-08-03 01:14:50 -0700 | [diff] [blame] | 1071 | }; |
| 1072 | }; |
| 1073 | |
Ramon Fried | c64f19b | 2019-04-27 11:15:23 +0300 | [diff] [blame] | 1074 | pci_ep: pci_ep { |
| 1075 | compatible = "sandbox,pci_ep"; |
| 1076 | }; |
| 1077 | |
Simon Glass | 9c433fe | 2017-04-23 20:10:44 -0600 | [diff] [blame] | 1078 | probing { |
| 1079 | compatible = "simple-bus"; |
| 1080 | test1 { |
| 1081 | compatible = "denx,u-boot-probe-test"; |
| 1082 | }; |
| 1083 | |
| 1084 | test2 { |
| 1085 | compatible = "denx,u-boot-probe-test"; |
| 1086 | }; |
| 1087 | |
| 1088 | test3 { |
| 1089 | compatible = "denx,u-boot-probe-test"; |
| 1090 | }; |
| 1091 | |
| 1092 | test4 { |
| 1093 | compatible = "denx,u-boot-probe-test"; |
Jean-Jacques Hiblot | dc44ea4 | 2018-11-29 10:57:37 +0100 | [diff] [blame] | 1094 | first-syscon = <&syscon0>; |
| 1095 | second-sys-ctrl = <&another_system_controller>; |
Patrick Delaunay | ee01043 | 2019-03-07 09:57:13 +0100 | [diff] [blame] | 1096 | third-syscon = <&syscon2>; |
Simon Glass | 9c433fe | 2017-04-23 20:10:44 -0600 | [diff] [blame] | 1097 | }; |
| 1098 | }; |
| 1099 | |
Stephen Warren | 92c67fa | 2016-07-13 13:45:31 -0600 | [diff] [blame] | 1100 | pwrdom: power-domain { |
| 1101 | compatible = "sandbox,power-domain"; |
| 1102 | #power-domain-cells = <1>; |
| 1103 | }; |
| 1104 | |
| 1105 | power-domain-test { |
| 1106 | compatible = "sandbox,power-domain-test"; |
| 1107 | power-domains = <&pwrdom 2>; |
| 1108 | }; |
| 1109 | |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 1110 | pwm: pwm { |
Simon Glass | e62f4be | 2017-04-16 21:01:11 -0600 | [diff] [blame] | 1111 | compatible = "sandbox,pwm"; |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 1112 | #pwm-cells = <2>; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 1113 | pinctrl-names = "default"; |
| 1114 | pinctrl-0 = <&pinmux_pwm_pins>; |
Simon Glass | e62f4be | 2017-04-16 21:01:11 -0600 | [diff] [blame] | 1115 | }; |
| 1116 | |
| 1117 | pwm2 { |
| 1118 | compatible = "sandbox,pwm"; |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 1119 | #pwm-cells = <2>; |
Simon Glass | e62f4be | 2017-04-16 21:01:11 -0600 | [diff] [blame] | 1120 | }; |
| 1121 | |
Simon Glass | 3d355e6 | 2015-07-06 12:54:31 -0600 | [diff] [blame] | 1122 | ram { |
| 1123 | compatible = "sandbox,ram"; |
| 1124 | }; |
| 1125 | |
Simon Glass | d860f22 | 2015-07-06 12:54:29 -0600 | [diff] [blame] | 1126 | reset@0 { |
| 1127 | compatible = "sandbox,warm-reset"; |
Michal Suchanek | 7687430 | 2022-10-10 20:29:39 +0200 | [diff] [blame] | 1128 | u-boot,dm-pre-proper; |
Simon Glass | d860f22 | 2015-07-06 12:54:29 -0600 | [diff] [blame] | 1129 | }; |
| 1130 | |
| 1131 | reset@1 { |
| 1132 | compatible = "sandbox,reset"; |
Michal Suchanek | 7687430 | 2022-10-10 20:29:39 +0200 | [diff] [blame] | 1133 | u-boot,dm-pre-proper; |
Simon Glass | d860f22 | 2015-07-06 12:54:29 -0600 | [diff] [blame] | 1134 | }; |
| 1135 | |
Stephen Warren | 6488e64 | 2016-06-17 09:43:59 -0600 | [diff] [blame] | 1136 | resetc: reset-ctl { |
| 1137 | compatible = "sandbox,reset-ctl"; |
| 1138 | #reset-cells = <1>; |
| 1139 | }; |
| 1140 | |
| 1141 | reset-ctl-test { |
| 1142 | compatible = "sandbox,reset-ctl-test"; |
Neil Armstrong | 9b4cdef | 2021-04-20 10:42:25 +0200 | [diff] [blame] | 1143 | resets = <&resetc 100>, <&resetc 2>, <&resetc 20>, <&resetc 40>; |
| 1144 | reset-names = "other", "test", "test2", "test3"; |
Stephen Warren | 6488e64 | 2016-06-17 09:43:59 -0600 | [diff] [blame] | 1145 | }; |
| 1146 | |
Sughosh Ganu | 23e3751 | 2019-12-28 23:58:31 +0530 | [diff] [blame] | 1147 | rng { |
| 1148 | compatible = "sandbox,sandbox-rng"; |
| 1149 | }; |
| 1150 | |
Nishanth Menon | edf8581 | 2015-09-17 15:42:41 -0500 | [diff] [blame] | 1151 | rproc_1: rproc@1 { |
| 1152 | compatible = "sandbox,test-processor"; |
| 1153 | remoteproc-name = "remoteproc-test-dev1"; |
| 1154 | }; |
| 1155 | |
| 1156 | rproc_2: rproc@2 { |
| 1157 | compatible = "sandbox,test-processor"; |
| 1158 | internal-memory-mapped; |
| 1159 | remoteproc-name = "remoteproc-test-dev2"; |
| 1160 | }; |
| 1161 | |
Simon Glass | 5620cf8 | 2018-10-01 12:22:40 -0600 | [diff] [blame] | 1162 | panel { |
| 1163 | compatible = "simple-panel"; |
| 1164 | backlight = <&backlight 0 100>; |
| 1165 | }; |
| 1166 | |
Simon Glass | 509f32e | 2022-09-21 16:21:47 +0200 | [diff] [blame] | 1167 | scsi { |
| 1168 | compatible = "sandbox,scsi"; |
| 1169 | sandbox,filepath = "scsi.img"; |
| 1170 | }; |
| 1171 | |
Ramon Fried | 26ed32e | 2018-07-02 02:57:59 +0300 | [diff] [blame] | 1172 | smem@0 { |
| 1173 | compatible = "sandbox,smem"; |
| 1174 | }; |
| 1175 | |
Simon Glass | 76072ac | 2018-12-10 10:37:36 -0700 | [diff] [blame] | 1176 | sound { |
| 1177 | compatible = "sandbox,sound"; |
| 1178 | cpu { |
| 1179 | sound-dai = <&i2s 0>; |
| 1180 | }; |
| 1181 | |
| 1182 | codec { |
| 1183 | sound-dai = <&audio 0>; |
| 1184 | }; |
| 1185 | }; |
| 1186 | |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1187 | spi@0 { |
| 1188 | #address-cells = <1>; |
| 1189 | #size-cells = <0>; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 1190 | reg = <0 1>; |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1191 | compatible = "sandbox,spi"; |
Ovidiu Panait | ae73473 | 2020-12-14 19:06:47 +0200 | [diff] [blame] | 1192 | cs-gpios = <0>, <0>, <&gpio_a 0>; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 1193 | pinctrl-names = "default"; |
| 1194 | pinctrl-0 = <&pinmux_spi0_pins>; |
| 1195 | |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1196 | spi.bin@0 { |
| 1197 | reg = <0>; |
Neil Armstrong | a009fa7 | 2019-02-10 10:16:20 +0000 | [diff] [blame] | 1198 | compatible = "spansion,m25p16", "jedec,spi-nor"; |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1199 | spi-max-frequency = <40000000>; |
| 1200 | sandbox,filename = "spi.bin"; |
| 1201 | }; |
Ovidiu Panait | ae73473 | 2020-12-14 19:06:47 +0200 | [diff] [blame] | 1202 | spi.bin@1 { |
| 1203 | reg = <1>; |
| 1204 | compatible = "spansion,m25p16", "jedec,spi-nor"; |
| 1205 | spi-max-frequency = <50000000>; |
| 1206 | sandbox,filename = "spi.bin"; |
| 1207 | spi-cpol; |
| 1208 | spi-cpha; |
| 1209 | }; |
Simon Glass | 25348a4 | 2014-10-13 23:42:11 -0600 | [diff] [blame] | 1210 | }; |
| 1211 | |
Jean-Jacques Hiblot | dc44ea4 | 2018-11-29 10:57:37 +0100 | [diff] [blame] | 1212 | syscon0: syscon@0 { |
Simon Glass | cd55652 | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 1213 | compatible = "sandbox,syscon0"; |
Mario Six | e3f59f4 | 2018-10-04 09:00:40 +0200 | [diff] [blame] | 1214 | reg = <0x10 16>; |
Simon Glass | cd55652 | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 1215 | }; |
| 1216 | |
Jean-Jacques Hiblot | dc44ea4 | 2018-11-29 10:57:37 +0100 | [diff] [blame] | 1217 | another_system_controller: syscon@1 { |
Simon Glass | cd55652 | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 1218 | compatible = "sandbox,syscon1"; |
Simon Glass | cf61f74 | 2015-07-06 12:54:36 -0600 | [diff] [blame] | 1219 | reg = <0x20 5 |
| 1220 | 0x28 6 |
| 1221 | 0x30 7 |
| 1222 | 0x38 8>; |
Simon Glass | cd55652 | 2015-07-06 12:54:35 -0600 | [diff] [blame] | 1223 | }; |
| 1224 | |
Patrick Delaunay | ee01043 | 2019-03-07 09:57:13 +0100 | [diff] [blame] | 1225 | syscon2: syscon@2 { |
Masahiro Yamada | 42ab107 | 2018-04-23 13:26:53 +0900 | [diff] [blame] | 1226 | compatible = "simple-mfd", "syscon"; |
| 1227 | reg = <0x40 5 |
| 1228 | 0x48 6 |
| 1229 | 0x50 7 |
| 1230 | 0x58 8>; |
| 1231 | }; |
| 1232 | |
Jean-Jacques Hiblot | a94b697 | 2020-10-16 16:16:34 +0530 | [diff] [blame] | 1233 | syscon3: syscon@3 { |
| 1234 | compatible = "simple-mfd", "syscon"; |
| 1235 | reg = <0x000100 0x10>; |
| 1236 | |
| 1237 | muxcontroller0: a-mux-controller { |
| 1238 | compatible = "mmio-mux"; |
| 1239 | #mux-control-cells = <1>; |
| 1240 | |
| 1241 | mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */ |
| 1242 | <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */ |
| 1243 | <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */ |
| 1244 | idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>; |
| 1245 | u-boot,mux-autoprobe; |
| 1246 | }; |
| 1247 | }; |
| 1248 | |
| 1249 | muxcontroller1: emul-mux-controller { |
| 1250 | compatible = "mux-emul"; |
| 1251 | #mux-control-cells = <0>; |
| 1252 | u-boot,mux-autoprobe; |
| 1253 | idle-state = <0xabcd>; |
| 1254 | }; |
| 1255 | |
Simon Glass | 791a17f | 2020-12-16 21:20:27 -0700 | [diff] [blame] | 1256 | testfdtm0 { |
| 1257 | compatible = "denx,u-boot-fdtm-test"; |
| 1258 | }; |
| 1259 | |
| 1260 | testfdtm1: testfdtm1 { |
| 1261 | compatible = "denx,u-boot-fdtm-test"; |
| 1262 | }; |
| 1263 | |
| 1264 | testfdtm2 { |
| 1265 | compatible = "denx,u-boot-fdtm-test"; |
| 1266 | }; |
| 1267 | |
Sean Anderson | 79d3bba | 2020-09-28 10:52:23 -0400 | [diff] [blame] | 1268 | timer@0 { |
Thomas Chou | 6f2cfbf | 2015-12-11 16:27:34 +0800 | [diff] [blame] | 1269 | compatible = "sandbox,timer"; |
| 1270 | clock-frequency = <1000000>; |
| 1271 | }; |
| 1272 | |
Sean Anderson | 79d3bba | 2020-09-28 10:52:23 -0400 | [diff] [blame] | 1273 | timer@1 { |
| 1274 | compatible = "sandbox,timer"; |
| 1275 | sandbox,timebase-frequency-fallback; |
| 1276 | }; |
| 1277 | |
Miquel Raynal | 80938c1 | 2018-05-15 11:57:27 +0200 | [diff] [blame] | 1278 | tpm2 { |
| 1279 | compatible = "sandbox,tpm2"; |
| 1280 | }; |
| 1281 | |
Simon Glass | 5b96863 | 2015-05-22 15:42:15 -0600 | [diff] [blame] | 1282 | uart0: serial { |
| 1283 | compatible = "sandbox,serial"; |
| 1284 | u-boot,dm-pre-reloc; |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 1285 | pinctrl-names = "default"; |
| 1286 | pinctrl-0 = <&pinmux_uart0_pins>; |
Joe Hershberger | 4c19724 | 2015-03-22 17:09:15 -0500 | [diff] [blame] | 1287 | }; |
| 1288 | |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1289 | usb_0: usb@0 { |
| 1290 | compatible = "sandbox,usb"; |
| 1291 | status = "disabled"; |
| 1292 | hub { |
| 1293 | compatible = "sandbox,usb-hub"; |
| 1294 | #address-cells = <1>; |
| 1295 | #size-cells = <0>; |
| 1296 | flash-stick { |
| 1297 | reg = <0>; |
| 1298 | compatible = "sandbox,usb-flash"; |
| 1299 | }; |
| 1300 | }; |
| 1301 | }; |
| 1302 | |
| 1303 | usb_1: usb@1 { |
| 1304 | compatible = "sandbox,usb"; |
Mark Kettenis | 67748ee | 2021-10-23 16:58:02 +0200 | [diff] [blame] | 1305 | iommus = <&iommu>; |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1306 | hub { |
| 1307 | compatible = "usb-hub"; |
| 1308 | usb,device-class = <9>; |
Michael Walle | 7c96132 | 2020-06-02 01:47:07 +0200 | [diff] [blame] | 1309 | #address-cells = <1>; |
| 1310 | #size-cells = <0>; |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1311 | hub-emul { |
| 1312 | compatible = "sandbox,usb-hub"; |
| 1313 | #address-cells = <1>; |
| 1314 | #size-cells = <0>; |
Simon Glass | 4700fe5 | 2015-11-08 23:48:01 -0700 | [diff] [blame] | 1315 | flash-stick@0 { |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1316 | reg = <0>; |
| 1317 | compatible = "sandbox,usb-flash"; |
| 1318 | sandbox,filepath = "testflash.bin"; |
| 1319 | }; |
| 1320 | |
Simon Glass | 4700fe5 | 2015-11-08 23:48:01 -0700 | [diff] [blame] | 1321 | flash-stick@1 { |
| 1322 | reg = <1>; |
| 1323 | compatible = "sandbox,usb-flash"; |
| 1324 | sandbox,filepath = "testflash1.bin"; |
| 1325 | }; |
| 1326 | |
| 1327 | flash-stick@2 { |
| 1328 | reg = <2>; |
| 1329 | compatible = "sandbox,usb-flash"; |
| 1330 | sandbox,filepath = "testflash2.bin"; |
| 1331 | }; |
| 1332 | |
Simon Glass | c0ccc72 | 2015-11-08 23:48:08 -0700 | [diff] [blame] | 1333 | keyb@3 { |
| 1334 | reg = <3>; |
| 1335 | compatible = "sandbox,usb-keyb"; |
| 1336 | }; |
| 1337 | |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1338 | }; |
Michael Walle | 7c96132 | 2020-06-02 01:47:07 +0200 | [diff] [blame] | 1339 | |
| 1340 | usbstor@1 { |
| 1341 | reg = <1>; |
| 1342 | }; |
| 1343 | usbstor@3 { |
| 1344 | reg = <3>; |
| 1345 | }; |
Simon Glass | 3168048 | 2015-03-25 12:23:05 -0600 | [diff] [blame] | 1346 | }; |
| 1347 | }; |
| 1348 | |
| 1349 | usb_2: usb@2 { |
| 1350 | compatible = "sandbox,usb"; |
| 1351 | status = "disabled"; |
| 1352 | }; |
| 1353 | |
Mateusz Kulikowski | c7e4fbb | 2016-03-31 23:12:28 +0200 | [diff] [blame] | 1354 | spmi: spmi@0 { |
| 1355 | compatible = "sandbox,spmi"; |
| 1356 | #address-cells = <0x1>; |
| 1357 | #size-cells = <0x1>; |
Simon Glass | 9513997 | 2019-09-25 08:55:59 -0600 | [diff] [blame] | 1358 | ranges; |
Mateusz Kulikowski | c7e4fbb | 2016-03-31 23:12:28 +0200 | [diff] [blame] | 1359 | pm8916@0 { |
| 1360 | compatible = "qcom,spmi-pmic"; |
| 1361 | reg = <0x0 0x1>; |
| 1362 | #address-cells = <0x1>; |
| 1363 | #size-cells = <0x1>; |
Simon Glass | 9513997 | 2019-09-25 08:55:59 -0600 | [diff] [blame] | 1364 | ranges; |
Mateusz Kulikowski | c7e4fbb | 2016-03-31 23:12:28 +0200 | [diff] [blame] | 1365 | |
| 1366 | spmi_gpios: gpios@c000 { |
| 1367 | compatible = "qcom,pm8916-gpio"; |
| 1368 | reg = <0xc000 0x400>; |
| 1369 | gpio-controller; |
| 1370 | gpio-count = <4>; |
| 1371 | #gpio-cells = <2>; |
| 1372 | gpio-bank-name="spmi"; |
| 1373 | }; |
| 1374 | }; |
| 1375 | }; |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 1376 | |
| 1377 | wdt0: wdt@0 { |
| 1378 | compatible = "sandbox,wdt"; |
Rasmus Villemoes | f91ff5a | 2021-08-19 11:57:06 +0200 | [diff] [blame] | 1379 | hw_margin_ms = <200>; |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 1380 | }; |
Rob Clark | a471b67 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 1381 | |
Mario Six | 9592215 | 2018-08-09 14:51:19 +0200 | [diff] [blame] | 1382 | axi: axi@0 { |
| 1383 | compatible = "sandbox,axi"; |
| 1384 | #address-cells = <0x1>; |
| 1385 | #size-cells = <0x1>; |
| 1386 | store@0 { |
| 1387 | compatible = "sandbox,sandbox_store"; |
| 1388 | reg = <0x0 0x400>; |
| 1389 | }; |
| 1390 | }; |
| 1391 | |
Rob Clark | a471b67 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 1392 | chosen { |
Simon Glass | 305ac9a | 2018-02-03 10:36:58 -0700 | [diff] [blame] | 1393 | #address-cells = <1>; |
| 1394 | #size-cells = <1>; |
Simon Glass | f345596 | 2020-01-27 08:49:43 -0700 | [diff] [blame] | 1395 | setting = "sunrise ohoka"; |
| 1396 | other-node = "/some-bus/c-test@5"; |
Simon Glass | e09223c | 2020-01-27 08:49:46 -0700 | [diff] [blame] | 1397 | int-values = <0x1937 72993>; |
Simon Glass | 3c601b1 | 2020-07-07 13:12:06 -0600 | [diff] [blame] | 1398 | u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>; |
Rob Clark | a471b67 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 1399 | chosen-test { |
| 1400 | compatible = "denx,u-boot-fdt-test"; |
| 1401 | reg = <9 1>; |
| 1402 | }; |
Simon Glass | c8d3721 | 2022-07-30 15:52:34 -0600 | [diff] [blame] | 1403 | |
| 1404 | fwupd { |
| 1405 | compatible = "simple-bus"; |
| 1406 | firmware0 { |
| 1407 | compatible = "fwupd,vbe-simple"; |
| 1408 | storage = "mmc1"; |
| 1409 | area-start = <0x400>; |
| 1410 | area-size = <0x1000>; |
| 1411 | skip-offset = <0x200>; |
| 1412 | state-offset = <0x400>; |
| 1413 | state-size = <0x40>; |
| 1414 | version-offset = <0x800>; |
| 1415 | version-size = <0x100>; |
| 1416 | }; |
| 1417 | }; |
Rob Clark | a471b67 | 2018-01-10 11:33:30 +0100 | [diff] [blame] | 1418 | }; |
Mario Six | 35616ef | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 1419 | |
| 1420 | translation-test@8000 { |
| 1421 | compatible = "simple-bus"; |
| 1422 | reg = <0x8000 0x4000>; |
| 1423 | |
| 1424 | #address-cells = <0x2>; |
| 1425 | #size-cells = <0x1>; |
| 1426 | |
| 1427 | ranges = <0 0x0 0x8000 0x1000 |
| 1428 | 1 0x100 0x9000 0x1000 |
| 1429 | 2 0x200 0xA000 0x1000 |
| 1430 | 3 0x300 0xB000 0x1000 |
| 1431 | >; |
| 1432 | |
Fabien Dessenne | 22236e0 | 2019-05-31 15:11:30 +0200 | [diff] [blame] | 1433 | dma-ranges = <0 0x000 0x10000000 0x1000 |
| 1434 | 1 0x100 0x20000000 0x1000 |
| 1435 | >; |
| 1436 | |
Mario Six | 35616ef | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 1437 | dev@0,0 { |
| 1438 | compatible = "denx,u-boot-fdt-dummy"; |
| 1439 | reg = <0 0x0 0x1000>; |
Ălvaro FernĂĄndez Rojas | a318115 | 2018-12-03 19:37:09 +0100 | [diff] [blame] | 1440 | reg-names = "sandbox-dummy-0"; |
Mario Six | 35616ef | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 1441 | }; |
| 1442 | |
| 1443 | dev@1,100 { |
| 1444 | compatible = "denx,u-boot-fdt-dummy"; |
| 1445 | reg = <1 0x100 0x1000>; |
| 1446 | |
| 1447 | }; |
| 1448 | |
| 1449 | dev@2,200 { |
| 1450 | compatible = "denx,u-boot-fdt-dummy"; |
| 1451 | reg = <2 0x200 0x1000>; |
| 1452 | }; |
| 1453 | |
| 1454 | |
| 1455 | noxlatebus@3,300 { |
| 1456 | compatible = "simple-bus"; |
| 1457 | reg = <3 0x300 0x1000>; |
| 1458 | |
| 1459 | #address-cells = <0x1>; |
| 1460 | #size-cells = <0x0>; |
| 1461 | |
| 1462 | dev@42 { |
| 1463 | compatible = "denx,u-boot-fdt-dummy"; |
| 1464 | reg = <0x42>; |
| 1465 | }; |
| 1466 | }; |
| 1467 | }; |
Mario Six | 02ad6fb | 2018-09-27 09:19:31 +0200 | [diff] [blame] | 1468 | |
| 1469 | osd { |
| 1470 | compatible = "sandbox,sandbox_osd"; |
| 1471 | }; |
Tom Rini | b93eea7 | 2018-09-30 18:16:51 -0400 | [diff] [blame] | 1472 | |
Jens Wiklander | 86afaa6 | 2018-09-25 16:40:16 +0200 | [diff] [blame] | 1473 | sandbox_tee { |
| 1474 | compatible = "sandbox,tee"; |
| 1475 | }; |
Bin Meng | 1bb290d | 2018-10-15 02:21:26 -0700 | [diff] [blame] | 1476 | |
| 1477 | sandbox_virtio1 { |
| 1478 | compatible = "sandbox,virtio1"; |
| 1479 | }; |
| 1480 | |
| 1481 | sandbox_virtio2 { |
| 1482 | compatible = "sandbox,virtio2"; |
| 1483 | }; |
Patrice Chotard | 0fc8afc | 2018-10-24 14:10:23 +0200 | [diff] [blame] | 1484 | |
Etienne Carriere | 2d94c08fa | 2020-09-09 18:44:05 +0200 | [diff] [blame] | 1485 | sandbox_scmi { |
| 1486 | compatible = "sandbox,scmi-devices"; |
Etienne Carriere | bf1f132 | 2022-02-21 09:22:41 +0100 | [diff] [blame] | 1487 | clocks = <&clk_scmi 2>, <&clk_scmi 0>; |
Etienne Carriere | 09665cb | 2022-02-21 09:22:39 +0100 | [diff] [blame] | 1488 | resets = <&reset_scmi 3>; |
| 1489 | regul0-supply = <®ul0_scmi>; |
| 1490 | regul1-supply = <®ul1_scmi>; |
Etienne Carriere | 2d94c08fa | 2020-09-09 18:44:05 +0200 | [diff] [blame] | 1491 | }; |
| 1492 | |
Patrice Chotard | 0fc8afc | 2018-10-24 14:10:23 +0200 | [diff] [blame] | 1493 | pinctrl { |
| 1494 | compatible = "sandbox,pinctrl"; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1495 | |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1496 | pinctrl-names = "default", "alternate"; |
| 1497 | pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>; |
| 1498 | pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1499 | |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1500 | pinctrl_gpios: gpios { |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1501 | gpio0 { |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1502 | pins = "P5"; |
| 1503 | function = "GPIO"; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1504 | bias-pull-up; |
| 1505 | input-disable; |
| 1506 | }; |
| 1507 | gpio1 { |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1508 | pins = "P6"; |
| 1509 | function = "GPIO"; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1510 | output-high; |
| 1511 | drive-open-drain; |
| 1512 | }; |
| 1513 | gpio2 { |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1514 | pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1515 | bias-pull-down; |
| 1516 | input-enable; |
| 1517 | }; |
| 1518 | gpio3 { |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1519 | pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>; |
Patrick Delaunay | 939cbe9 | 2020-01-13 11:35:12 +0100 | [diff] [blame] | 1520 | bias-disable; |
| 1521 | }; |
| 1522 | }; |
Sean Anderson | 3438e3b | 2020-09-14 11:01:57 -0400 | [diff] [blame] | 1523 | |
| 1524 | pinctrl_i2c: i2c { |
| 1525 | groups { |
| 1526 | groups = "I2C_UART"; |
| 1527 | function = "I2C"; |
| 1528 | }; |
| 1529 | |
| 1530 | pins { |
| 1531 | pins = "P0", "P1"; |
| 1532 | drive-open-drain; |
| 1533 | }; |
| 1534 | }; |
| 1535 | |
| 1536 | pinctrl_i2s: i2s { |
| 1537 | groups = "SPI_I2S"; |
| 1538 | function = "I2S"; |
| 1539 | }; |
| 1540 | |
| 1541 | pinctrl_spi: spi { |
| 1542 | groups = "SPI_I2S"; |
| 1543 | function = "SPI"; |
| 1544 | |
| 1545 | cs { |
| 1546 | pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>, |
| 1547 | <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>; |
| 1548 | }; |
| 1549 | }; |
Patrice Chotard | 0fc8afc | 2018-10-24 14:10:23 +0200 | [diff] [blame] | 1550 | }; |
Benjamin Gaignard | a550b54 | 2018-11-27 13:49:50 +0100 | [diff] [blame] | 1551 | |
Dario Binacchi | 20dd9e1 | 2021-04-11 09:39:50 +0200 | [diff] [blame] | 1552 | pinctrl-single-no-width { |
| 1553 | compatible = "pinctrl-single"; |
| 1554 | reg = <0x0000 0x238>; |
| 1555 | #pinctrl-cells = <1>; |
| 1556 | pinctrl-single,function-mask = <0x7f>; |
| 1557 | }; |
| 1558 | |
| 1559 | pinctrl-single-pins { |
| 1560 | compatible = "pinctrl-single"; |
| 1561 | reg = <0x0000 0x238>; |
| 1562 | #pinctrl-cells = <1>; |
| 1563 | pinctrl-single,register-width = <32>; |
| 1564 | pinctrl-single,function-mask = <0x7f>; |
| 1565 | |
| 1566 | pinmux_pwm_pins: pinmux_pwm_pins { |
| 1567 | pinctrl-single,pins = < 0x48 0x06 >; |
| 1568 | }; |
| 1569 | |
| 1570 | pinmux_spi0_pins: pinmux_spi0_pins { |
| 1571 | pinctrl-single,pins = < |
| 1572 | 0x190 0x0c |
| 1573 | 0x194 0x0c |
| 1574 | 0x198 0x23 |
| 1575 | 0x19c 0x0c |
| 1576 | >; |
| 1577 | }; |
| 1578 | |
| 1579 | pinmux_uart0_pins: pinmux_uart0_pins { |
| 1580 | pinctrl-single,pins = < |
| 1581 | 0x70 0x30 |
| 1582 | 0x74 0x00 |
| 1583 | >; |
| 1584 | }; |
| 1585 | }; |
| 1586 | |
| 1587 | pinctrl-single-bits { |
| 1588 | compatible = "pinctrl-single"; |
| 1589 | reg = <0x0000 0x50>; |
| 1590 | #pinctrl-cells = <2>; |
| 1591 | pinctrl-single,bit-per-mux; |
| 1592 | pinctrl-single,register-width = <32>; |
| 1593 | pinctrl-single,function-mask = <0xf>; |
| 1594 | |
| 1595 | pinmux_i2c0_pins: pinmux_i2c0_pins { |
| 1596 | pinctrl-single,bits = < |
| 1597 | 0x10 0x00002200 0x0000ff00 |
| 1598 | >; |
| 1599 | }; |
| 1600 | |
| 1601 | pinmux_lcd_pins: pinmux_lcd_pins { |
| 1602 | pinctrl-single,bits = < |
| 1603 | 0x40 0x22222200 0xffffff00 |
| 1604 | 0x44 0x22222222 0xffffffff |
| 1605 | 0x48 0x00000022 0x000000ff |
| 1606 | 0x48 0x02000000 0x0f000000 |
| 1607 | 0x4c 0x02000022 0x0f0000ff |
| 1608 | >; |
| 1609 | }; |
| 1610 | }; |
| 1611 | |
Benjamin Gaignard | a550b54 | 2018-11-27 13:49:50 +0100 | [diff] [blame] | 1612 | hwspinlock@0 { |
| 1613 | compatible = "sandbox,hwspinlock"; |
| 1614 | }; |
Grygorii Strashko | 19ebf0b | 2018-11-28 19:17:51 +0100 | [diff] [blame] | 1615 | |
| 1616 | dma: dma { |
| 1617 | compatible = "sandbox,dma"; |
| 1618 | #dma-cells = <1>; |
| 1619 | |
| 1620 | dmas = <&dma 0>, <&dma 1>, <&dma 2>; |
| 1621 | dma-names = "m2m", "tx0", "rx0"; |
| 1622 | }; |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 1623 | |
Alex Marginean | 0649be5 | 2019-07-12 10:13:53 +0300 | [diff] [blame] | 1624 | /* |
| 1625 | * keep mdio-mux ahead of mdio so that the mux is removed first at the |
| 1626 | * end of the test. If parent mdio is removed first, clean-up of the |
| 1627 | * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio |
| 1628 | * active at the end of the test. That it turn doesn't allow the mdio |
| 1629 | * class to be destroyed, triggering an error. |
| 1630 | */ |
| 1631 | mdio-mux-test { |
| 1632 | compatible = "sandbox,mdio-mux"; |
| 1633 | #address-cells = <1>; |
| 1634 | #size-cells = <0>; |
| 1635 | mdio-parent-bus = <&mdio>; |
| 1636 | |
| 1637 | mdio-ch-test@0 { |
| 1638 | reg = <0>; |
| 1639 | }; |
| 1640 | mdio-ch-test@1 { |
| 1641 | reg = <1>; |
| 1642 | }; |
| 1643 | }; |
| 1644 | |
| 1645 | mdio: mdio-test { |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 1646 | compatible = "sandbox,mdio"; |
Marek BehĂșn | f4f1ddc | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 1647 | #address-cells = <1>; |
| 1648 | #size-cells = <0>; |
| 1649 | |
| 1650 | ethphy1: ethernet-phy@1 { |
| 1651 | reg = <1>; |
| 1652 | }; |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 1653 | }; |
Sean Anderson | b786054 | 2020-06-24 06:41:12 -0400 | [diff] [blame] | 1654 | |
| 1655 | pm-bus-test { |
| 1656 | compatible = "simple-pm-bus"; |
| 1657 | clocks = <&clk_sandbox 4>; |
| 1658 | power-domains = <&pwrdom 1>; |
| 1659 | }; |
Sean Anderson | 0c1f6bf | 2020-06-24 06:41:14 -0400 | [diff] [blame] | 1660 | |
| 1661 | resetc2: syscon-reset { |
| 1662 | compatible = "syscon-reset"; |
| 1663 | #reset-cells = <1>; |
| 1664 | regmap = <&syscon0>; |
| 1665 | offset = <1>; |
| 1666 | mask = <0x27FFFFFF>; |
| 1667 | assert-high = <0>; |
| 1668 | }; |
| 1669 | |
| 1670 | syscon-reset-test { |
| 1671 | compatible = "sandbox,misc_sandbox"; |
| 1672 | resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>; |
| 1673 | reset-names = "valid", "no_mask", "out_of_range"; |
| 1674 | }; |
Jean-Jacques Hiblot | 0b89fc5 | 2020-09-24 10:04:18 +0530 | [diff] [blame] | 1675 | |
Simon Glass | 458b66a | 2020-11-05 06:32:05 -0700 | [diff] [blame] | 1676 | sysinfo { |
| 1677 | compatible = "sandbox,sysinfo-sandbox"; |
| 1678 | }; |
| 1679 | |
Sean Anderson | 1c83067 | 2021-04-20 10:50:58 -0400 | [diff] [blame] | 1680 | sysinfo-gpio { |
| 1681 | compatible = "gpio-sysinfo"; |
| 1682 | gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>; |
| 1683 | revisions = <19>, <5>; |
| 1684 | names = "rev_a", "foo"; |
| 1685 | }; |
| 1686 | |
Jean-Jacques Hiblot | 0b89fc5 | 2020-09-24 10:04:18 +0530 | [diff] [blame] | 1687 | some_regmapped-bus { |
| 1688 | #address-cells = <0x1>; |
| 1689 | #size-cells = <0x1>; |
| 1690 | |
| 1691 | ranges = <0x0 0x0 0x10>; |
| 1692 | compatible = "simple-bus"; |
| 1693 | |
| 1694 | regmap-test_0 { |
| 1695 | reg = <0 0x10>; |
| 1696 | compatible = "sandbox,regmap_test"; |
| 1697 | }; |
| 1698 | }; |
Robert Marko | 9cf8712 | 2022-09-06 13:30:35 +0200 | [diff] [blame] | 1699 | |
| 1700 | thermal { |
| 1701 | compatible = "sandbox,thermal"; |
| 1702 | }; |
Simon Glass | b2c1cac | 2014-02-26 15:59:21 -0700 | [diff] [blame] | 1703 | }; |
Przemyslaw Marczak | 77bee05 | 2015-05-13 13:38:35 +0200 | [diff] [blame] | 1704 | |
| 1705 | #include "sandbox_pmic.dtsi" |
Heinrich Schuchardt | e24fdef | 2021-02-18 13:01:35 +0100 | [diff] [blame] | 1706 | #include "cros-ec-keyboard.dtsi" |